riscv: define REG_S1 and REG_S2
[musl.git] / arch / mips / pthread_arch.h
blob376b77415a6f89e2009f6b2429db449874e0cd31
1 static inline uintptr_t __get_tp()
3 register uintptr_t tp __asm__("$3");
4 #if __mips_isa_rev < 2
5 __asm__ (".word 0x7c03e83b" : "=r" (tp) );
6 #else
7 __asm__ ("rdhwr %0, $29" : "=r" (tp) );
8 #endif
9 return tp;
12 #define TLS_ABOVE_TP
13 #define GAP_ABOVE_TP 0
15 #define TP_OFFSET 0x7000
16 #define DTP_OFFSET 0x8000
18 #define MC_PC pc