mingw/info/gdb/Memory-Region-Attributes.html

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  12 Node:<a name="Memory%20Region%20Attributes">Memory Region Attributes</a>,
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  17
  18 <h3 class="section">Memory Region Attributes</h3>
  19
  20    <p><dfn>Memory region attributes</dfn> allow you to describe special handling
  21 required by regions of your target's memory.  GDB uses attributes
  22 to determine whether to allow certain types of memory accesses; whether to
  23 use specific width accesses; and whether to cache target memory.
  24
  25    <p>Defined memory regions can be individually enabled and disabled.  When a
  26 memory region is disabled, GDB uses the default attributes when
  27 accessing memory in that region.  Similarly, if no memory regions have
  28 been defined, GDB uses the default attributes when accessing
  29 all memory.
  30
  31    <p>When a memory region is defined, it is given a number to identify it;
  32 to enable, disable, or remove a memory region, you specify that number.
  33
  34      <dl>
  35 <dt><code>mem </code><var>address1</var><code> </code><var>address2</var><code> </code><var>attributes</var><code>...</code>
  36      <dd>Define memory region bounded by <var>address1</var> and <var>address2</var>
  37 with attributes <var>attributes</var><small class="dots">...</small>.
  38
  39      <br><dt><code>delete mem </code><var>nums</var><code>...</code>
  40      <dd>Remove memory regions <var>nums</var><small class="dots">...</small>.
  41
  42      <br><dt><code>disable mem </code><var>nums</var><code>...</code>
  43      <dd>Disable memory regions <var>nums</var><small class="dots">...</small>.
  44 A disabled memory region is not forgotten.
  45 It may be enabled again later.
  46
  47      <br><dt><code>enable mem </code><var>nums</var><code>...</code>
  48      <dd>Enable memory regions <var>nums</var><small class="dots">...</small>.
  49
  50      <br><dt><code>info mem</code>
  51      <dd>Print a table of all defined memory regions, with the following columns
  52 for each region.
  53
  54           <dl>
  55 <dt><em>Memory Region Number</em>
  56           <dd><br><dt><em>Enabled or Disabled.</em>
  57           <dd>Enabled memory regions are marked with <code>y</code>.
  58 Disabled memory regions are marked with <code>n</code>.
  59
  60           <br><dt><em>Lo Address</em>
  61           <dd>The address defining the inclusive lower bound of the memory region.
  62
  63           <br><dt><em>Hi Address</em>
  64           <dd>The address defining the exclusive upper bound of the memory region.
  65
  66           <br><dt><em>Attributes</em>
  67           <dd>The list of attributes set for this memory region.
  68 </dl>
  69 </dl>
  70
  71 <h4 class="subsection">Attributes</h4>
  72
  73 <h5 class="subsubsection">Memory Access Mode</h5>
  74
  75    <p>The access mode attributes set whether GDB may make read or
  76 write accesses to a memory region.
  77
  78    <p>While these attributes prevent GDB from performing invalid
  79 memory accesses, they do nothing to prevent the target system, I/O DMA,
  80 etc. from accessing memory.
  81
  82      <dl>
  83 <dt><code>ro</code>
  84      <dd>Memory is read only.
  85 <br><dt><code>wo</code>
  86      <dd>Memory is write only.
  87 <br><dt><code>rw</code>
  88      <dd>Memory is read/write.  This is the default.
  89 </dl>
  90
  91 <h5 class="subsubsection">Memory Access Size</h5>
  92
  93    <p>The acccess size attributes tells GDB to use specific sized
  94 accesses in the memory region.  Often memory mapped device registers
  95 require specific sized accesses.  If no access size attribute is
  96 specified, GDB may use accesses of any size.
  97
  98      <dl>
  99 <dt><code>8</code>
 100      <dd>Use 8 bit memory accesses.
 101 <br><dt><code>16</code>
 102      <dd>Use 16 bit memory accesses.
 103 <br><dt><code>32</code>
 104      <dd>Use 32 bit memory accesses.
 105 <br><dt><code>64</code>
 106      <dd>Use 64 bit memory accesses.
 107 </dl>
 108
 109 <h5 class="subsubsection">Data Cache</h5>
 110
 111    <p>The data cache attributes set whether GDB will cache target
 112 memory.  While this generally improves performance by reducing debug
 113 protocol overhead, it can lead to incorrect results because GDB
 114 does not know about volatile variables or memory mapped device
 115 registers.
 116
 117      <dl>
 118 <dt><code>cache</code>
 119      <dd>Enable GDB to cache target memory.
 120 <br><dt><code>nocache</code>
 121      <dd>Disable GDB from caching target memory.  This is the default.
 122 </dl>
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