2 ;; Function BOOL DllMain(void*, DWORD, void*) (_Z7DllMainPvmS_@12)
8 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
9 Register 59 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
11 Register 53 pref FLOAT_INT_SSE_REGS or none
12 Register 54 pref FLOAT_INT_SSE_REGS or none
13 Register 55 pref FLOAT_INT_SSE_REGS or none
14 Register 56 pref FLOAT_INT_SSE_REGS or none
15 Register 57 pref FLOAT_INT_SSE_REGS or none
16 Register 58 pref GENERAL_REGS or none
17 Register 59 pref AREG, else GENERAL_REGS
18 Register 60 pref FLOAT_INT_SSE_REGS or none
21 Register 58 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none.
23 Register 59 used 2 times across 2 insns in block 2; set 1 time; pref AREG, else GENERAL_REGS.
25 3 basic blocks, 2 edges.
27 Basic block 2 , prev 0, next 1, loop_depth 0, count 0, freq 0.
28 Predecessors: ENTRY (fallthru)
29 Successors: EXIT [100.0%] (fallthru)
30 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
31 Registers live at end: 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
35 (note 2 0 3 NOTE_INSN_DELETED)
37 (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
39 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
40 (note 5 3 7 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
42 (insn 7 5 8 2 (set (reg:SI 58 [ D.16240 ])
43 (const_int 1 [0x1])) 34 {*movsi_1} (nil)
46 (insn 8 7 11 2 (set (reg:SI 59 [ <result> ])
47 (reg:SI 58 [ D.16240 ])) 34 {*movsi_1} (nil)
48 (expr_list:REG_DEAD (reg:SI 58 [ D.16240 ])
51 (note 11 8 14 2 NOTE_INSN_FUNCTION_END)
53 (insn 14 11 20 2 (set (reg/i:SI 0 ax [ <result> ])
54 (reg:SI 59 [ <result> ])) 34 {*movsi_1} (nil)
55 (expr_list:REG_DEAD (reg:SI 59 [ <result> ])
58 (insn 20 14 0 2 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
60 ;; End of basic block 2, registers live:
61 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
64 ;; Function int CompareMqlStr(const void*, const void*) (_Z13CompareMqlStrPKvS0_)
70 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
71 Register 59 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
72 Register 60 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
73 Register 61 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:7000
74 Register 62 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
75 Register 63 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
76 Register 64 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
77 Register 65 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
78 Register 66 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
79 Register 67 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
80 Register 68 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
81 Register 69 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
83 Register 53 pref FLOAT_INT_SSE_REGS or none
84 Register 54 pref FLOAT_INT_SSE_REGS or none
85 Register 55 pref FLOAT_INT_SSE_REGS or none
86 Register 56 pref FLOAT_INT_SSE_REGS or none
87 Register 57 pref FLOAT_INT_SSE_REGS or none
88 Register 58 pref GENERAL_REGS or none
89 Register 59 pref GENERAL_REGS or none
90 Register 60 pref GENERAL_REGS or none
91 Register 61 pref AREG, else GENERAL_REGS
92 Register 62 pref GENERAL_REGS or none
93 Register 63 pref AREG, else GENERAL_REGS
94 Register 64 pref GENERAL_REGS or none
95 Register 65 pref GENERAL_REGS or none
96 Register 66 pref GENERAL_REGS or none
97 Register 67 pref GENERAL_REGS or none
98 Register 68 pref GENERAL_REGS or none
99 Register 69 pref GENERAL_REGS or none
100 Register 70 pref FLOAT_INT_SSE_REGS or none
103 Register 58 used 2 times across 4 insns in block 6; set 1 time; GENERAL_REGS or none.
105 Register 59 used 2 times across 5 insns in block 6; set 1 time; GENERAL_REGS or none.
107 Register 60 used 2 times across 2 insns in block 4; set 1 time; GENERAL_REGS or none.
109 Register 61 used 4 times across 6 insns; set 3 times; pref AREG, else GENERAL_REGS.
111 Register 62 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none.
113 Register 63 used 2 times across 2 insns in block 7; set 1 time; pref AREG, else GENERAL_REGS.
115 Register 64 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none; pointer.
117 Register 65 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none; pointer.
119 Register 66 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none; pointer.
121 Register 67 used 2 times across 2 insns in block 4; set 1 time; GENERAL_REGS or none; pointer.
123 Register 68 used 2 times across 2 insns in block 6; set 1 time; GENERAL_REGS or none; pointer.
125 Register 69 used 2 times across 2 insns in block 6; set 1 time; GENERAL_REGS or none; pointer.
127 8 basic blocks, 9 edges.
129 Basic block 2 , prev 0, next 3, loop_depth 0, count 0, freq 0.
130 Predecessors: ENTRY (fallthru)
131 Successors: 3 (fallthru) 4
132 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
133 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
135 Basic block 3 , prev 2, next 4, loop_depth 0, count 0, freq 0.
136 Predecessors: 2 (fallthru)
138 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
139 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 61
141 Basic block 4 , prev 3, next 5, loop_depth 0, count 0, freq 0.
143 Successors: 5 (fallthru) 6
144 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
145 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
147 Basic block 5 , prev 4, next 6, loop_depth 0, count 0, freq 0.
148 Predecessors: 4 (fallthru)
150 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
151 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 61
153 Basic block 6 , prev 5, next 7, loop_depth 0, count 0, freq 0.
155 Successors: 7 (fallthru)
156 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
157 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 61
159 Basic block 7 , prev 6, next 1, loop_depth 0, count 0, freq 0.
160 Predecessors: 3 5 6 (fallthru)
161 Successors: EXIT [100.0%] (fallthru)
162 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 61
163 Registers live at end: 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
176 (note 2 0 3 NOTE_INSN_DELETED)
178 (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
180 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
181 (note 5 3 7 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
183 (insn 7 5 8 2 (set (reg/f:SI 64 [ left ])
184 (mem/c/i:SI (reg/f:SI 16 argp) [0 left+0 S4 A32])) 34 {*movsi_1} (nil)
187 (insn 8 7 10 2 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
188 (const_int -8 [0xfffffff8])) [0 leftstr+0 S4 A32])
189 (reg/f:SI 64 [ left ])) 34 {*movsi_1} (nil)
190 (expr_list:REG_DEAD (reg/f:SI 64 [ left ])
193 (insn 10 8 11 2 (set (reg/f:SI 65 [ right ])
194 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
195 (const_int 4 [0x4])) [0 right+0 S4 A32])) 34 {*movsi_1} (nil)
198 (insn 11 10 13 2 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
199 (const_int -4 [0xfffffffc])) [0 rightstr+0 S4 A32])
200 (reg/f:SI 65 [ right ])) 34 {*movsi_1} (nil)
201 (expr_list:REG_DEAD (reg/f:SI 65 [ right ])
204 (insn 13 11 14 2 (set (reg/f:SI 66 [ leftstr ])
205 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
206 (const_int -8 [0xfffffff8])) [0 leftstr+0 S4 A32])) 34 {*movsi_1} (nil)
209 (insn 14 13 15 2 (set (reg:SI 62 [ D.16401 ])
210 (mem/s/f/j:SI (plus:SI (reg/f:SI 66 [ leftstr ])
211 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
212 (expr_list:REG_DEAD (reg/f:SI 66 [ leftstr ])
215 (insn 15 14 16 2 (set (reg:CCZ 17 flags)
216 (compare:CCZ (reg:SI 62 [ D.16401 ])
217 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
218 (expr_list:REG_DEAD (reg:SI 62 [ D.16401 ])
221 (jump_insn 16 15 18 2 (set (pc)
222 (if_then_else (ne (reg:CCZ 17 flags)
225 (pc))) 365 {*jcc_1} (nil)
226 (expr_list:REG_DEAD (reg:CCZ 17 flags)
228 ;; End of basic block 2, registers live:
229 6 [bp] 7 [sp] 16 [argp] 20 [frame]
231 ;; Start of basic block 3, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
232 (note 18 16 19 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
234 (insn 19 18 20 3 (set (reg:SI 61 [ D.16402 ])
235 (const_int -1 [0xffffffff])) 34 {*movsi_1} (nil)
238 (jump_insn 20 19 21 3 (set (pc)
239 (label_ref 47)) 380 {jump} (nil)
241 ;; End of basic block 3, registers live:
242 6 [bp] 7 [sp] 16 [argp] 20 [frame] 61
246 ;; Start of basic block 4, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
247 (code_label 22 21 23 4 4 "" [1 uses])
249 (note 23 22 25 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
251 (insn 25 23 26 4 (set (reg/f:SI 67 [ rightstr ])
252 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
253 (const_int -4 [0xfffffffc])) [0 rightstr+0 S4 A32])) 34 {*movsi_1} (nil)
256 (insn 26 25 27 4 (set (reg:SI 60 [ D.16403 ])
257 (mem/s/f/j:SI (plus:SI (reg/f:SI 67 [ rightstr ])
258 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
259 (expr_list:REG_DEAD (reg/f:SI 67 [ rightstr ])
262 (insn 27 26 28 4 (set (reg:CCZ 17 flags)
263 (compare:CCZ (reg:SI 60 [ D.16403 ])
264 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
265 (expr_list:REG_DEAD (reg:SI 60 [ D.16403 ])
268 (jump_insn 28 27 30 4 (set (pc)
269 (if_then_else (ne (reg:CCZ 17 flags)
272 (pc))) 365 {*jcc_1} (nil)
273 (expr_list:REG_DEAD (reg:CCZ 17 flags)
275 ;; End of basic block 4, registers live:
276 6 [bp] 7 [sp] 16 [argp] 20 [frame]
278 ;; Start of basic block 5, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
279 (note 30 28 31 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
281 (insn 31 30 32 5 (set (reg:SI 61 [ D.16402 ])
282 (const_int 1 [0x1])) 34 {*movsi_1} (nil)
285 (jump_insn 32 31 33 5 (set (pc)
286 (label_ref 47)) 380 {jump} (nil)
288 ;; End of basic block 5, registers live:
289 6 [bp] 7 [sp] 16 [argp] 20 [frame] 61
293 ;; Start of basic block 6, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
294 (code_label 34 33 35 6 7 "" [1 uses])
296 (note 35 34 37 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
298 (insn 37 35 38 6 (set (reg/f:SI 68 [ rightstr ])
299 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
300 (const_int -4 [0xfffffffc])) [0 rightstr+0 S4 A32])) 34 {*movsi_1} (nil)
303 (insn 38 37 39 6 (set (reg:SI 59 [ D.16404 ])
304 (mem/s/f/j:SI (plus:SI (reg/f:SI 68 [ rightstr ])
305 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
306 (expr_list:REG_DEAD (reg/f:SI 68 [ rightstr ])
309 (insn 39 38 40 6 (set (reg/f:SI 69 [ leftstr ])
310 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
311 (const_int -8 [0xfffffff8])) [0 leftstr+0 S4 A32])) 34 {*movsi_1} (nil)
314 (insn 40 39 41 6 (set (reg:SI 58 [ D.16405 ])
315 (mem/s/f/j:SI (plus:SI (reg/f:SI 69 [ leftstr ])
316 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
317 (expr_list:REG_DEAD (reg/f:SI 69 [ leftstr ])
320 (insn 41 40 42 6 (parallel [
322 (plus:SI (reg/f:SI 7 sp)
323 (const_int -8 [0xfffffff8])))
324 (clobber (reg:CC 17 flags))
325 ]) 148 {*addsi_1} (nil)
326 (expr_list:REG_UNUSED (reg:CC 17 flags)
329 (insn 42 41 43 6 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
330 (reg:SI 59 [ D.16404 ])) 28 {*pushsi2} (nil)
331 (expr_list:REG_DEAD (reg:SI 59 [ D.16404 ])
334 (insn 43 42 44 6 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
335 (reg:SI 58 [ D.16405 ])) 28 {*pushsi2} (nil)
336 (expr_list:REG_DEAD (reg:SI 58 [ D.16405 ])
339 (call_insn/u 44 43 45 6 (set (reg:SI 0 ax)
340 (call (mem:QI (symbol_ref:SI ("strcmp") [flags 0x41] <function_decl 0xb72e1770 strcmp>) [0 S1 A8])
341 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
342 (expr_list:REG_EH_REGION (const_int 0 [0x0])
344 (expr_list:REG_DEP_TRUE (use (mem:BLK (scratch) [0 A8]))
347 (insn 45 44 46 6 (parallel [
349 (plus:SI (reg/f:SI 7 sp)
350 (const_int 16 [0x10])))
351 (clobber (reg:CC 17 flags))
352 ]) 148 {*addsi_1} (nil)
353 (expr_list:REG_UNUSED (reg:CC 17 flags)
356 (insn 46 45 47 6 (set (reg:SI 61 [ D.16402 ])
357 (reg:SI 0 ax)) 34 {*movsi_1} (nil)
358 (expr_list:REG_DEAD (reg:SI 0 ax)
360 ;; End of basic block 6, registers live:
361 6 [bp] 7 [sp] 16 [argp] 20 [frame] 61
363 ;; Start of basic block 7, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 61
364 (code_label 47 46 48 7 6 "" [2 uses])
366 (note 48 47 49 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
368 (insn 49 48 52 7 (set (reg:SI 63 [ <result> ])
369 (reg:SI 61 [ D.16402 ])) 34 {*movsi_1} (nil)
370 (expr_list:REG_DEAD (reg:SI 61 [ D.16402 ])
373 (note 52 49 55 7 NOTE_INSN_FUNCTION_END)
375 (insn 55 52 61 7 (set (reg/i:SI 0 ax [ <result> ])
376 (reg:SI 63 [ <result> ])) 34 {*movsi_1} (nil)
377 (expr_list:REG_DEAD (reg:SI 63 [ <result> ])
380 (insn 61 55 0 7 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
382 ;; End of basic block 7, registers live:
383 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
386 ;; Function double GetRatesItemValue(const RateInfo*, int, int, int) (_Z17GetRatesItemValuePK8RateInfoiii@16)
392 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
393 Register 59 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
394 Register 60 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
395 Register 61 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:5000
396 Register 62 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
397 Register 63 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
398 Register 64 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
399 Register 65 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:5000
400 Register 66 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
401 Register 67 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
402 Register 68 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
403 Register 69 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:5000
404 Register 70 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
405 Register 71 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
406 Register 72 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
407 Register 73 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:5000
408 Register 74 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
409 Register 75 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
410 Register 76 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
411 Register 77 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:5000
412 Register 78 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
413 Register 79 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
414 Register 80 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
415 Register 81 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
416 Register 82 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:5000
417 Register 83 costs: AREG:2000 DREG:2000 CREG:2000 BREG:2000 SIREG:2000 DIREG:2000 AD_REGS:2000 Q_REGS:2000 NON_Q_REGS:2000 INDEX_REGS:2000 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:12000 INT_SSE_REGS:12000 FLOAT_INT_SSE_REGS:12000 ALL_REGS:12000 MEM:5000
418 Register 84 costs: AD_REGS:11000 Q_REGS:11000 NON_Q_REGS:11000 INDEX_REGS:11000 LEGACY_REGS:11000 GENERAL_REGS:11000 FP_TOP_REG:2000 FP_SECOND_REG:2000 FLOAT_REGS:2000 FP_TOP_SSE_REGS:110000 FP_SECOND_SSE_REGS:110000 FLOAT_SSE_REGS:110000 FLOAT_INT_REGS:110000 INT_SSE_REGS:110000 FLOAT_INT_SSE_REGS:110000 ALL_REGS:110000 MEM:47000
419 Register 85 costs: AD_REGS:9000 Q_REGS:9000 NON_Q_REGS:9000 INDEX_REGS:9000 LEGACY_REGS:9000 GENERAL_REGS:9000 FP_TOP_REG:-1000 FP_SECOND_REG:0 FLOAT_REGS:0 FP_TOP_SSE_REGS:18000 FP_SECOND_SSE_REGS:18000 FLOAT_SSE_REGS:18000 FLOAT_INT_REGS:27000 INT_SSE_REGS:27000 FLOAT_INT_SSE_REGS:27000 ALL_REGS:27000 MEM:5000
420 Register 86 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
421 Register 87 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
422 Register 88 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:2000 INDEX_REGS:0 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
423 Register 89 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
424 Register 90 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
425 Register 91 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:50000 INT_SSE_REGS:50000 FLOAT_INT_SSE_REGS:50000 ALL_REGS:50000 MEM:11000
426 Register 92 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
427 Register 93 costs: AD_REGS:2000 Q_REGS:2000 NON_Q_REGS:2000 INDEX_REGS:2000 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:10000
428 Register 94 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:50000 INT_SSE_REGS:50000 FLOAT_INT_SSE_REGS:50000 ALL_REGS:50000 MEM:11000
429 Register 95 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
430 Register 96 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:50000 INT_SSE_REGS:50000 FLOAT_INT_SSE_REGS:50000 ALL_REGS:50000 MEM:11000
431 Register 97 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
432 Register 98 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:50000 INT_SSE_REGS:50000 FLOAT_INT_SSE_REGS:50000 ALL_REGS:50000 MEM:11000
433 Register 99 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
434 Register 100 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:50000 INT_SSE_REGS:50000 FLOAT_INT_SSE_REGS:50000 ALL_REGS:50000 MEM:11000
435 Register 101 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
436 Register 102 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:50000 INT_SSE_REGS:50000 FLOAT_INT_SSE_REGS:50000 ALL_REGS:50000 MEM:11000
437 Register 103 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
439 Register 53 pref FLOAT_INT_SSE_REGS or none
440 Register 54 pref FLOAT_INT_SSE_REGS or none
441 Register 55 pref FLOAT_INT_SSE_REGS or none
442 Register 56 pref FLOAT_INT_SSE_REGS or none
443 Register 57 pref FLOAT_INT_SSE_REGS or none
444 Register 58 pref GENERAL_REGS or none
445 Register 59 pref GENERAL_REGS or none
446 Register 60 pref GENERAL_REGS or none
447 Register 61 pref GENERAL_REGS or none
448 Register 62 pref GENERAL_REGS or none
449 Register 63 pref GENERAL_REGS or none
450 Register 64 pref GENERAL_REGS or none
451 Register 65 pref GENERAL_REGS or none
452 Register 66 pref GENERAL_REGS or none
453 Register 67 pref GENERAL_REGS or none
454 Register 68 pref GENERAL_REGS or none
455 Register 69 pref GENERAL_REGS or none
456 Register 70 pref GENERAL_REGS or none
457 Register 71 pref GENERAL_REGS or none
458 Register 72 pref GENERAL_REGS or none
459 Register 73 pref GENERAL_REGS or none
460 Register 74 pref GENERAL_REGS or none
461 Register 75 pref GENERAL_REGS or none
462 Register 76 pref GENERAL_REGS or none
463 Register 77 pref GENERAL_REGS or none
464 Register 78 pref GENERAL_REGS or none
465 Register 79 pref GENERAL_REGS or none
466 Register 80 pref GENERAL_REGS or none
467 Register 81 pref GENERAL_REGS or none
468 Register 82 pref GENERAL_REGS or none
469 Register 83 pref GENERAL_REGS or none
470 Register 84 pref FLOAT_REGS, else FLOAT_INT_REGS
471 Register 85 pref FP_TOP_REG, else FLOAT_REGS
472 Register 86 pref GENERAL_REGS or none
473 Register 87 pref GENERAL_REGS or none
474 Register 88 pref INDEX_REGS, else GENERAL_REGS
475 Register 89 pref GENERAL_REGS or none
476 Register 90 pref GENERAL_REGS or none
477 Register 91 pref GENERAL_REGS or none
478 Register 92 pref GENERAL_REGS or none
479 Register 93 pref GENERAL_REGS or none
480 Register 94 pref GENERAL_REGS or none
481 Register 95 pref GENERAL_REGS or none
482 Register 96 pref GENERAL_REGS or none
483 Register 97 pref GENERAL_REGS or none
484 Register 98 pref GENERAL_REGS or none
485 Register 99 pref GENERAL_REGS or none
486 Register 100 pref GENERAL_REGS or none
487 Register 101 pref GENERAL_REGS or none
488 Register 102 pref GENERAL_REGS or none
489 Register 103 pref GENERAL_REGS or none
490 Register 104 pref FLOAT_INT_SSE_REGS or none
493 Register 58 used 2 times across 2 insns in block 19; set 1 time; GENERAL_REGS or none.
495 Register 59 used 2 times across 2 insns in block 19; set 1 time; GENERAL_REGS or none.
497 Register 60 used 2 times across 2 insns in block 19; set 1 time; GENERAL_REGS or none.
499 Register 61 used 4 times across 6 insns in block 19; set 1 time; GENERAL_REGS or none.
501 Register 62 used 2 times across 2 insns in block 18; set 1 time; GENERAL_REGS or none.
503 Register 63 used 2 times across 2 insns in block 18; set 1 time; GENERAL_REGS or none.
505 Register 64 used 2 times across 2 insns in block 18; set 1 time; GENERAL_REGS or none.
507 Register 65 used 4 times across 6 insns in block 18; set 1 time; GENERAL_REGS or none.
509 Register 66 used 2 times across 2 insns in block 17; set 1 time; GENERAL_REGS or none.
511 Register 67 used 2 times across 2 insns in block 17; set 1 time; GENERAL_REGS or none.
513 Register 68 used 2 times across 2 insns in block 17; set 1 time; GENERAL_REGS or none.
515 Register 69 used 4 times across 6 insns in block 17; set 1 time; GENERAL_REGS or none.
517 Register 70 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
519 Register 71 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
521 Register 72 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
523 Register 73 used 4 times across 6 insns in block 16; set 1 time; GENERAL_REGS or none.
525 Register 74 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
527 Register 75 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
529 Register 76 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
531 Register 77 used 4 times across 6 insns in block 15; set 1 time; GENERAL_REGS or none.
533 Register 78 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
535 Register 79 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none; pointer.
537 Register 80 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
539 Register 81 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
541 Register 82 used 4 times across 6 insns in block 14; set 1 time; GENERAL_REGS or none.
543 Register 83 used 2 times across 2 insns in block 12; set 1 time; GENERAL_REGS or none.
545 Register 84 used 12 times across 22 insns; set 11 times; 8 bytes; pref FLOAT_REGS, else FLOAT_INT_REGS.
547 Register 85 used 2 times across 2 insns in block 21; set 1 time; 8 bytes; pref FP_TOP_REG, else FLOAT_REGS.
549 Register 86 used 2 times across 2 insns in block 7; set 1 time; GENERAL_REGS or none.
551 Register 87 used 2 times across 2 insns in block 12; set 1 time; GENERAL_REGS or none.
553 Register 88 used 2 times across 2 insns in block 13; set 1 time; pref INDEX_REGS, else GENERAL_REGS.
555 Register 89 used 2 times across 2 insns in block 13; set 1 time; GENERAL_REGS or none.
557 Register 90 used 2 times across 2 insns in block 13; set 1 time; GENERAL_REGS or none.
559 Register 91 used 10 times across 10 insns in block 14; set 5 times; GENERAL_REGS or none.
561 Register 92 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
563 Register 93 used 2 times across 2 insns in block 14; set 1 time; 8 bytes; GENERAL_REGS or none.
565 Register 94 used 10 times across 10 insns in block 15; set 5 times; GENERAL_REGS or none.
567 Register 95 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
569 Register 96 used 10 times across 10 insns in block 16; set 5 times; GENERAL_REGS or none.
571 Register 97 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
573 Register 98 used 10 times across 10 insns in block 17; set 5 times; GENERAL_REGS or none.
575 Register 99 used 2 times across 2 insns in block 17; set 1 time; GENERAL_REGS or none.
577 Register 100 used 10 times across 10 insns in block 18; set 5 times; GENERAL_REGS or none.
579 Register 101 used 2 times across 2 insns in block 18; set 1 time; GENERAL_REGS or none.
581 Register 102 used 10 times across 10 insns in block 19; set 5 times; GENERAL_REGS or none.
583 Register 103 used 2 times across 2 insns in block 19; set 1 time; GENERAL_REGS or none.
585 22 basic blocks, 33 edges.
587 Basic block 2 , prev 0, next 3, loop_depth 0, count 0, freq 0.
588 Predecessors: ENTRY (fallthru)
589 Successors: 3 (fallthru) 4
590 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
591 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
593 Basic block 3 , prev 2, next 4, loop_depth 0, count 0, freq 0.
594 Predecessors: 2 (fallthru)
596 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
597 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
599 Basic block 4 , prev 3, next 5, loop_depth 0, count 0, freq 0.
601 Successors: 5 (fallthru) 6
602 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
603 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
605 Basic block 5 , prev 4, next 6, loop_depth 0, count 0, freq 0.
606 Predecessors: 4 (fallthru)
608 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
609 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
611 Basic block 6 , prev 5, next 7, loop_depth 0, count 0, freq 0.
613 Successors: 8 7 (fallthru)
614 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
615 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
617 Basic block 7 , prev 6, next 8, loop_depth 0, count 0, freq 0.
618 Predecessors: 6 (fallthru)
619 Successors: 8 (fallthru) 9
620 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
621 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
623 Basic block 8 , prev 7, next 9, loop_depth 0, count 0, freq 0.
624 Predecessors: 6 7 (fallthru)
626 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
627 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
629 Basic block 9 , prev 8, next 10, loop_depth 0, count 0, freq 0.
631 Successors: 11 10 (fallthru)
632 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
633 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
635 Basic block 10 , prev 9, next 11, loop_depth 0, count 0, freq 0.
636 Predecessors: 9 (fallthru)
637 Successors: 11 (fallthru) 12
638 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
639 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
641 Basic block 11 , prev 10, next 12, loop_depth 0, count 0, freq 0.
642 Predecessors: 9 10 (fallthru)
644 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
645 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
647 Basic block 12 , prev 11, next 13, loop_depth 0, count 0, freq 0.
649 Successors: 20 13 (fallthru)
650 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
651 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
653 Basic block 13 , prev 12, next 14, loop_depth 0, count 0, freq 0.
654 Predecessors: 12 (fallthru)
655 Successors: 14 15 16 17 18 19
656 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
657 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
659 Basic block 14 , prev 13, next 15, loop_depth 0, count 0, freq 0.
662 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
663 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
665 Basic block 15 , prev 14, next 16, loop_depth 0, count 0, freq 0.
668 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
669 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
671 Basic block 16 , prev 15, next 17, loop_depth 0, count 0, freq 0.
674 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
675 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
677 Basic block 17 , prev 16, next 18, loop_depth 0, count 0, freq 0.
680 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
681 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
683 Basic block 18 , prev 17, next 19, loop_depth 0, count 0, freq 0.
686 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
687 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
689 Basic block 19 , prev 18, next 20, loop_depth 0, count 0, freq 0.
692 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
693 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
695 Basic block 20 , prev 19, next 21, loop_depth 0, count 0, freq 0.
697 Successors: 21 (fallthru)
698 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
699 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
701 Basic block 21 , prev 20, next 1, loop_depth 0, count 0, freq 0.
702 Predecessors: 3 5 8 11 14 15 16 17 18 19 20 (fallthru)
703 Successors: EXIT [100.0%] (fallthru)
704 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
705 Registers live at end: 6 [bp] 7 [sp] 8 [st] 16 [argp] 20 [frame]
748 ;; Register 100 in 0.
749 ;; Register 101 in 0.
750 ;; Register 102 in 0.
751 ;; Register 103 in 0.
752 (note 2 0 3 NOTE_INSN_DELETED)
754 (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
756 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
757 (note 5 3 7 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
759 (insn 7 5 8 2 (set (reg:CCZ 17 flags)
760 (compare:CCZ (mem/c/i:SI (reg/f:SI 16 argp) [0 rates+0 S4 A32])
761 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
764 (jump_insn 8 7 10 2 (set (pc)
765 (if_then_else (ne (reg:CCZ 17 flags)
768 (pc))) 365 {*jcc_1} (nil)
769 (expr_list:REG_DEAD (reg:CCZ 17 flags)
771 ;; End of basic block 2, registers live:
772 6 [bp] 7 [sp] 16 [argp] 20 [frame]
774 ;; Start of basic block 3, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
775 (note 10 8 12 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
777 (insn 12 10 13 3 (parallel [
779 (plus:SI (reg/f:SI 7 sp)
780 (const_int -12 [0xfffffff4])))
781 (clobber (reg:CC 17 flags))
782 ]) 148 {*addsi_1} (nil)
783 (expr_list:REG_UNUSED (reg:CC 17 flags)
786 (insn 13 12 14 3 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
787 (symbol_ref/f:SI ("*LC0") [flags 0x2] <string_cst 0xb6b20444>)) 28 {*pushsi2} (nil)
790 (call_insn 14 13 15 3 (set (reg:SI 0 ax)
791 (call (mem:QI (symbol_ref:SI ("puts") [flags 0x41] <function_decl 0xb72e5d20 __builtin_puts>) [0 S1 A8])
792 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
793 (expr_list:REG_UNUSED (reg:SI 0 ax)
797 (insn 15 14 17 3 (parallel [
799 (plus:SI (reg/f:SI 7 sp)
800 (const_int 16 [0x10])))
801 (clobber (reg:CC 17 flags))
802 ]) 148 {*addsi_1} (nil)
803 (expr_list:REG_UNUSED (reg:CC 17 flags)
806 (insn 17 15 18 3 (set (reg:DF 84 [ D.16291 ])
807 (mem/u/c/i:DF (symbol_ref/u:SI ("*LC1") [flags 0x2]) [0 S8 A64])) 64 {*movdf_integer} (nil)
808 (expr_list:REG_EQUAL (const_double:DF 0 [0x0] 0.0 [0x0.0p+0])
811 (jump_insn 18 17 19 3 (set (pc)
812 (label_ref 199)) 380 {jump} (nil)
814 ;; End of basic block 3, registers live:
815 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
819 ;; Start of basic block 4, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
820 (code_label 20 19 21 4 11 "" [1 uses])
822 (note 21 20 23 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
824 (insn 23 21 24 4 (set (reg:CCGOC 17 flags)
825 (compare:CCGOC (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
826 (const_int 4 [0x4])) [0 rates_total+0 S4 A32])
827 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
830 (jump_insn 24 23 26 4 (set (pc)
831 (if_then_else (ge (reg:CCGOC 17 flags)
834 (pc))) 365 {*jcc_1} (nil)
835 (expr_list:REG_DEAD (reg:CCGOC 17 flags)
837 ;; End of basic block 4, registers live:
838 6 [bp] 7 [sp] 16 [argp] 20 [frame]
840 ;; Start of basic block 5, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
841 (note 26 24 28 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
843 (insn 28 26 29 5 (parallel [
845 (plus:SI (reg/f:SI 7 sp)
846 (const_int -8 [0xfffffff8])))
847 (clobber (reg:CC 17 flags))
848 ]) 148 {*addsi_1} (nil)
849 (expr_list:REG_UNUSED (reg:CC 17 flags)
852 (insn 29 28 30 5 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
853 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
854 (const_int 4 [0x4])) [0 rates_total+0 S4 A32])) 28 {*pushsi2} (nil)
857 (insn 30 29 31 5 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
858 (symbol_ref/f:SI ("*LC2") [flags 0x2] <string_cst 0xb6b23ea0>)) 28 {*pushsi2} (nil)
861 (call_insn 31 30 32 5 (set (reg:SI 0 ax)
862 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
863 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
864 (expr_list:REG_UNUSED (reg:SI 0 ax)
865 (expr_list:REG_EH_REGION (const_int 0 [0x0])
869 (insn 32 31 34 5 (parallel [
871 (plus:SI (reg/f:SI 7 sp)
872 (const_int 16 [0x10])))
873 (clobber (reg:CC 17 flags))
874 ]) 148 {*addsi_1} (nil)
875 (expr_list:REG_UNUSED (reg:CC 17 flags)
878 (insn 34 32 35 5 (set (reg:DF 84 [ D.16291 ])
879 (mem/u/c/i:DF (symbol_ref/u:SI ("*LC1") [flags 0x2]) [0 S8 A64])) 64 {*movdf_integer} (nil)
880 (expr_list:REG_EQUAL (const_double:DF 0 [0x0] 0.0 [0x0.0p+0])
883 (jump_insn 35 34 36 5 (set (pc)
884 (label_ref 199)) 380 {jump} (nil)
886 ;; End of basic block 5, registers live:
887 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
891 ;; Start of basic block 6, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
892 (code_label 37 36 38 6 14 "" [1 uses])
894 (note 38 37 40 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
896 (insn 40 38 41 6 (set (reg:CCGOC 17 flags)
897 (compare:CCGOC (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
898 (const_int 8 [0x8])) [0 shift+0 S4 A32])
899 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
902 (jump_insn 41 40 43 6 (set (pc)
903 (if_then_else (lt (reg:CCGOC 17 flags)
906 (pc))) 365 {*jcc_1} (nil)
907 (expr_list:REG_DEAD (reg:CCGOC 17 flags)
909 ;; End of basic block 6, registers live:
910 6 [bp] 7 [sp] 16 [argp] 20 [frame]
912 ;; Start of basic block 7, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
913 (note 43 41 44 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
915 (insn 44 43 45 7 (set (reg:SI 86 [ shift ])
916 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
917 (const_int 8 [0x8])) [0 shift+0 S4 A32])) 34 {*movsi_1} (nil)
920 (insn 45 44 46 7 (set (reg:CCGC 17 flags)
921 (compare:CCGC (reg:SI 86 [ shift ])
922 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
923 (const_int 4 [0x4])) [0 rates_total+0 S4 A32]))) 2 {*cmpsi_1_insn} (nil)
924 (expr_list:REG_DEAD (reg:SI 86 [ shift ])
927 (jump_insn 46 45 47 7 (set (pc)
928 (if_then_else (lt (reg:CCGC 17 flags)
931 (pc))) 365 {*jcc_1} (nil)
932 (expr_list:REG_DEAD (reg:CCGC 17 flags)
934 ;; End of basic block 7, registers live:
935 6 [bp] 7 [sp] 16 [argp] 20 [frame]
937 ;; Start of basic block 8, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
938 (code_label 47 46 48 8 16 "" [1 uses])
940 (note 48 47 50 8 [bb 8] NOTE_INSN_BASIC_BLOCK)
942 (insn 50 48 51 8 (parallel [
944 (plus:SI (reg/f:SI 7 sp)
945 (const_int -8 [0xfffffff8])))
946 (clobber (reg:CC 17 flags))
947 ]) 148 {*addsi_1} (nil)
948 (expr_list:REG_UNUSED (reg:CC 17 flags)
951 (insn 51 50 52 8 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
952 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
953 (const_int 8 [0x8])) [0 shift+0 S4 A32])) 28 {*pushsi2} (nil)
956 (insn 52 51 53 8 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
957 (symbol_ref/f:SI ("*LC3") [flags 0x2] <string_cst 0xb6b23ee8>)) 28 {*pushsi2} (nil)
960 (call_insn 53 52 54 8 (set (reg:SI 0 ax)
961 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
962 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
963 (expr_list:REG_UNUSED (reg:SI 0 ax)
964 (expr_list:REG_EH_REGION (const_int 0 [0x0])
968 (insn 54 53 56 8 (parallel [
970 (plus:SI (reg/f:SI 7 sp)
971 (const_int 16 [0x10])))
972 (clobber (reg:CC 17 flags))
973 ]) 148 {*addsi_1} (nil)
974 (expr_list:REG_UNUSED (reg:CC 17 flags)
977 (insn 56 54 57 8 (set (reg:DF 84 [ D.16291 ])
978 (mem/u/c/i:DF (symbol_ref/u:SI ("*LC1") [flags 0x2]) [0 S8 A64])) 64 {*movdf_integer} (nil)
979 (expr_list:REG_EQUAL (const_double:DF 0 [0x0] 0.0 [0x0.0p+0])
982 (jump_insn 57 56 58 8 (set (pc)
983 (label_ref 199)) 380 {jump} (nil)
985 ;; End of basic block 8, registers live:
986 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
990 ;; Start of basic block 9, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
991 (code_label 59 58 60 9 18 "" [1 uses])
993 (note 60 59 62 9 [bb 9] NOTE_INSN_BASIC_BLOCK)
995 (insn 62 60 63 9 (set (reg:CCGOC 17 flags)
996 (compare:CCGOC (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
997 (const_int 12 [0xc])) [0 nrate+0 S4 A32])
998 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
1001 (jump_insn 63 62 65 9 (set (pc)
1002 (if_then_else (lt (reg:CCGOC 17 flags)
1003 (const_int 0 [0x0]))
1005 (pc))) 365 {*jcc_1} (nil)
1006 (expr_list:REG_DEAD (reg:CCGOC 17 flags)
1008 ;; End of basic block 9, registers live:
1009 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1011 ;; Start of basic block 10, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1012 (note 65 63 66 10 [bb 10] NOTE_INSN_BASIC_BLOCK)
1014 (insn 66 65 67 10 (set (reg:CCGC 17 flags)
1015 (compare:CCGC (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1016 (const_int 12 [0xc])) [0 nrate+0 S4 A32])
1017 (const_int 5 [0x5]))) 2 {*cmpsi_1_insn} (nil)
1020 (jump_insn 67 66 68 10 (set (pc)
1021 (if_then_else (le (reg:CCGC 17 flags)
1022 (const_int 0 [0x0]))
1024 (pc))) 365 {*jcc_1} (nil)
1025 (expr_list:REG_DEAD (reg:CCGC 17 flags)
1027 ;; End of basic block 10, registers live:
1028 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1030 ;; Start of basic block 11, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1031 (code_label 68 67 69 11 19 "" [1 uses])
1033 (note 69 68 71 11 [bb 11] NOTE_INSN_BASIC_BLOCK)
1035 (insn 71 69 72 11 (parallel [
1036 (set (reg/f:SI 7 sp)
1037 (plus:SI (reg/f:SI 7 sp)
1038 (const_int -8 [0xfffffff8])))
1039 (clobber (reg:CC 17 flags))
1040 ]) 148 {*addsi_1} (nil)
1041 (expr_list:REG_UNUSED (reg:CC 17 flags)
1044 (insn 72 71 73 11 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
1045 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1046 (const_int 12 [0xc])) [0 nrate+0 S4 A32])) 28 {*pushsi2} (nil)
1049 (insn 73 72 74 11 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
1050 (symbol_ref/f:SI ("*LC4") [flags 0x2] <string_cst 0xb6abfe00>)) 28 {*pushsi2} (nil)
1053 (call_insn 74 73 75 11 (set (reg:SI 0 ax)
1054 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
1055 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
1056 (expr_list:REG_UNUSED (reg:SI 0 ax)
1057 (expr_list:REG_EH_REGION (const_int 0 [0x0])
1061 (insn 75 74 77 11 (parallel [
1062 (set (reg/f:SI 7 sp)
1063 (plus:SI (reg/f:SI 7 sp)
1064 (const_int 16 [0x10])))
1065 (clobber (reg:CC 17 flags))
1066 ]) 148 {*addsi_1} (nil)
1067 (expr_list:REG_UNUSED (reg:CC 17 flags)
1070 (insn 77 75 78 11 (set (reg:DF 84 [ D.16291 ])
1071 (mem/u/c/i:DF (symbol_ref/u:SI ("*LC1") [flags 0x2]) [0 S8 A64])) 64 {*movdf_integer} (nil)
1072 (expr_list:REG_EQUAL (const_double:DF 0 [0x0] 0.0 [0x0.0p+0])
1075 (jump_insn 78 77 79 11 (set (pc)
1076 (label_ref 199)) 380 {jump} (nil)
1078 ;; End of basic block 11, registers live:
1079 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1083 ;; Start of basic block 12, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1084 (code_label 80 79 81 12 21 "" [1 uses])
1086 (note 81 80 83 12 [bb 12] NOTE_INSN_BASIC_BLOCK)
1088 (insn 83 81 84 12 (parallel [
1089 (set (reg:SI 83 [ D.16296 ])
1090 (plus:SI (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1091 (const_int 4 [0x4])) [0 rates_total+0 S4 A32])
1092 (const_int -1 [0xffffffff])))
1093 (clobber (reg:CC 17 flags))
1094 ]) 148 {*addsi_1} (nil)
1095 (expr_list:REG_UNUSED (reg:CC 17 flags)
1098 (insn 84 83 85 12 (parallel [
1100 (minus:SI (reg:SI 83 [ D.16296 ])
1101 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1102 (const_int 8 [0x8])) [0 shift+0 S4 A32])))
1103 (clobber (reg:CC 17 flags))
1104 ]) 172 {*subsi_1} (nil)
1105 (expr_list:REG_DEAD (reg:SI 83 [ D.16296 ])
1106 (expr_list:REG_UNUSED (reg:CC 17 flags)
1109 (insn 85 84 87 12 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1110 (const_int -4 [0xfffffffc])) [0 nitem+0 S4 A32])
1111 (reg:SI 87)) 34 {*movsi_1} (nil)
1112 (expr_list:REG_DEAD (reg:SI 87)
1113 (expr_list:REG_EQUAL (minus:SI (reg:SI 83 [ D.16296 ])
1114 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1115 (const_int 8 [0x8])) [0 shift+0 S4 A32]))
1118 (insn 87 85 88 12 (set (reg:CC 17 flags)
1119 (compare:CC (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1120 (const_int 12 [0xc])) [0 nrate+0 S4 A32])
1121 (const_int 5 [0x5]))) 2 {*cmpsi_1_insn} (nil)
1124 (jump_insn 88 87 215 12 (set (pc)
1125 (if_then_else (gtu (reg:CC 17 flags)
1126 (const_int 0 [0x0]))
1128 (pc))) 365 {*jcc_1} (nil)
1129 (expr_list:REG_DEAD (reg:CC 17 flags)
1131 ;; End of basic block 12, registers live:
1132 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1134 ;; Start of basic block 13, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1135 (note 215 88 89 13 [bb 13] NOTE_INSN_BASIC_BLOCK)
1137 (insn 89 215 90 13 (set (reg:SI 89 [ nrate ])
1138 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1139 (const_int 12 [0xc])) [0 nrate+0 S4 A32])) 34 {*movsi_1} (nil)
1142 (insn 90 89 91 13 (parallel [
1144 (ashift:SI (reg:SI 89 [ nrate ])
1145 (const_int 2 [0x2])))
1146 (clobber (reg:CC 17 flags))
1147 ]) 288 {*ashlsi3_1} (nil)
1148 (expr_list:REG_DEAD (reg:SI 89 [ nrate ])
1149 (expr_list:REG_UNUSED (reg:CC 17 flags)
1150 (expr_list:REG_EQUAL (ashift:SI (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1151 (const_int 12 [0xc])) [0 nrate+0 S4 A32])
1152 (const_int 2 [0x2]))
1155 (insn 91 90 92 13 (set (reg:SI 90)
1156 (mem/u/c:SI (plus:SI (reg:SI 88)
1157 (label_ref:SI 94)) [0 S4 A8])) 34 {*movsi_1} (nil)
1158 (expr_list:REG_DEAD (reg:SI 88)
1159 (insn_list:REG_LABEL 94 (nil))))
1161 (jump_insn 92 91 93 13 (parallel [
1164 (use (label_ref 94))
1165 ]) 382 {*tablejump_1} (nil)
1166 (expr_list:REG_DEAD (reg:SI 90)
1168 ;; End of basic block 13, registers live:
1169 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1173 ;; Insn is not within a basic block
1174 (code_label 94 93 95 29 "" [2 uses])
1176 ;; Insn is not within a basic block
1177 (jump_insn 95 94 96 (addr_vec:SI [
1189 ;; Start of basic block 14, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1190 (code_label 97 96 98 14 23 "" [1 uses])
1192 (note 98 97 100 14 [bb 14] NOTE_INSN_BASIC_BLOCK)
1194 (insn 100 98 101 14 (set (reg:SI 82 [ nitem.7 ])
1195 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1196 (const_int -4 [0xfffffffc])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
1199 (insn 101 100 102 14 (set (reg:SI 91 [ nitem.7 ])
1200 (reg:SI 82 [ nitem.7 ])) 34 {*movsi_1} (nil)
1203 (insn 102 101 103 14 (parallel [
1204 (set (reg:SI 91 [ nitem.7 ])
1205 (ashift:SI (reg:SI 91 [ nitem.7 ])
1206 (const_int 2 [0x2])))
1207 (clobber (reg:CC 17 flags))
1208 ]) 288 {*ashlsi3_1} (nil)
1209 (expr_list:REG_UNUSED (reg:CC 17 flags)
1212 (insn 103 102 104 14 (parallel [
1213 (set (reg:SI 91 [ nitem.7 ])
1214 (plus:SI (reg:SI 91 [ nitem.7 ])
1215 (reg:SI 82 [ nitem.7 ])))
1216 (clobber (reg:CC 17 flags))
1217 ]) 148 {*addsi_1} (nil)
1218 (expr_list:REG_UNUSED (reg:CC 17 flags)
1219 (expr_list:REG_EQUAL (mult:SI (reg:SI 82 [ nitem.7 ])
1220 (const_int 5 [0x5]))
1223 (insn 104 103 105 14 (parallel [
1224 (set (reg:SI 91 [ nitem.7 ])
1225 (ashift:SI (reg:SI 91 [ nitem.7 ])
1226 (const_int 1 [0x1])))
1227 (clobber (reg:CC 17 flags))
1228 ]) 288 {*ashlsi3_1} (nil)
1229 (expr_list:REG_UNUSED (reg:CC 17 flags)
1232 (insn 105 104 106 14 (parallel [
1233 (set (reg:SI 91 [ nitem.7 ])
1234 (plus:SI (reg:SI 91 [ nitem.7 ])
1235 (reg:SI 82 [ nitem.7 ])))
1236 (clobber (reg:CC 17 flags))
1237 ]) 148 {*addsi_1} (nil)
1238 (expr_list:REG_DEAD (reg:SI 82 [ nitem.7 ])
1239 (expr_list:REG_UNUSED (reg:CC 17 flags)
1240 (expr_list:REG_EQUAL (mult:SI (reg:SI 82 [ nitem.7 ])
1241 (const_int 11 [0xb]))
1244 (insn 106 105 107 14 (parallel [
1246 (ashift:SI (reg:SI 91 [ nitem.7 ])
1247 (const_int 2 [0x2])))
1248 (clobber (reg:CC 17 flags))
1249 ]) 288 {*ashlsi3_1} (nil)
1250 (expr_list:REG_DEAD (reg:SI 91 [ nitem.7 ])
1251 (expr_list:REG_UNUSED (reg:CC 17 flags)
1252 (expr_list:REG_EQUAL (mult:SI (reg:SI 82 [ nitem.7 ])
1253 (const_int 44 [0x2c]))
1256 (insn 107 106 108 14 (set (reg:SI 81 [ D.16299 ])
1257 (reg:SI 92)) 34 {*movsi_1} (nil)
1258 (expr_list:REG_DEAD (reg:SI 92)
1261 (insn 108 107 109 14 (set (reg:SI 80 [ D.16300 ])
1262 (reg:SI 81 [ D.16299 ])) 34 {*movsi_1} (nil)
1263 (expr_list:REG_DEAD (reg:SI 81 [ D.16299 ])
1266 (insn 109 108 110 14 (parallel [
1267 (set (reg/f:SI 79 [ D.16301 ])
1268 (plus:SI (reg:SI 80 [ D.16300 ])
1269 (mem/c/i:SI (reg/f:SI 16 argp) [0 rates+0 S4 A32])))
1270 (clobber (reg:CC 17 flags))
1271 ]) 148 {*addsi_1} (nil)
1272 (expr_list:REG_DEAD (reg:SI 80 [ D.16300 ])
1273 (expr_list:REG_UNUSED (reg:CC 17 flags)
1276 (insn 110 109 111 14 (set (reg:SI 78 [ D.16302 ])
1277 (mem/s/j:SI (reg/f:SI 79 [ D.16301 ]) [0 <variable>.ctm+0 S4 A8])) 34 {*movsi_1} (nil)
1278 (expr_list:REG_DEAD (reg/f:SI 79 [ D.16301 ])
1281 (insn 111 110 112 14 (parallel [
1282 (set (reg:DI 93 [ D.16302 ])
1283 (zero_extend:DI (reg:SI 78 [ D.16302 ])))
1284 (clobber (reg:CC 17 flags))
1285 ]) 79 {zero_extendsidi2_32} (nil)
1286 (expr_list:REG_DEAD (reg:SI 78 [ D.16302 ])
1287 (expr_list:REG_UNUSED (reg:CC 17 flags)
1290 (insn 112 111 113 14 (set (reg:DF 84 [ D.16291 ])
1291 (float:DF (reg:DI 93 [ D.16302 ]))) 134 {*floatdidf2_i387} (nil)
1292 (expr_list:REG_DEAD (reg:DI 93 [ D.16302 ])
1295 (jump_insn 113 112 114 14 (set (pc)
1296 (label_ref 199)) 380 {jump} (nil)
1298 ;; End of basic block 14, registers live:
1299 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1301 (barrier 114 113 115)
1303 ;; Start of basic block 15, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1304 (code_label 115 114 116 15 24 "" [1 uses])
1306 (note 116 115 118 15 [bb 15] NOTE_INSN_BASIC_BLOCK)
1308 (insn 118 116 119 15 (set (reg:SI 77 [ nitem.8 ])
1309 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1310 (const_int -4 [0xfffffffc])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
1313 (insn 119 118 120 15 (set (reg:SI 94 [ nitem.8 ])
1314 (reg:SI 77 [ nitem.8 ])) 34 {*movsi_1} (nil)
1317 (insn 120 119 121 15 (parallel [
1318 (set (reg:SI 94 [ nitem.8 ])
1319 (ashift:SI (reg:SI 94 [ nitem.8 ])
1320 (const_int 2 [0x2])))
1321 (clobber (reg:CC 17 flags))
1322 ]) 288 {*ashlsi3_1} (nil)
1323 (expr_list:REG_UNUSED (reg:CC 17 flags)
1326 (insn 121 120 122 15 (parallel [
1327 (set (reg:SI 94 [ nitem.8 ])
1328 (plus:SI (reg:SI 94 [ nitem.8 ])
1329 (reg:SI 77 [ nitem.8 ])))
1330 (clobber (reg:CC 17 flags))
1331 ]) 148 {*addsi_1} (nil)
1332 (expr_list:REG_UNUSED (reg:CC 17 flags)
1333 (expr_list:REG_EQUAL (mult:SI (reg:SI 77 [ nitem.8 ])
1334 (const_int 5 [0x5]))
1337 (insn 122 121 123 15 (parallel [
1338 (set (reg:SI 94 [ nitem.8 ])
1339 (ashift:SI (reg:SI 94 [ nitem.8 ])
1340 (const_int 1 [0x1])))
1341 (clobber (reg:CC 17 flags))
1342 ]) 288 {*ashlsi3_1} (nil)
1343 (expr_list:REG_UNUSED (reg:CC 17 flags)
1346 (insn 123 122 124 15 (parallel [
1347 (set (reg:SI 94 [ nitem.8 ])
1348 (plus:SI (reg:SI 94 [ nitem.8 ])
1349 (reg:SI 77 [ nitem.8 ])))
1350 (clobber (reg:CC 17 flags))
1351 ]) 148 {*addsi_1} (nil)
1352 (expr_list:REG_DEAD (reg:SI 77 [ nitem.8 ])
1353 (expr_list:REG_UNUSED (reg:CC 17 flags)
1354 (expr_list:REG_EQUAL (mult:SI (reg:SI 77 [ nitem.8 ])
1355 (const_int 11 [0xb]))
1358 (insn 124 123 125 15 (parallel [
1360 (ashift:SI (reg:SI 94 [ nitem.8 ])
1361 (const_int 2 [0x2])))
1362 (clobber (reg:CC 17 flags))
1363 ]) 288 {*ashlsi3_1} (nil)
1364 (expr_list:REG_DEAD (reg:SI 94 [ nitem.8 ])
1365 (expr_list:REG_UNUSED (reg:CC 17 flags)
1366 (expr_list:REG_EQUAL (mult:SI (reg:SI 77 [ nitem.8 ])
1367 (const_int 44 [0x2c]))
1370 (insn 125 124 126 15 (set (reg:SI 76 [ D.16304 ])
1371 (reg:SI 95)) 34 {*movsi_1} (nil)
1372 (expr_list:REG_DEAD (reg:SI 95)
1375 (insn 126 125 127 15 (set (reg:SI 75 [ D.16305 ])
1376 (reg:SI 76 [ D.16304 ])) 34 {*movsi_1} (nil)
1377 (expr_list:REG_DEAD (reg:SI 76 [ D.16304 ])
1380 (insn 127 126 128 15 (parallel [
1381 (set (reg:SI 74 [ D.16306 ])
1382 (plus:SI (reg:SI 75 [ D.16305 ])
1383 (mem/c/i:SI (reg/f:SI 16 argp) [0 rates+0 S4 A32])))
1384 (clobber (reg:CC 17 flags))
1385 ]) 148 {*addsi_1} (nil)
1386 (expr_list:REG_DEAD (reg:SI 75 [ D.16305 ])
1387 (expr_list:REG_UNUSED (reg:CC 17 flags)
1390 (insn 128 127 129 15 (set (reg:DF 84 [ D.16291 ])
1391 (mem/s/j:DF (plus:SI (reg:SI 74 [ D.16306 ])
1392 (const_int 4 [0x4])) [0 <variable>.open+0 S8 A8])) 64 {*movdf_integer} (nil)
1393 (expr_list:REG_DEAD (reg:SI 74 [ D.16306 ])
1396 (jump_insn 129 128 130 15 (set (pc)
1397 (label_ref 199)) 380 {jump} (nil)
1399 ;; End of basic block 15, registers live:
1400 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1402 (barrier 130 129 131)
1404 ;; Start of basic block 16, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1405 (code_label 131 130 132 16 25 "" [1 uses])
1407 (note 132 131 134 16 [bb 16] NOTE_INSN_BASIC_BLOCK)
1409 (insn 134 132 135 16 (set (reg:SI 73 [ nitem.9 ])
1410 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1411 (const_int -4 [0xfffffffc])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
1414 (insn 135 134 136 16 (set (reg:SI 96 [ nitem.9 ])
1415 (reg:SI 73 [ nitem.9 ])) 34 {*movsi_1} (nil)
1418 (insn 136 135 137 16 (parallel [
1419 (set (reg:SI 96 [ nitem.9 ])
1420 (ashift:SI (reg:SI 96 [ nitem.9 ])
1421 (const_int 2 [0x2])))
1422 (clobber (reg:CC 17 flags))
1423 ]) 288 {*ashlsi3_1} (nil)
1424 (expr_list:REG_UNUSED (reg:CC 17 flags)
1427 (insn 137 136 138 16 (parallel [
1428 (set (reg:SI 96 [ nitem.9 ])
1429 (plus:SI (reg:SI 96 [ nitem.9 ])
1430 (reg:SI 73 [ nitem.9 ])))
1431 (clobber (reg:CC 17 flags))
1432 ]) 148 {*addsi_1} (nil)
1433 (expr_list:REG_UNUSED (reg:CC 17 flags)
1434 (expr_list:REG_EQUAL (mult:SI (reg:SI 73 [ nitem.9 ])
1435 (const_int 5 [0x5]))
1438 (insn 138 137 139 16 (parallel [
1439 (set (reg:SI 96 [ nitem.9 ])
1440 (ashift:SI (reg:SI 96 [ nitem.9 ])
1441 (const_int 1 [0x1])))
1442 (clobber (reg:CC 17 flags))
1443 ]) 288 {*ashlsi3_1} (nil)
1444 (expr_list:REG_UNUSED (reg:CC 17 flags)
1447 (insn 139 138 140 16 (parallel [
1448 (set (reg:SI 96 [ nitem.9 ])
1449 (plus:SI (reg:SI 96 [ nitem.9 ])
1450 (reg:SI 73 [ nitem.9 ])))
1451 (clobber (reg:CC 17 flags))
1452 ]) 148 {*addsi_1} (nil)
1453 (expr_list:REG_DEAD (reg:SI 73 [ nitem.9 ])
1454 (expr_list:REG_UNUSED (reg:CC 17 flags)
1455 (expr_list:REG_EQUAL (mult:SI (reg:SI 73 [ nitem.9 ])
1456 (const_int 11 [0xb]))
1459 (insn 140 139 141 16 (parallel [
1461 (ashift:SI (reg:SI 96 [ nitem.9 ])
1462 (const_int 2 [0x2])))
1463 (clobber (reg:CC 17 flags))
1464 ]) 288 {*ashlsi3_1} (nil)
1465 (expr_list:REG_DEAD (reg:SI 96 [ nitem.9 ])
1466 (expr_list:REG_UNUSED (reg:CC 17 flags)
1467 (expr_list:REG_EQUAL (mult:SI (reg:SI 73 [ nitem.9 ])
1468 (const_int 44 [0x2c]))
1471 (insn 141 140 142 16 (set (reg:SI 72 [ D.16308 ])
1472 (reg:SI 97)) 34 {*movsi_1} (nil)
1473 (expr_list:REG_DEAD (reg:SI 97)
1476 (insn 142 141 143 16 (set (reg:SI 71 [ D.16309 ])
1477 (reg:SI 72 [ D.16308 ])) 34 {*movsi_1} (nil)
1478 (expr_list:REG_DEAD (reg:SI 72 [ D.16308 ])
1481 (insn 143 142 144 16 (parallel [
1482 (set (reg:SI 70 [ D.16310 ])
1483 (plus:SI (reg:SI 71 [ D.16309 ])
1484 (mem/c/i:SI (reg/f:SI 16 argp) [0 rates+0 S4 A32])))
1485 (clobber (reg:CC 17 flags))
1486 ]) 148 {*addsi_1} (nil)
1487 (expr_list:REG_DEAD (reg:SI 71 [ D.16309 ])
1488 (expr_list:REG_UNUSED (reg:CC 17 flags)
1491 (insn 144 143 145 16 (set (reg:DF 84 [ D.16291 ])
1492 (mem/s/j:DF (plus:SI (reg:SI 70 [ D.16310 ])
1493 (const_int 12 [0xc])) [0 <variable>.low+0 S8 A8])) 64 {*movdf_integer} (nil)
1494 (expr_list:REG_DEAD (reg:SI 70 [ D.16310 ])
1497 (jump_insn 145 144 146 16 (set (pc)
1498 (label_ref 199)) 380 {jump} (nil)
1500 ;; End of basic block 16, registers live:
1501 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1503 (barrier 146 145 147)
1505 ;; Start of basic block 17, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1506 (code_label 147 146 148 17 26 "" [1 uses])
1508 (note 148 147 150 17 [bb 17] NOTE_INSN_BASIC_BLOCK)
1510 (insn 150 148 151 17 (set (reg:SI 69 [ nitem.10 ])
1511 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1512 (const_int -4 [0xfffffffc])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
1515 (insn 151 150 152 17 (set (reg:SI 98 [ nitem.10 ])
1516 (reg:SI 69 [ nitem.10 ])) 34 {*movsi_1} (nil)
1519 (insn 152 151 153 17 (parallel [
1520 (set (reg:SI 98 [ nitem.10 ])
1521 (ashift:SI (reg:SI 98 [ nitem.10 ])
1522 (const_int 2 [0x2])))
1523 (clobber (reg:CC 17 flags))
1524 ]) 288 {*ashlsi3_1} (nil)
1525 (expr_list:REG_UNUSED (reg:CC 17 flags)
1528 (insn 153 152 154 17 (parallel [
1529 (set (reg:SI 98 [ nitem.10 ])
1530 (plus:SI (reg:SI 98 [ nitem.10 ])
1531 (reg:SI 69 [ nitem.10 ])))
1532 (clobber (reg:CC 17 flags))
1533 ]) 148 {*addsi_1} (nil)
1534 (expr_list:REG_UNUSED (reg:CC 17 flags)
1535 (expr_list:REG_EQUAL (mult:SI (reg:SI 69 [ nitem.10 ])
1536 (const_int 5 [0x5]))
1539 (insn 154 153 155 17 (parallel [
1540 (set (reg:SI 98 [ nitem.10 ])
1541 (ashift:SI (reg:SI 98 [ nitem.10 ])
1542 (const_int 1 [0x1])))
1543 (clobber (reg:CC 17 flags))
1544 ]) 288 {*ashlsi3_1} (nil)
1545 (expr_list:REG_UNUSED (reg:CC 17 flags)
1548 (insn 155 154 156 17 (parallel [
1549 (set (reg:SI 98 [ nitem.10 ])
1550 (plus:SI (reg:SI 98 [ nitem.10 ])
1551 (reg:SI 69 [ nitem.10 ])))
1552 (clobber (reg:CC 17 flags))
1553 ]) 148 {*addsi_1} (nil)
1554 (expr_list:REG_DEAD (reg:SI 69 [ nitem.10 ])
1555 (expr_list:REG_UNUSED (reg:CC 17 flags)
1556 (expr_list:REG_EQUAL (mult:SI (reg:SI 69 [ nitem.10 ])
1557 (const_int 11 [0xb]))
1560 (insn 156 155 157 17 (parallel [
1562 (ashift:SI (reg:SI 98 [ nitem.10 ])
1563 (const_int 2 [0x2])))
1564 (clobber (reg:CC 17 flags))
1565 ]) 288 {*ashlsi3_1} (nil)
1566 (expr_list:REG_DEAD (reg:SI 98 [ nitem.10 ])
1567 (expr_list:REG_UNUSED (reg:CC 17 flags)
1568 (expr_list:REG_EQUAL (mult:SI (reg:SI 69 [ nitem.10 ])
1569 (const_int 44 [0x2c]))
1572 (insn 157 156 158 17 (set (reg:SI 68 [ D.16312 ])
1573 (reg:SI 99)) 34 {*movsi_1} (nil)
1574 (expr_list:REG_DEAD (reg:SI 99)
1577 (insn 158 157 159 17 (set (reg:SI 67 [ D.16313 ])
1578 (reg:SI 68 [ D.16312 ])) 34 {*movsi_1} (nil)
1579 (expr_list:REG_DEAD (reg:SI 68 [ D.16312 ])
1582 (insn 159 158 160 17 (parallel [
1583 (set (reg:SI 66 [ D.16314 ])
1584 (plus:SI (reg:SI 67 [ D.16313 ])
1585 (mem/c/i:SI (reg/f:SI 16 argp) [0 rates+0 S4 A32])))
1586 (clobber (reg:CC 17 flags))
1587 ]) 148 {*addsi_1} (nil)
1588 (expr_list:REG_DEAD (reg:SI 67 [ D.16313 ])
1589 (expr_list:REG_UNUSED (reg:CC 17 flags)
1592 (insn 160 159 161 17 (set (reg:DF 84 [ D.16291 ])
1593 (mem/s/j:DF (plus:SI (reg:SI 66 [ D.16314 ])
1594 (const_int 20 [0x14])) [0 <variable>.high+0 S8 A8])) 64 {*movdf_integer} (nil)
1595 (expr_list:REG_DEAD (reg:SI 66 [ D.16314 ])
1598 (jump_insn 161 160 162 17 (set (pc)
1599 (label_ref 199)) 380 {jump} (nil)
1601 ;; End of basic block 17, registers live:
1602 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1604 (barrier 162 161 163)
1606 ;; Start of basic block 18, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1607 (code_label 163 162 164 18 27 "" [1 uses])
1609 (note 164 163 166 18 [bb 18] NOTE_INSN_BASIC_BLOCK)
1611 (insn 166 164 167 18 (set (reg:SI 65 [ nitem.11 ])
1612 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1613 (const_int -4 [0xfffffffc])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
1616 (insn 167 166 168 18 (set (reg:SI 100 [ nitem.11 ])
1617 (reg:SI 65 [ nitem.11 ])) 34 {*movsi_1} (nil)
1620 (insn 168 167 169 18 (parallel [
1621 (set (reg:SI 100 [ nitem.11 ])
1622 (ashift:SI (reg:SI 100 [ nitem.11 ])
1623 (const_int 2 [0x2])))
1624 (clobber (reg:CC 17 flags))
1625 ]) 288 {*ashlsi3_1} (nil)
1626 (expr_list:REG_UNUSED (reg:CC 17 flags)
1629 (insn 169 168 170 18 (parallel [
1630 (set (reg:SI 100 [ nitem.11 ])
1631 (plus:SI (reg:SI 100 [ nitem.11 ])
1632 (reg:SI 65 [ nitem.11 ])))
1633 (clobber (reg:CC 17 flags))
1634 ]) 148 {*addsi_1} (nil)
1635 (expr_list:REG_UNUSED (reg:CC 17 flags)
1636 (expr_list:REG_EQUAL (mult:SI (reg:SI 65 [ nitem.11 ])
1637 (const_int 5 [0x5]))
1640 (insn 170 169 171 18 (parallel [
1641 (set (reg:SI 100 [ nitem.11 ])
1642 (ashift:SI (reg:SI 100 [ nitem.11 ])
1643 (const_int 1 [0x1])))
1644 (clobber (reg:CC 17 flags))
1645 ]) 288 {*ashlsi3_1} (nil)
1646 (expr_list:REG_UNUSED (reg:CC 17 flags)
1649 (insn 171 170 172 18 (parallel [
1650 (set (reg:SI 100 [ nitem.11 ])
1651 (plus:SI (reg:SI 100 [ nitem.11 ])
1652 (reg:SI 65 [ nitem.11 ])))
1653 (clobber (reg:CC 17 flags))
1654 ]) 148 {*addsi_1} (nil)
1655 (expr_list:REG_DEAD (reg:SI 65 [ nitem.11 ])
1656 (expr_list:REG_UNUSED (reg:CC 17 flags)
1657 (expr_list:REG_EQUAL (mult:SI (reg:SI 65 [ nitem.11 ])
1658 (const_int 11 [0xb]))
1661 (insn 172 171 173 18 (parallel [
1663 (ashift:SI (reg:SI 100 [ nitem.11 ])
1664 (const_int 2 [0x2])))
1665 (clobber (reg:CC 17 flags))
1666 ]) 288 {*ashlsi3_1} (nil)
1667 (expr_list:REG_DEAD (reg:SI 100 [ nitem.11 ])
1668 (expr_list:REG_UNUSED (reg:CC 17 flags)
1669 (expr_list:REG_EQUAL (mult:SI (reg:SI 65 [ nitem.11 ])
1670 (const_int 44 [0x2c]))
1673 (insn 173 172 174 18 (set (reg:SI 64 [ D.16316 ])
1674 (reg:SI 101)) 34 {*movsi_1} (nil)
1675 (expr_list:REG_DEAD (reg:SI 101)
1678 (insn 174 173 175 18 (set (reg:SI 63 [ D.16317 ])
1679 (reg:SI 64 [ D.16316 ])) 34 {*movsi_1} (nil)
1680 (expr_list:REG_DEAD (reg:SI 64 [ D.16316 ])
1683 (insn 175 174 176 18 (parallel [
1684 (set (reg:SI 62 [ D.16318 ])
1685 (plus:SI (reg:SI 63 [ D.16317 ])
1686 (mem/c/i:SI (reg/f:SI 16 argp) [0 rates+0 S4 A32])))
1687 (clobber (reg:CC 17 flags))
1688 ]) 148 {*addsi_1} (nil)
1689 (expr_list:REG_DEAD (reg:SI 63 [ D.16317 ])
1690 (expr_list:REG_UNUSED (reg:CC 17 flags)
1693 (insn 176 175 177 18 (set (reg:DF 84 [ D.16291 ])
1694 (mem/s/j:DF (plus:SI (reg:SI 62 [ D.16318 ])
1695 (const_int 28 [0x1c])) [0 <variable>.close+0 S8 A8])) 64 {*movdf_integer} (nil)
1696 (expr_list:REG_DEAD (reg:SI 62 [ D.16318 ])
1699 (jump_insn 177 176 178 18 (set (pc)
1700 (label_ref 199)) 380 {jump} (nil)
1702 ;; End of basic block 18, registers live:
1703 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1705 (barrier 178 177 179)
1707 ;; Start of basic block 19, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1708 (code_label 179 178 180 19 28 "" [1 uses])
1710 (note 180 179 182 19 [bb 19] NOTE_INSN_BASIC_BLOCK)
1712 (insn 182 180 183 19 (set (reg:SI 61 [ nitem.12 ])
1713 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1714 (const_int -4 [0xfffffffc])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
1717 (insn 183 182 184 19 (set (reg:SI 102 [ nitem.12 ])
1718 (reg:SI 61 [ nitem.12 ])) 34 {*movsi_1} (nil)
1721 (insn 184 183 185 19 (parallel [
1722 (set (reg:SI 102 [ nitem.12 ])
1723 (ashift:SI (reg:SI 102 [ nitem.12 ])
1724 (const_int 2 [0x2])))
1725 (clobber (reg:CC 17 flags))
1726 ]) 288 {*ashlsi3_1} (nil)
1727 (expr_list:REG_UNUSED (reg:CC 17 flags)
1730 (insn 185 184 186 19 (parallel [
1731 (set (reg:SI 102 [ nitem.12 ])
1732 (plus:SI (reg:SI 102 [ nitem.12 ])
1733 (reg:SI 61 [ nitem.12 ])))
1734 (clobber (reg:CC 17 flags))
1735 ]) 148 {*addsi_1} (nil)
1736 (expr_list:REG_UNUSED (reg:CC 17 flags)
1737 (expr_list:REG_EQUAL (mult:SI (reg:SI 61 [ nitem.12 ])
1738 (const_int 5 [0x5]))
1741 (insn 186 185 187 19 (parallel [
1742 (set (reg:SI 102 [ nitem.12 ])
1743 (ashift:SI (reg:SI 102 [ nitem.12 ])
1744 (const_int 1 [0x1])))
1745 (clobber (reg:CC 17 flags))
1746 ]) 288 {*ashlsi3_1} (nil)
1747 (expr_list:REG_UNUSED (reg:CC 17 flags)
1750 (insn 187 186 188 19 (parallel [
1751 (set (reg:SI 102 [ nitem.12 ])
1752 (plus:SI (reg:SI 102 [ nitem.12 ])
1753 (reg:SI 61 [ nitem.12 ])))
1754 (clobber (reg:CC 17 flags))
1755 ]) 148 {*addsi_1} (nil)
1756 (expr_list:REG_DEAD (reg:SI 61 [ nitem.12 ])
1757 (expr_list:REG_UNUSED (reg:CC 17 flags)
1758 (expr_list:REG_EQUAL (mult:SI (reg:SI 61 [ nitem.12 ])
1759 (const_int 11 [0xb]))
1762 (insn 188 187 189 19 (parallel [
1764 (ashift:SI (reg:SI 102 [ nitem.12 ])
1765 (const_int 2 [0x2])))
1766 (clobber (reg:CC 17 flags))
1767 ]) 288 {*ashlsi3_1} (nil)
1768 (expr_list:REG_DEAD (reg:SI 102 [ nitem.12 ])
1769 (expr_list:REG_UNUSED (reg:CC 17 flags)
1770 (expr_list:REG_EQUAL (mult:SI (reg:SI 61 [ nitem.12 ])
1771 (const_int 44 [0x2c]))
1774 (insn 189 188 190 19 (set (reg:SI 60 [ D.16320 ])
1775 (reg:SI 103)) 34 {*movsi_1} (nil)
1776 (expr_list:REG_DEAD (reg:SI 103)
1779 (insn 190 189 191 19 (set (reg:SI 59 [ D.16321 ])
1780 (reg:SI 60 [ D.16320 ])) 34 {*movsi_1} (nil)
1781 (expr_list:REG_DEAD (reg:SI 60 [ D.16320 ])
1784 (insn 191 190 192 19 (parallel [
1785 (set (reg:SI 58 [ D.16322 ])
1786 (plus:SI (reg:SI 59 [ D.16321 ])
1787 (mem/c/i:SI (reg/f:SI 16 argp) [0 rates+0 S4 A32])))
1788 (clobber (reg:CC 17 flags))
1789 ]) 148 {*addsi_1} (nil)
1790 (expr_list:REG_DEAD (reg:SI 59 [ D.16321 ])
1791 (expr_list:REG_UNUSED (reg:CC 17 flags)
1794 (insn 192 191 193 19 (set (reg:DF 84 [ D.16291 ])
1795 (mem/s/j:DF (plus:SI (reg:SI 58 [ D.16322 ])
1796 (const_int 36 [0x24])) [0 <variable>.vol+0 S8 A8])) 64 {*movdf_integer} (nil)
1797 (expr_list:REG_DEAD (reg:SI 58 [ D.16322 ])
1800 (jump_insn 193 192 194 19 (set (pc)
1801 (label_ref 199)) 380 {jump} (nil)
1803 ;; End of basic block 19, registers live:
1804 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1806 (barrier 194 193 195)
1808 ;; Start of basic block 20, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1809 (code_label 195 194 196 20 22 "" [1 uses])
1811 (note 196 195 198 20 [bb 20] NOTE_INSN_BASIC_BLOCK)
1813 (insn 198 196 199 20 (set (reg:DF 84 [ D.16291 ])
1814 (mem/u/c/i:DF (symbol_ref/u:SI ("*LC1") [flags 0x2]) [0 S8 A64])) 64 {*movdf_integer} (nil)
1815 (expr_list:REG_EQUAL (const_double:DF 0 [0x0] 0.0 [0x0.0p+0])
1817 ;; End of basic block 20, registers live:
1818 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1820 ;; Start of basic block 21, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 84
1821 (code_label 199 198 200 21 13 "" [10 uses])
1823 (note 200 199 201 21 [bb 21] NOTE_INSN_BASIC_BLOCK)
1825 (insn 201 200 204 21 (set (reg:DF 85 [ <result> ])
1826 (reg:DF 84 [ D.16291 ])) 64 {*movdf_integer} (nil)
1827 (expr_list:REG_DEAD (reg:DF 84 [ D.16291 ])
1830 (note 204 201 207 21 NOTE_INSN_FUNCTION_END)
1832 (insn 207 204 213 21 (set (reg/i:DF 8 st [ <result> ])
1833 (reg:DF 85 [ <result> ])) 64 {*movdf_integer} (nil)
1834 (expr_list:REG_DEAD (reg:DF 85 [ <result> ])
1837 (insn 213 207 0 21 (use (reg/i:DF 8 st [ <result> ])) -1 (nil)
1839 ;; End of basic block 21, registers live:
1840 6 [bp] 7 [sp] 8 [st] 16 [argp] 20 [frame]
1843 ;; Function BOOL SetArrayItemValue(double*, int, int, double) (_Z17SetArrayItemValuePdiid@20)
1849 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
1850 Register 59 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
1851 Register 60 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
1852 Register 61 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
1853 Register 62 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:25000 INT_SSE_REGS:25000 FLOAT_INT_SSE_REGS:25000 ALL_REGS:25000 MEM:9000
1854 Register 63 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
1855 Register 64 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
1856 Register 65 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
1857 Register 66 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
1858 Register 67 costs: AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FP_TOP_REG:0 FP_SECOND_REG:0 FLOAT_REGS:0 FP_TOP_SSE_REGS:18000 FP_SECOND_SSE_REGS:18000 FLOAT_SSE_REGS:18000 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
1860 Register 53 pref FLOAT_INT_SSE_REGS or none
1861 Register 54 pref FLOAT_INT_SSE_REGS or none
1862 Register 55 pref FLOAT_INT_SSE_REGS or none
1863 Register 56 pref FLOAT_INT_SSE_REGS or none
1864 Register 57 pref FLOAT_INT_SSE_REGS or none
1865 Register 58 pref GENERAL_REGS or none
1866 Register 59 pref GENERAL_REGS or none
1867 Register 60 pref GENERAL_REGS or none
1868 Register 61 pref GENERAL_REGS or none
1869 Register 62 pref GENERAL_REGS or none
1870 Register 63 pref AREG, else GENERAL_REGS
1871 Register 64 pref GENERAL_REGS or none
1872 Register 65 pref GENERAL_REGS or none
1873 Register 66 pref GENERAL_REGS or none
1874 Register 67 pref FLOAT_INT_REGS or none
1875 Register 68 pref FLOAT_INT_SSE_REGS or none
1878 Register 58 used 2 times across 3 insns in block 9; set 1 time; GENERAL_REGS or none.
1880 Register 59 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
1882 Register 60 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
1884 Register 61 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
1886 Register 62 used 5 times across 8 insns; set 4 times; GENERAL_REGS or none.
1888 Register 63 used 2 times across 2 insns in block 10; set 1 time; pref AREG, else GENERAL_REGS.
1890 Register 64 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none.
1892 Register 65 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none.
1894 Register 66 used 2 times across 2 insns in block 7; set 1 time; GENERAL_REGS or none.
1896 Register 67 used 2 times across 2 insns in block 9; set 1 time; 8 bytes; FLOAT_INT_REGS or none.
1898 11 basic blocks, 14 edges.
1900 Basic block 2 , prev 0, next 3, loop_depth 0, count 0, freq 0.
1901 Predecessors: ENTRY (fallthru)
1902 Successors: 3 (fallthru) 4
1903 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1904 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1906 Basic block 3 , prev 2, next 4, loop_depth 0, count 0, freq 0.
1907 Predecessors: 2 (fallthru)
1909 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1910 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
1912 Basic block 4 , prev 3, next 5, loop_depth 0, count 0, freq 0.
1914 Successors: 5 (fallthru) 6
1915 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1916 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1918 Basic block 5 , prev 4, next 6, loop_depth 0, count 0, freq 0.
1919 Predecessors: 4 (fallthru)
1921 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1922 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
1924 Basic block 6 , prev 5, next 7, loop_depth 0, count 0, freq 0.
1926 Successors: 8 7 (fallthru)
1927 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1928 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1930 Basic block 7 , prev 6, next 8, loop_depth 0, count 0, freq 0.
1931 Predecessors: 6 (fallthru)
1932 Successors: 8 (fallthru) 9
1933 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1934 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1936 Basic block 8 , prev 7, next 9, loop_depth 0, count 0, freq 0.
1937 Predecessors: 6 7 (fallthru)
1939 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1940 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
1942 Basic block 9 , prev 8, next 10, loop_depth 0, count 0, freq 0.
1944 Successors: 10 (fallthru)
1945 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1946 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
1948 Basic block 10 , prev 9, next 1, loop_depth 0, count 0, freq 0.
1949 Predecessors: 3 5 8 9 (fallthru)
1950 Successors: EXIT [100.0%] (fallthru)
1951 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
1952 Registers live at end: 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1954 ;; Register 58 in 2.
1955 ;; Register 59 in 0.
1956 ;; Register 60 in 0.
1957 ;; Register 61 in 0.
1958 ;; Register 63 in 0.
1959 ;; Register 64 in 0.
1960 ;; Register 65 in 0.
1961 ;; Register 66 in 0.
1962 ;; Register 67 in 0.
1963 (note 2 0 8 NOTE_INSN_DELETED)
1965 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
1966 (note 8 2 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
1968 (insn 3 8 4 2 (set (reg:SI 64 [ value ])
1969 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1970 (const_int 12 [0xc])) [0 value+0 S4 A32])) 34 {*movsi_1} (nil)
1973 (insn 4 3 5 2 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1974 (const_int -8 [0xfffffff8])) [0 value+0 S4 A64])
1975 (reg:SI 64 [ value ])) 34 {*movsi_1} (nil)
1976 (expr_list:REG_DEAD (reg:SI 64 [ value ])
1979 (insn 5 4 6 2 (set (reg:SI 65 [ value+4 ])
1980 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
1981 (const_int 16 [0x10])) [0 value+4 S4 A32])) 34 {*movsi_1} (nil)
1984 (insn 6 5 7 2 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
1985 (const_int -4 [0xfffffffc])) [0 value+4 S4 A32])
1986 (reg:SI 65 [ value+4 ])) 34 {*movsi_1} (nil)
1987 (expr_list:REG_DEAD (reg:SI 65 [ value+4 ])
1990 (note 7 6 11 2 NOTE_INSN_FUNCTION_BEG)
1992 (insn 11 7 12 2 (set (reg:CCZ 17 flags)
1993 (compare:CCZ (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])
1994 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
1997 (jump_insn 12 11 14 2 (set (pc)
1998 (if_then_else (ne (reg:CCZ 17 flags)
1999 (const_int 0 [0x0]))
2001 (pc))) 365 {*jcc_1} (nil)
2002 (expr_list:REG_DEAD (reg:CCZ 17 flags)
2004 ;; End of basic block 2, registers live:
2005 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2007 ;; Start of basic block 3, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2008 (note 14 12 16 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
2010 (insn 16 14 17 3 (parallel [
2011 (set (reg/f:SI 7 sp)
2012 (plus:SI (reg/f:SI 7 sp)
2013 (const_int -12 [0xfffffff4])))
2014 (clobber (reg:CC 17 flags))
2015 ]) 148 {*addsi_1} (nil)
2016 (expr_list:REG_UNUSED (reg:CC 17 flags)
2019 (insn 17 16 18 3 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2020 (symbol_ref/f:SI ("*LC6") [flags 0x2] <string_cst 0xb6b20618>)) 28 {*pushsi2} (nil)
2023 (call_insn 18 17 19 3 (set (reg:SI 0 ax)
2024 (call (mem:QI (symbol_ref:SI ("puts") [flags 0x41] <function_decl 0xb72e5d20 __builtin_puts>) [0 S1 A8])
2025 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2026 (expr_list:REG_UNUSED (reg:SI 0 ax)
2030 (insn 19 18 21 3 (parallel [
2031 (set (reg/f:SI 7 sp)
2032 (plus:SI (reg/f:SI 7 sp)
2033 (const_int 16 [0x10])))
2034 (clobber (reg:CC 17 flags))
2035 ]) 148 {*addsi_1} (nil)
2036 (expr_list:REG_UNUSED (reg:CC 17 flags)
2039 (insn 21 19 22 3 (set (reg:SI 62 [ D.16271 ])
2040 (const_int 0 [0x0])) 34 {*movsi_1} (nil)
2043 (jump_insn 22 21 23 3 (set (pc)
2044 (label_ref 74)) 380 {jump} (nil)
2046 ;; End of basic block 3, registers live:
2047 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2051 ;; Start of basic block 4, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2052 (code_label 24 23 25 4 32 "" [1 uses])
2054 (note 25 24 27 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
2056 (insn 27 25 28 4 (set (reg:CCNO 17 flags)
2057 (compare:CCNO (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2058 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])
2059 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
2062 (jump_insn 28 27 30 4 (set (pc)
2063 (if_then_else (gt (reg:CCNO 17 flags)
2064 (const_int 0 [0x0]))
2066 (pc))) 365 {*jcc_1} (nil)
2067 (expr_list:REG_DEAD (reg:CCNO 17 flags)
2069 ;; End of basic block 4, registers live:
2070 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2072 ;; Start of basic block 5, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2073 (note 30 28 32 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
2075 (insn 32 30 33 5 (parallel [
2076 (set (reg/f:SI 7 sp)
2077 (plus:SI (reg/f:SI 7 sp)
2078 (const_int -8 [0xfffffff8])))
2079 (clobber (reg:CC 17 flags))
2080 ]) 148 {*addsi_1} (nil)
2081 (expr_list:REG_UNUSED (reg:CC 17 flags)
2084 (insn 33 32 34 5 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2085 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2086 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])) 28 {*pushsi2} (nil)
2089 (insn 34 33 35 5 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2090 (symbol_ref/f:SI ("*LC7") [flags 0x2] <string_cst 0xb6abff80>)) 28 {*pushsi2} (nil)
2093 (call_insn 35 34 36 5 (set (reg:SI 0 ax)
2094 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
2095 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2096 (expr_list:REG_UNUSED (reg:SI 0 ax)
2097 (expr_list:REG_EH_REGION (const_int 0 [0x0])
2101 (insn 36 35 38 5 (parallel [
2102 (set (reg/f:SI 7 sp)
2103 (plus:SI (reg/f:SI 7 sp)
2104 (const_int 16 [0x10])))
2105 (clobber (reg:CC 17 flags))
2106 ]) 148 {*addsi_1} (nil)
2107 (expr_list:REG_UNUSED (reg:CC 17 flags)
2110 (insn 38 36 39 5 (set (reg:SI 62 [ D.16271 ])
2111 (const_int 0 [0x0])) 34 {*movsi_1} (nil)
2114 (jump_insn 39 38 40 5 (set (pc)
2115 (label_ref 74)) 380 {jump} (nil)
2117 ;; End of basic block 5, registers live:
2118 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2122 ;; Start of basic block 6, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2123 (code_label 41 40 42 6 35 "" [1 uses])
2125 (note 42 41 44 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
2127 (insn 44 42 45 6 (set (reg:CCGOC 17 flags)
2128 (compare:CCGOC (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2129 (const_int 8 [0x8])) [0 nitem+0 S4 A32])
2130 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
2133 (jump_insn 45 44 47 6 (set (pc)
2134 (if_then_else (lt (reg:CCGOC 17 flags)
2135 (const_int 0 [0x0]))
2137 (pc))) 365 {*jcc_1} (nil)
2138 (expr_list:REG_DEAD (reg:CCGOC 17 flags)
2140 ;; End of basic block 6, registers live:
2141 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2143 ;; Start of basic block 7, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2144 (note 47 45 48 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
2146 (insn 48 47 49 7 (set (reg:SI 66 [ nitem ])
2147 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2148 (const_int 8 [0x8])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
2151 (insn 49 48 50 7 (set (reg:CCGC 17 flags)
2152 (compare:CCGC (reg:SI 66 [ nitem ])
2153 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2154 (const_int 4 [0x4])) [0 arraysize+0 S4 A32]))) 2 {*cmpsi_1_insn} (nil)
2155 (expr_list:REG_DEAD (reg:SI 66 [ nitem ])
2158 (jump_insn 50 49 51 7 (set (pc)
2159 (if_then_else (lt (reg:CCGC 17 flags)
2160 (const_int 0 [0x0]))
2162 (pc))) 365 {*jcc_1} (nil)
2163 (expr_list:REG_DEAD (reg:CCGC 17 flags)
2165 ;; End of basic block 7, registers live:
2166 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2168 ;; Start of basic block 8, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2169 (code_label 51 50 52 8 37 "" [1 uses])
2171 (note 52 51 54 8 [bb 8] NOTE_INSN_BASIC_BLOCK)
2173 (insn 54 52 55 8 (parallel [
2174 (set (reg/f:SI 7 sp)
2175 (plus:SI (reg/f:SI 7 sp)
2176 (const_int -8 [0xfffffff8])))
2177 (clobber (reg:CC 17 flags))
2178 ]) 148 {*addsi_1} (nil)
2179 (expr_list:REG_UNUSED (reg:CC 17 flags)
2182 (insn 55 54 56 8 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2183 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2184 (const_int 8 [0x8])) [0 nitem+0 S4 A32])) 28 {*pushsi2} (nil)
2187 (insn 56 55 57 8 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2188 (symbol_ref/f:SI ("*LC8") [flags 0x2] <string_cst 0xb6abffc0>)) 28 {*pushsi2} (nil)
2191 (call_insn 57 56 58 8 (set (reg:SI 0 ax)
2192 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
2193 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2194 (expr_list:REG_UNUSED (reg:SI 0 ax)
2195 (expr_list:REG_EH_REGION (const_int 0 [0x0])
2199 (insn 58 57 60 8 (parallel [
2200 (set (reg/f:SI 7 sp)
2201 (plus:SI (reg/f:SI 7 sp)
2202 (const_int 16 [0x10])))
2203 (clobber (reg:CC 17 flags))
2204 ]) 148 {*addsi_1} (nil)
2205 (expr_list:REG_UNUSED (reg:CC 17 flags)
2208 (insn 60 58 61 8 (set (reg:SI 62 [ D.16271 ])
2209 (const_int 0 [0x0])) 34 {*movsi_1} (nil)
2212 (jump_insn 61 60 62 8 (set (pc)
2213 (label_ref 74)) 380 {jump} (nil)
2215 ;; End of basic block 8, registers live:
2216 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2220 ;; Start of basic block 9, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2221 (code_label 63 62 64 9 39 "" [1 uses])
2223 (note 64 63 66 9 [bb 9] NOTE_INSN_BASIC_BLOCK)
2225 (insn 66 64 67 9 (set (reg:SI 61 [ nitem.6 ])
2226 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2227 (const_int 8 [0x8])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
2230 (insn 67 66 68 9 (parallel [
2231 (set (reg:SI 60 [ D.16275 ])
2232 (ashift:SI (reg:SI 61 [ nitem.6 ])
2233 (const_int 3 [0x3])))
2234 (clobber (reg:CC 17 flags))
2235 ]) 288 {*ashlsi3_1} (nil)
2236 (expr_list:REG_DEAD (reg:SI 61 [ nitem.6 ])
2237 (expr_list:REG_UNUSED (reg:CC 17 flags)
2240 (insn 68 67 69 9 (set (reg:SI 59 [ D.16276 ])
2241 (reg:SI 60 [ D.16275 ])) 34 {*movsi_1} (nil)
2242 (expr_list:REG_DEAD (reg:SI 60 [ D.16275 ])
2245 (insn 69 68 70 9 (parallel [
2246 (set (reg:SI 58 [ D.16277 ])
2247 (plus:SI (reg:SI 59 [ D.16276 ])
2248 (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])))
2249 (clobber (reg:CC 17 flags))
2250 ]) 148 {*addsi_1} (nil)
2251 (expr_list:REG_DEAD (reg:SI 59 [ D.16276 ])
2252 (expr_list:REG_UNUSED (reg:CC 17 flags)
2255 (insn 70 69 71 9 (set (reg:DF 67 [ value ])
2256 (mem/c/i:DF (plus:SI (reg/f:SI 20 frame)
2257 (const_int -8 [0xfffffff8])) [0 value+0 S8 A64])) 64 {*movdf_integer} (nil)
2260 (insn 71 70 73 9 (set (mem:DF (reg:SI 58 [ D.16277 ]) [0 S8 A64])
2261 (reg:DF 67 [ value ])) 64 {*movdf_integer} (nil)
2262 (expr_list:REG_DEAD (reg:DF 67 [ value ])
2263 (expr_list:REG_DEAD (reg:SI 58 [ D.16277 ])
2266 (insn 73 71 74 9 (set (reg:SI 62 [ D.16271 ])
2267 (const_int 1 [0x1])) 34 {*movsi_1} (nil)
2269 ;; End of basic block 9, registers live:
2270 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2272 ;; Start of basic block 10, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2273 (code_label 74 73 75 10 34 "" [3 uses])
2275 (note 75 74 76 10 [bb 10] NOTE_INSN_BASIC_BLOCK)
2277 (insn 76 75 79 10 (set (reg:SI 63 [ <result> ])
2278 (reg:SI 62 [ D.16271 ])) 34 {*movsi_1} (nil)
2279 (expr_list:REG_DEAD (reg:SI 62 [ D.16271 ])
2282 (note 79 76 82 10 NOTE_INSN_FUNCTION_END)
2284 (insn 82 79 88 10 (set (reg/i:SI 0 ax [ <result> ])
2285 (reg:SI 63 [ <result> ])) 34 {*movsi_1} (nil)
2286 (expr_list:REG_DEAD (reg:SI 63 [ <result> ])
2289 (insn 88 82 0 10 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
2291 ;; End of basic block 10, registers live:
2292 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2295 ;; Function double GetArrayItemValue(const double*, int, int) (_Z17GetArrayItemValuePKdii@12)
2301 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
2302 Register 59 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
2303 Register 60 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
2304 Register 61 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
2305 Register 62 costs: AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FP_TOP_REG:0 FP_SECOND_REG:0 FLOAT_REGS:0 FP_TOP_SSE_REGS:45000 FP_SECOND_SSE_REGS:45000 FLOAT_SSE_REGS:45000 FLOAT_INT_REGS:45000 INT_SSE_REGS:45000 FLOAT_INT_SSE_REGS:45000 ALL_REGS:45000 MEM:17000
2306 Register 63 costs: AD_REGS:9000 Q_REGS:9000 NON_Q_REGS:9000 INDEX_REGS:9000 LEGACY_REGS:9000 GENERAL_REGS:9000 FP_TOP_REG:-1000 FP_SECOND_REG:0 FLOAT_REGS:0 FP_TOP_SSE_REGS:18000 FP_SECOND_SSE_REGS:18000 FLOAT_SSE_REGS:18000 FLOAT_INT_REGS:27000 INT_SSE_REGS:27000 FLOAT_INT_SSE_REGS:27000 ALL_REGS:27000 MEM:5000
2307 Register 64 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
2309 Register 53 pref FLOAT_INT_SSE_REGS or none
2310 Register 54 pref FLOAT_INT_SSE_REGS or none
2311 Register 55 pref FLOAT_INT_SSE_REGS or none
2312 Register 56 pref FLOAT_INT_SSE_REGS or none
2313 Register 57 pref FLOAT_INT_SSE_REGS or none
2314 Register 58 pref GENERAL_REGS or none
2315 Register 59 pref GENERAL_REGS or none
2316 Register 60 pref GENERAL_REGS or none
2317 Register 61 pref GENERAL_REGS or none
2318 Register 62 pref FLOAT_INT_REGS or none
2319 Register 63 pref FP_TOP_REG, else FLOAT_REGS
2320 Register 64 pref GENERAL_REGS or none
2321 Register 65 pref FLOAT_INT_SSE_REGS or none
2324 Register 58 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
2326 Register 59 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
2328 Register 60 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
2330 Register 61 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
2332 Register 62 used 5 times across 8 insns; set 4 times; 8 bytes; FLOAT_INT_REGS or none.
2334 Register 63 used 2 times across 2 insns in block 10; set 1 time; 8 bytes; pref FP_TOP_REG, else FLOAT_REGS.
2336 Register 64 used 2 times across 2 insns in block 7; set 1 time; GENERAL_REGS or none.
2338 11 basic blocks, 14 edges.
2340 Basic block 2 , prev 0, next 3, loop_depth 0, count 0, freq 0.
2341 Predecessors: ENTRY (fallthru)
2342 Successors: 3 (fallthru) 4
2343 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2344 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2346 Basic block 3 , prev 2, next 4, loop_depth 0, count 0, freq 0.
2347 Predecessors: 2 (fallthru)
2349 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2350 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2352 Basic block 4 , prev 3, next 5, loop_depth 0, count 0, freq 0.
2354 Successors: 5 (fallthru) 6
2355 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2356 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2358 Basic block 5 , prev 4, next 6, loop_depth 0, count 0, freq 0.
2359 Predecessors: 4 (fallthru)
2361 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2362 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2364 Basic block 6 , prev 5, next 7, loop_depth 0, count 0, freq 0.
2366 Successors: 8 7 (fallthru)
2367 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2368 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2370 Basic block 7 , prev 6, next 8, loop_depth 0, count 0, freq 0.
2371 Predecessors: 6 (fallthru)
2372 Successors: 8 (fallthru) 9
2373 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2374 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2376 Basic block 8 , prev 7, next 9, loop_depth 0, count 0, freq 0.
2377 Predecessors: 6 7 (fallthru)
2379 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2380 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2382 Basic block 9 , prev 8, next 10, loop_depth 0, count 0, freq 0.
2384 Successors: 10 (fallthru)
2385 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2386 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2388 Basic block 10 , prev 9, next 1, loop_depth 0, count 0, freq 0.
2389 Predecessors: 3 5 8 9 (fallthru)
2390 Successors: EXIT [100.0%] (fallthru)
2391 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2392 Registers live at end: 6 [bp] 7 [sp] 8 [st] 16 [argp] 20 [frame]
2394 ;; Register 58 in 0.
2395 ;; Register 59 in 0.
2396 ;; Register 60 in 0.
2397 ;; Register 61 in 0.
2398 ;; Register 63 in 8.
2399 ;; Register 64 in 0.
2400 (note 2 0 3 NOTE_INSN_DELETED)
2402 (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
2404 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2405 (note 5 3 7 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
2407 (insn 7 5 8 2 (set (reg:CCZ 17 flags)
2408 (compare:CCZ (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])
2409 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
2412 (jump_insn 8 7 10 2 (set (pc)
2413 (if_then_else (ne (reg:CCZ 17 flags)
2414 (const_int 0 [0x0]))
2416 (pc))) 365 {*jcc_1} (nil)
2417 (expr_list:REG_DEAD (reg:CCZ 17 flags)
2419 ;; End of basic block 2, registers live:
2420 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2422 ;; Start of basic block 3, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2423 (note 10 8 12 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
2425 (insn 12 10 13 3 (parallel [
2426 (set (reg/f:SI 7 sp)
2427 (plus:SI (reg/f:SI 7 sp)
2428 (const_int -12 [0xfffffff4])))
2429 (clobber (reg:CC 17 flags))
2430 ]) 148 {*addsi_1} (nil)
2431 (expr_list:REG_UNUSED (reg:CC 17 flags)
2434 (insn 13 12 14 3 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2435 (symbol_ref/f:SI ("*LC6") [flags 0x2] <string_cst 0xb6b20618>)) 28 {*pushsi2} (nil)
2438 (call_insn 14 13 15 3 (set (reg:SI 0 ax)
2439 (call (mem:QI (symbol_ref:SI ("puts") [flags 0x41] <function_decl 0xb72e5d20 __builtin_puts>) [0 S1 A8])
2440 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2441 (expr_list:REG_UNUSED (reg:SI 0 ax)
2445 (insn 15 14 17 3 (parallel [
2446 (set (reg/f:SI 7 sp)
2447 (plus:SI (reg/f:SI 7 sp)
2448 (const_int 16 [0x10])))
2449 (clobber (reg:CC 17 flags))
2450 ]) 148 {*addsi_1} (nil)
2451 (expr_list:REG_UNUSED (reg:CC 17 flags)
2454 (insn 17 15 18 3 (set (reg:DF 62 [ D.16258 ])
2455 (mem/u/c/i:DF (symbol_ref/u:SI ("*LC1") [flags 0x2]) [0 S8 A64])) 64 {*movdf_integer} (nil)
2456 (expr_list:REG_EQUAL (const_double:DF 0 [0x0] 0.0 [0x0.0p+0])
2459 (jump_insn 18 17 19 3 (set (pc)
2460 (label_ref 67)) 380 {jump} (nil)
2462 ;; End of basic block 3, registers live:
2463 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2467 ;; Start of basic block 4, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2468 (code_label 20 19 21 4 42 "" [1 uses])
2470 (note 21 20 23 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
2472 (insn 23 21 24 4 (set (reg:CCNO 17 flags)
2473 (compare:CCNO (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2474 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])
2475 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
2478 (jump_insn 24 23 26 4 (set (pc)
2479 (if_then_else (gt (reg:CCNO 17 flags)
2480 (const_int 0 [0x0]))
2482 (pc))) 365 {*jcc_1} (nil)
2483 (expr_list:REG_DEAD (reg:CCNO 17 flags)
2485 ;; End of basic block 4, registers live:
2486 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2488 ;; Start of basic block 5, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2489 (note 26 24 28 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
2491 (insn 28 26 29 5 (parallel [
2492 (set (reg/f:SI 7 sp)
2493 (plus:SI (reg/f:SI 7 sp)
2494 (const_int -8 [0xfffffff8])))
2495 (clobber (reg:CC 17 flags))
2496 ]) 148 {*addsi_1} (nil)
2497 (expr_list:REG_UNUSED (reg:CC 17 flags)
2500 (insn 29 28 30 5 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2501 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2502 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])) 28 {*pushsi2} (nil)
2505 (insn 30 29 31 5 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2506 (symbol_ref/f:SI ("*LC7") [flags 0x2] <string_cst 0xb6abff80>)) 28 {*pushsi2} (nil)
2509 (call_insn 31 30 32 5 (set (reg:SI 0 ax)
2510 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
2511 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2512 (expr_list:REG_UNUSED (reg:SI 0 ax)
2513 (expr_list:REG_EH_REGION (const_int 0 [0x0])
2517 (insn 32 31 34 5 (parallel [
2518 (set (reg/f:SI 7 sp)
2519 (plus:SI (reg/f:SI 7 sp)
2520 (const_int 16 [0x10])))
2521 (clobber (reg:CC 17 flags))
2522 ]) 148 {*addsi_1} (nil)
2523 (expr_list:REG_UNUSED (reg:CC 17 flags)
2526 (insn 34 32 35 5 (set (reg:DF 62 [ D.16258 ])
2527 (mem/u/c/i:DF (symbol_ref/u:SI ("*LC1") [flags 0x2]) [0 S8 A64])) 64 {*movdf_integer} (nil)
2528 (expr_list:REG_EQUAL (const_double:DF 0 [0x0] 0.0 [0x0.0p+0])
2531 (jump_insn 35 34 36 5 (set (pc)
2532 (label_ref 67)) 380 {jump} (nil)
2534 ;; End of basic block 5, registers live:
2535 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2539 ;; Start of basic block 6, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2540 (code_label 37 36 38 6 45 "" [1 uses])
2542 (note 38 37 40 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
2544 (insn 40 38 41 6 (set (reg:CCGOC 17 flags)
2545 (compare:CCGOC (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2546 (const_int 8 [0x8])) [0 nitem+0 S4 A32])
2547 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
2550 (jump_insn 41 40 43 6 (set (pc)
2551 (if_then_else (lt (reg:CCGOC 17 flags)
2552 (const_int 0 [0x0]))
2554 (pc))) 365 {*jcc_1} (nil)
2555 (expr_list:REG_DEAD (reg:CCGOC 17 flags)
2557 ;; End of basic block 6, registers live:
2558 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2560 ;; Start of basic block 7, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2561 (note 43 41 44 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
2563 (insn 44 43 45 7 (set (reg:SI 64 [ nitem ])
2564 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2565 (const_int 8 [0x8])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
2568 (insn 45 44 46 7 (set (reg:CCGC 17 flags)
2569 (compare:CCGC (reg:SI 64 [ nitem ])
2570 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2571 (const_int 4 [0x4])) [0 arraysize+0 S4 A32]))) 2 {*cmpsi_1_insn} (nil)
2572 (expr_list:REG_DEAD (reg:SI 64 [ nitem ])
2575 (jump_insn 46 45 47 7 (set (pc)
2576 (if_then_else (lt (reg:CCGC 17 flags)
2577 (const_int 0 [0x0]))
2579 (pc))) 365 {*jcc_1} (nil)
2580 (expr_list:REG_DEAD (reg:CCGC 17 flags)
2582 ;; End of basic block 7, registers live:
2583 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2585 ;; Start of basic block 8, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2586 (code_label 47 46 48 8 47 "" [1 uses])
2588 (note 48 47 50 8 [bb 8] NOTE_INSN_BASIC_BLOCK)
2590 (insn 50 48 51 8 (parallel [
2591 (set (reg/f:SI 7 sp)
2592 (plus:SI (reg/f:SI 7 sp)
2593 (const_int -8 [0xfffffff8])))
2594 (clobber (reg:CC 17 flags))
2595 ]) 148 {*addsi_1} (nil)
2596 (expr_list:REG_UNUSED (reg:CC 17 flags)
2599 (insn 51 50 52 8 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2600 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2601 (const_int 8 [0x8])) [0 nitem+0 S4 A32])) 28 {*pushsi2} (nil)
2604 (insn 52 51 53 8 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2605 (symbol_ref/f:SI ("*LC8") [flags 0x2] <string_cst 0xb6abffc0>)) 28 {*pushsi2} (nil)
2608 (call_insn 53 52 54 8 (set (reg:SI 0 ax)
2609 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
2610 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2611 (expr_list:REG_UNUSED (reg:SI 0 ax)
2612 (expr_list:REG_EH_REGION (const_int 0 [0x0])
2616 (insn 54 53 56 8 (parallel [
2617 (set (reg/f:SI 7 sp)
2618 (plus:SI (reg/f:SI 7 sp)
2619 (const_int 16 [0x10])))
2620 (clobber (reg:CC 17 flags))
2621 ]) 148 {*addsi_1} (nil)
2622 (expr_list:REG_UNUSED (reg:CC 17 flags)
2625 (insn 56 54 57 8 (set (reg:DF 62 [ D.16258 ])
2626 (mem/u/c/i:DF (symbol_ref/u:SI ("*LC1") [flags 0x2]) [0 S8 A64])) 64 {*movdf_integer} (nil)
2627 (expr_list:REG_EQUAL (const_double:DF 0 [0x0] 0.0 [0x0.0p+0])
2630 (jump_insn 57 56 58 8 (set (pc)
2631 (label_ref 67)) 380 {jump} (nil)
2633 ;; End of basic block 8, registers live:
2634 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2638 ;; Start of basic block 9, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2639 (code_label 59 58 60 9 49 "" [1 uses])
2641 (note 60 59 62 9 [bb 9] NOTE_INSN_BASIC_BLOCK)
2643 (insn 62 60 63 9 (set (reg:SI 61 [ nitem.5 ])
2644 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2645 (const_int 8 [0x8])) [0 nitem+0 S4 A32])) 34 {*movsi_1} (nil)
2648 (insn 63 62 64 9 (parallel [
2649 (set (reg:SI 60 [ D.16262 ])
2650 (ashift:SI (reg:SI 61 [ nitem.5 ])
2651 (const_int 3 [0x3])))
2652 (clobber (reg:CC 17 flags))
2653 ]) 288 {*ashlsi3_1} (nil)
2654 (expr_list:REG_DEAD (reg:SI 61 [ nitem.5 ])
2655 (expr_list:REG_UNUSED (reg:CC 17 flags)
2658 (insn 64 63 65 9 (set (reg:SI 59 [ D.16263 ])
2659 (reg:SI 60 [ D.16262 ])) 34 {*movsi_1} (nil)
2660 (expr_list:REG_DEAD (reg:SI 60 [ D.16262 ])
2663 (insn 65 64 66 9 (parallel [
2664 (set (reg:SI 58 [ D.16264 ])
2665 (plus:SI (reg:SI 59 [ D.16263 ])
2666 (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])))
2667 (clobber (reg:CC 17 flags))
2668 ]) 148 {*addsi_1} (nil)
2669 (expr_list:REG_DEAD (reg:SI 59 [ D.16263 ])
2670 (expr_list:REG_UNUSED (reg:CC 17 flags)
2673 (insn 66 65 67 9 (set (reg:DF 62 [ D.16258 ])
2674 (mem:DF (reg:SI 58 [ D.16264 ]) [0 S8 A64])) 64 {*movdf_integer} (nil)
2675 (expr_list:REG_DEAD (reg:SI 58 [ D.16264 ])
2677 ;; End of basic block 9, registers live:
2678 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2680 ;; Start of basic block 10, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 62
2681 (code_label 67 66 68 10 44 "" [3 uses])
2683 (note 68 67 69 10 [bb 10] NOTE_INSN_BASIC_BLOCK)
2685 (insn 69 68 72 10 (set (reg:DF 63 [ <result> ])
2686 (reg:DF 62 [ D.16258 ])) 64 {*movdf_integer} (nil)
2687 (expr_list:REG_DEAD (reg:DF 62 [ D.16258 ])
2690 (note 72 69 75 10 NOTE_INSN_FUNCTION_END)
2692 (insn 75 72 81 10 (set (reg/i:DF 8 st [ <result> ])
2693 (reg:DF 63 [ <result> ])) 64 {*movdf_integer} (nil)
2694 (expr_list:REG_DEAD (reg:DF 63 [ <result> ])
2697 (insn 81 75 0 10 (use (reg/i:DF 8 st [ <result> ])) -1 (nil)
2699 ;; End of basic block 10, registers live:
2700 6 [bp] 7 [sp] 8 [st] 16 [argp] 20 [frame]
2703 ;; Function char* GetStringValue(char*) (_Z14GetStringValuePc@4)
2709 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
2710 Register 59 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
2712 Register 53 pref FLOAT_INT_SSE_REGS or none
2713 Register 54 pref FLOAT_INT_SSE_REGS or none
2714 Register 55 pref FLOAT_INT_SSE_REGS or none
2715 Register 56 pref FLOAT_INT_SSE_REGS or none
2716 Register 57 pref FLOAT_INT_SSE_REGS or none
2717 Register 58 pref GENERAL_REGS or none
2718 Register 59 pref AREG, else GENERAL_REGS
2719 Register 60 pref FLOAT_INT_SSE_REGS or none
2722 Register 58 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none.
2724 Register 59 used 2 times across 2 insns in block 2; set 1 time; pref AREG, else GENERAL_REGS.
2726 3 basic blocks, 2 edges.
2728 Basic block 2 , prev 0, next 1, loop_depth 0, count 0, freq 0.
2729 Predecessors: ENTRY (fallthru)
2730 Successors: EXIT [100.0%] (fallthru)
2731 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2732 Registers live at end: 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2734 ;; Register 58 in 0.
2735 ;; Register 59 in 0.
2736 (note 2 0 3 NOTE_INSN_DELETED)
2738 (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
2740 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2741 (note 5 3 7 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
2743 (insn 7 5 8 2 (parallel [
2744 (set (reg/f:SI 7 sp)
2745 (plus:SI (reg/f:SI 7 sp)
2746 (const_int -8 [0xfffffff8])))
2747 (clobber (reg:CC 17 flags))
2748 ]) 148 {*addsi_1} (nil)
2749 (expr_list:REG_UNUSED (reg:CC 17 flags)
2752 (insn 8 7 9 2 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2753 (mem/c/i:SI (reg/f:SI 16 argp) [0 spar+0 S4 A32])) 28 {*pushsi2} (nil)
2756 (insn 9 8 10 2 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2757 (symbol_ref/f:SI ("*LC9") [flags 0x2] <string_cst 0xb6b11540>)) 28 {*pushsi2} (nil)
2760 (call_insn 10 9 11 2 (set (reg:SI 0 ax)
2761 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
2762 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2763 (expr_list:REG_UNUSED (reg:SI 0 ax)
2764 (expr_list:REG_EH_REGION (const_int 0 [0x0])
2768 (insn 11 10 13 2 (parallel [
2769 (set (reg/f:SI 7 sp)
2770 (plus:SI (reg/f:SI 7 sp)
2771 (const_int 16 [0x10])))
2772 (clobber (reg:CC 17 flags))
2773 ]) 148 {*addsi_1} (nil)
2774 (expr_list:REG_UNUSED (reg:CC 17 flags)
2777 (insn 13 11 14 2 (set (reg:SI 58 [ D.16252 ])
2778 (mem/c/i:SI (reg/f:SI 16 argp) [0 spar+0 S4 A32])) 34 {*movsi_1} (nil)
2781 (insn 14 13 17 2 (set (reg:SI 59 [ <result> ])
2782 (reg:SI 58 [ D.16252 ])) 34 {*movsi_1} (nil)
2783 (expr_list:REG_DEAD (reg:SI 58 [ D.16252 ])
2786 (note 17 14 20 2 NOTE_INSN_FUNCTION_END)
2788 (insn 20 17 26 2 (set (reg/i:SI 0 ax [ <result> ])
2789 (reg:SI 59 [ <result> ])) 34 {*movsi_1} (nil)
2790 (expr_list:REG_DEAD (reg:SI 59 [ <result> ])
2793 (insn 26 20 0 2 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
2795 ;; End of basic block 2, registers live:
2796 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2799 ;; Function double GetDoubleValue(double) (_Z14GetDoubleValued@8)
2805 Register 58 costs: AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FP_TOP_REG:0 FP_SECOND_REG:0 FLOAT_REGS:0 FP_TOP_SSE_REGS:18000 FP_SECOND_SSE_REGS:18000 FLOAT_SSE_REGS:18000 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
2806 Register 59 costs: AD_REGS:9000 Q_REGS:9000 NON_Q_REGS:9000 INDEX_REGS:9000 LEGACY_REGS:9000 GENERAL_REGS:9000 FP_TOP_REG:-1000 FP_SECOND_REG:0 FLOAT_REGS:0 FP_TOP_SSE_REGS:18000 FP_SECOND_SSE_REGS:18000 FLOAT_SSE_REGS:18000 FLOAT_INT_REGS:27000 INT_SSE_REGS:27000 FLOAT_INT_SSE_REGS:27000 ALL_REGS:27000 MEM:5000
2807 Register 60 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
2808 Register 61 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
2810 Register 53 pref FLOAT_INT_SSE_REGS or none
2811 Register 54 pref FLOAT_INT_SSE_REGS or none
2812 Register 55 pref FLOAT_INT_SSE_REGS or none
2813 Register 56 pref FLOAT_INT_SSE_REGS or none
2814 Register 57 pref FLOAT_INT_SSE_REGS or none
2815 Register 58 pref FLOAT_INT_REGS or none
2816 Register 59 pref FP_TOP_REG, else FLOAT_REGS
2817 Register 60 pref GENERAL_REGS or none
2818 Register 61 pref GENERAL_REGS or none
2819 Register 62 pref FLOAT_INT_SSE_REGS or none
2822 Register 58 used 2 times across 2 insns in block 2; set 1 time; 8 bytes; FLOAT_INT_REGS or none.
2824 Register 59 used 2 times across 2 insns in block 2; set 1 time; 8 bytes; pref FP_TOP_REG, else FLOAT_REGS.
2826 Register 60 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none.
2828 Register 61 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none.
2830 3 basic blocks, 2 edges.
2832 Basic block 2 , prev 0, next 1, loop_depth 0, count 0, freq 0.
2833 Predecessors: ENTRY (fallthru)
2834 Successors: EXIT [100.0%] (fallthru)
2835 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2836 Registers live at end: 6 [bp] 7 [sp] 8 [st] 16 [argp] 20 [frame]
2838 ;; Register 58 in 0.
2839 ;; Register 59 in 8.
2840 ;; Register 60 in 0.
2841 ;; Register 61 in 0.
2842 (note 2 0 8 NOTE_INSN_DELETED)
2844 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2845 (note 8 2 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
2847 (insn 3 8 4 2 (set (reg:SI 60 [ dpar ])
2848 (mem/c/i:SI (reg/f:SI 16 argp) [0 dpar+0 S4 A32])) 34 {*movsi_1} (nil)
2851 (insn 4 3 5 2 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
2852 (const_int -8 [0xfffffff8])) [0 dpar+0 S4 A64])
2853 (reg:SI 60 [ dpar ])) 34 {*movsi_1} (nil)
2854 (expr_list:REG_DEAD (reg:SI 60 [ dpar ])
2857 (insn 5 4 6 2 (set (reg:SI 61 [ dpar+4 ])
2858 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
2859 (const_int 4 [0x4])) [0 dpar+4 S4 A32])) 34 {*movsi_1} (nil)
2862 (insn 6 5 7 2 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
2863 (const_int -4 [0xfffffffc])) [0 dpar+4 S4 A32])
2864 (reg:SI 61 [ dpar+4 ])) 34 {*movsi_1} (nil)
2865 (expr_list:REG_DEAD (reg:SI 61 [ dpar+4 ])
2868 (note 7 6 11 2 NOTE_INSN_FUNCTION_BEG)
2870 (insn 11 7 12 2 (parallel [
2871 (set (reg/f:SI 7 sp)
2872 (plus:SI (reg/f:SI 7 sp)
2873 (const_int -4 [0xfffffffc])))
2874 (clobber (reg:CC 17 flags))
2875 ]) 148 {*addsi_1} (nil)
2876 (expr_list:REG_UNUSED (reg:CC 17 flags)
2879 (insn 12 11 13 2 (set (mem/i:DF (pre_dec:SI (reg/f:SI 7 sp)) [0 S8 A64])
2880 (mem/c/i:DF (plus:SI (reg/f:SI 20 frame)
2881 (const_int -8 [0xfffffff8])) [0 dpar+0 S8 A64])) 62 {*pushdf_integer} (nil)
2884 (insn 13 12 14 2 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2885 (symbol_ref/f:SI ("*LC10") [flags 0x2] <string_cst 0xb6b20888>)) 28 {*pushsi2} (nil)
2888 (call_insn 14 13 15 2 (set (reg:SI 0 ax)
2889 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
2890 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2891 (expr_list:REG_UNUSED (reg:SI 0 ax)
2892 (expr_list:REG_EH_REGION (const_int 0 [0x0])
2896 (insn 15 14 17 2 (parallel [
2897 (set (reg/f:SI 7 sp)
2898 (plus:SI (reg/f:SI 7 sp)
2899 (const_int 16 [0x10])))
2900 (clobber (reg:CC 17 flags))
2901 ]) 148 {*addsi_1} (nil)
2902 (expr_list:REG_UNUSED (reg:CC 17 flags)
2905 (insn 17 15 18 2 (set (reg:DF 58 [ D.16248 ])
2906 (mem/c/i:DF (plus:SI (reg/f:SI 20 frame)
2907 (const_int -8 [0xfffffff8])) [0 dpar+0 S8 A64])) 64 {*movdf_integer} (nil)
2910 (insn 18 17 21 2 (set (reg:DF 59 [ <result> ])
2911 (reg:DF 58 [ D.16248 ])) 64 {*movdf_integer} (nil)
2912 (expr_list:REG_DEAD (reg:DF 58 [ D.16248 ])
2915 (note 21 18 24 2 NOTE_INSN_FUNCTION_END)
2917 (insn 24 21 30 2 (set (reg/i:DF 8 st [ <result> ])
2918 (reg:DF 59 [ <result> ])) 64 {*movdf_integer} (nil)
2919 (expr_list:REG_DEAD (reg:DF 59 [ <result> ])
2922 (insn 30 24 0 2 (use (reg/i:DF 8 st [ <result> ])) -1 (nil)
2924 ;; End of basic block 2, registers live:
2925 6 [bp] 7 [sp] 8 [st] 16 [argp] 20 [frame]
2928 ;; Function int GetIntValue(int) (_Z11GetIntValuei@4)
2934 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
2935 Register 59 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
2937 Register 53 pref FLOAT_INT_SSE_REGS or none
2938 Register 54 pref FLOAT_INT_SSE_REGS or none
2939 Register 55 pref FLOAT_INT_SSE_REGS or none
2940 Register 56 pref FLOAT_INT_SSE_REGS or none
2941 Register 57 pref FLOAT_INT_SSE_REGS or none
2942 Register 58 pref GENERAL_REGS or none
2943 Register 59 pref AREG, else GENERAL_REGS
2944 Register 60 pref FLOAT_INT_SSE_REGS or none
2947 Register 58 used 2 times across 2 insns in block 2; set 1 time; GENERAL_REGS or none.
2949 Register 59 used 2 times across 2 insns in block 2; set 1 time; pref AREG, else GENERAL_REGS.
2951 3 basic blocks, 2 edges.
2953 Basic block 2 , prev 0, next 1, loop_depth 0, count 0, freq 0.
2954 Predecessors: ENTRY (fallthru)
2955 Successors: EXIT [100.0%] (fallthru)
2956 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2957 Registers live at end: 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2959 ;; Register 58 in 0.
2960 ;; Register 59 in 0.
2961 (note 2 0 3 NOTE_INSN_DELETED)
2963 (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
2965 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
2966 (note 5 3 7 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
2968 (insn 7 5 8 2 (parallel [
2969 (set (reg/f:SI 7 sp)
2970 (plus:SI (reg/f:SI 7 sp)
2971 (const_int -8 [0xfffffff8])))
2972 (clobber (reg:CC 17 flags))
2973 ]) 148 {*addsi_1} (nil)
2974 (expr_list:REG_UNUSED (reg:CC 17 flags)
2977 (insn 8 7 9 2 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2978 (mem/c/i:SI (reg/f:SI 16 argp) [0 ipar+0 S4 A32])) 28 {*pushsi2} (nil)
2981 (insn 9 8 10 2 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
2982 (symbol_ref/f:SI ("*LC11") [flags 0x2] <string_cst 0xb6b346e0>)) 28 {*pushsi2} (nil)
2985 (call_insn 10 9 11 2 (set (reg:SI 0 ax)
2986 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
2987 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
2988 (expr_list:REG_UNUSED (reg:SI 0 ax)
2989 (expr_list:REG_EH_REGION (const_int 0 [0x0])
2993 (insn 11 10 13 2 (parallel [
2994 (set (reg/f:SI 7 sp)
2995 (plus:SI (reg/f:SI 7 sp)
2996 (const_int 16 [0x10])))
2997 (clobber (reg:CC 17 flags))
2998 ]) 148 {*addsi_1} (nil)
2999 (expr_list:REG_UNUSED (reg:CC 17 flags)
3002 (insn 13 11 14 2 (set (reg:SI 58 [ D.16244 ])
3003 (mem/c/i:SI (reg/f:SI 16 argp) [0 ipar+0 S4 A32])) 34 {*movsi_1} (nil)
3006 (insn 14 13 17 2 (set (reg:SI 59 [ <result> ])
3007 (reg:SI 58 [ D.16244 ])) 34 {*movsi_1} (nil)
3008 (expr_list:REG_DEAD (reg:SI 58 [ D.16244 ])
3011 (note 17 14 20 2 NOTE_INSN_FUNCTION_END)
3013 (insn 20 17 26 2 (set (reg/i:SI 0 ax [ <result> ])
3014 (reg:SI 59 [ <result> ])) 34 {*movsi_1} (nil)
3015 (expr_list:REG_DEAD (reg:SI 59 [ <result> ])
3018 (insn 26 20 0 2 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
3020 ;; End of basic block 2, registers live:
3021 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3024 ;; Function int ProcessStringArray(MqlStr*, int) (_Z18ProcessStringArrayP6MqlStri@8)
3030 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3031 Register 59 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3032 Register 60 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3033 Register 61 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3034 Register 62 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3035 Register 63 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3036 Register 64 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3037 Register 65 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3038 Register 66 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3039 Register 67 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3040 Register 68 costs: AREG:2000 DREG:2000 CREG:2000 BREG:2000 SIREG:2000 DIREG:2000 AD_REGS:2000 Q_REGS:2000 NON_Q_REGS:2000 INDEX_REGS:2000 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:12000 INT_SSE_REGS:12000 FLOAT_INT_SSE_REGS:12000 ALL_REGS:12000 MEM:4000
3041 Register 69 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3042 Register 70 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3043 Register 71 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3044 Register 72 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3045 Register 73 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3046 Register 74 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3047 Register 75 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3048 Register 76 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3049 Register 77 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3050 Register 78 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3051 Register 79 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3052 Register 80 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3053 Register 81 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3054 Register 82 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3055 Register 83 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3056 Register 84 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3057 Register 85 costs: AREG:2000 DREG:2000 CREG:2000 BREG:2000 SIREG:2000 DIREG:2000 AD_REGS:2000 Q_REGS:2000 NON_Q_REGS:2000 INDEX_REGS:2000 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:12000 INT_SSE_REGS:12000 FLOAT_INT_SSE_REGS:12000 ALL_REGS:12000 MEM:4000
3058 Register 86 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3059 Register 87 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3060 Register 88 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3061 Register 89 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3062 Register 90 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3063 Register 91 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3064 Register 92 costs: AREG:2000 DREG:2000 CREG:2000 BREG:2000 SIREG:2000 DIREG:2000 AD_REGS:2000 Q_REGS:2000 NON_Q_REGS:2000 INDEX_REGS:2000 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:12000 INT_SSE_REGS:12000 FLOAT_INT_SSE_REGS:12000 ALL_REGS:12000 MEM:4000
3065 Register 93 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3066 Register 94 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3067 Register 95 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3068 Register 96 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3069 Register 97 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3070 Register 98 costs: AREG:2000 DREG:2000 CREG:2000 BREG:2000 SIREG:2000 DIREG:2000 AD_REGS:2000 Q_REGS:2000 NON_Q_REGS:2000 INDEX_REGS:2000 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:12000 INT_SSE_REGS:12000 FLOAT_INT_SSE_REGS:12000 ALL_REGS:12000 MEM:4000
3071 Register 99 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3072 Register 100 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3073 Register 101 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3074 Register 102 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3075 Register 103 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3076 Register 104 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3077 Register 105 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3078 Register 106 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3079 Register 107 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3080 Register 108 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:2000
3081 Register 109 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3082 Register 110 costs: AREG:2000 DREG:2000 CREG:2000 BREG:2000 SIREG:2000 DIREG:2000 AD_REGS:2000 Q_REGS:2000 NON_Q_REGS:2000 INDEX_REGS:2000 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:12000 INT_SSE_REGS:12000 FLOAT_INT_SSE_REGS:12000 ALL_REGS:12000 MEM:5000
3083 Register 111 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:7000
3084 Register 112 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
3085 Register 113 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
3087 Register 53 pref FLOAT_INT_SSE_REGS or none
3088 Register 54 pref FLOAT_INT_SSE_REGS or none
3089 Register 55 pref FLOAT_INT_SSE_REGS or none
3090 Register 56 pref FLOAT_INT_SSE_REGS or none
3091 Register 57 pref FLOAT_INT_SSE_REGS or none
3092 Register 58 pref GENERAL_REGS or none
3093 Register 59 pref GENERAL_REGS or none
3094 Register 60 pref GENERAL_REGS or none
3095 Register 61 pref GENERAL_REGS or none
3096 Register 62 pref GENERAL_REGS or none
3097 Register 63 pref GENERAL_REGS or none
3098 Register 64 pref GENERAL_REGS or none
3099 Register 65 pref GENERAL_REGS or none
3100 Register 66 pref GENERAL_REGS or none
3101 Register 67 pref GENERAL_REGS or none
3102 Register 68 pref GENERAL_REGS or none
3103 Register 69 pref GENERAL_REGS or none
3104 Register 70 pref GENERAL_REGS or none
3105 Register 71 pref GENERAL_REGS or none
3106 Register 72 pref GENERAL_REGS or none
3107 Register 73 pref GENERAL_REGS or none
3108 Register 74 pref GENERAL_REGS or none
3109 Register 75 pref GENERAL_REGS or none
3110 Register 76 pref GENERAL_REGS or none
3111 Register 77 pref GENERAL_REGS or none
3112 Register 78 pref GENERAL_REGS or none
3113 Register 79 pref GENERAL_REGS or none
3114 Register 80 pref GENERAL_REGS or none
3115 Register 81 pref GENERAL_REGS or none
3116 Register 82 pref GENERAL_REGS or none
3117 Register 83 pref GENERAL_REGS or none
3118 Register 84 pref GENERAL_REGS or none
3119 Register 85 pref GENERAL_REGS or none
3120 Register 86 pref AREG, else GENERAL_REGS
3121 Register 87 pref GENERAL_REGS or none
3122 Register 88 pref GENERAL_REGS or none
3123 Register 89 pref GENERAL_REGS or none
3124 Register 90 pref GENERAL_REGS or none
3125 Register 91 pref GENERAL_REGS or none
3126 Register 92 pref GENERAL_REGS or none
3127 Register 93 pref GENERAL_REGS or none
3128 Register 94 pref GENERAL_REGS or none
3129 Register 95 pref GENERAL_REGS or none
3130 Register 96 pref GENERAL_REGS or none
3131 Register 97 pref GENERAL_REGS or none
3132 Register 98 pref GENERAL_REGS or none
3133 Register 99 pref AREG, else GENERAL_REGS
3134 Register 100 pref GENERAL_REGS or none
3135 Register 101 pref GENERAL_REGS or none
3136 Register 102 pref GENERAL_REGS or none
3137 Register 103 pref GENERAL_REGS or none
3138 Register 104 pref GENERAL_REGS or none
3139 Register 105 pref GENERAL_REGS or none
3140 Register 106 pref GENERAL_REGS or none
3141 Register 107 pref GENERAL_REGS or none
3142 Register 108 pref GENERAL_REGS or none
3143 Register 109 pref GENERAL_REGS or none
3144 Register 110 pref GENERAL_REGS or none
3145 Register 111 pref GENERAL_REGS or none
3146 Register 112 pref AREG, else GENERAL_REGS
3147 Register 113 pref GENERAL_REGS or none
3148 Register 114 pref FLOAT_INT_SSE_REGS or none
3151 Register 58 used 2 times across 4 insns in block 16; set 1 time; GENERAL_REGS or none.
3153 Register 59 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
3155 Register 60 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
3157 Register 61 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
3159 Register 62 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
3161 Register 63 used 2 times across 8 insns in block 16; set 1 time; GENERAL_REGS or none.
3163 Register 64 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
3165 Register 65 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
3167 Register 66 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
3169 Register 67 used 2 times across 2 insns in block 16; set 1 time; GENERAL_REGS or none.
3171 Register 68 used 2 times across 5 insns in block 16; set 1 time; GENERAL_REGS or none.
3173 Register 69 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
3175 Register 70 used 2 times across 4 insns in block 15; set 1 time; GENERAL_REGS or none.
3177 Register 71 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none; pointer.
3179 Register 72 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
3181 Register 73 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
3183 Register 74 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
3185 Register 75 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
3187 Register 76 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
3189 Register 77 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
3191 Register 78 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
3193 Register 79 used 2 times across 2 insns in block 14; set 1 time; GENERAL_REGS or none.
3195 Register 80 used 2 times across 2 insns in block 13; set 1 time; GENERAL_REGS or none.
3197 Register 81 used 2 times across 2 insns in block 13; set 1 time; GENERAL_REGS or none.
3199 Register 82 used 2 times across 2 insns in block 13; set 1 time; GENERAL_REGS or none.
3201 Register 83 used 2 times across 2 insns in block 13; set 1 time; GENERAL_REGS or none.
3203 Register 84 used 2 times across 2 insns in block 13; set 1 time; GENERAL_REGS or none.
3205 Register 85 used 2 times across 5 insns in block 13; set 1 time; GENERAL_REGS or none.
3207 Register 86 used 2 times across 2 insns in block 12; set 1 time; pref AREG, else GENERAL_REGS.
3209 Register 87 used 2 times across 3 insns in block 12; set 1 time; GENERAL_REGS or none.
3211 Register 88 used 2 times across 2 insns in block 12; set 1 time; GENERAL_REGS or none.
3213 Register 89 used 2 times across 2 insns in block 12; set 1 time; GENERAL_REGS or none.
3215 Register 90 used 2 times across 2 insns in block 12; set 1 time; GENERAL_REGS or none.
3217 Register 91 used 2 times across 2 insns in block 12; set 1 time; GENERAL_REGS or none.
3219 Register 92 used 2 times across 5 insns in block 12; set 1 time; GENERAL_REGS or none.
3221 Register 93 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.
3223 Register 94 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.
3225 Register 95 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.
3227 Register 96 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.
3229 Register 97 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.
3231 Register 98 used 2 times across 5 insns in block 10; set 1 time; GENERAL_REGS or none.
3233 Register 99 used 2 times across 2 insns in block 9; set 1 time; pref AREG, else GENERAL_REGS.
3235 Register 100 used 2 times across 3 insns in block 9; set 1 time; GENERAL_REGS or none.
3237 Register 101 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
3239 Register 102 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
3241 Register 103 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
3243 Register 104 used 2 times across 2 insns in block 9; set 1 time; GENERAL_REGS or none.
3245 Register 105 used 2 times across 2 insns in block 7; set 1 time; GENERAL_REGS or none.
3247 Register 106 used 2 times across 2 insns in block 7; set 1 time; GENERAL_REGS or none.
3249 Register 107 used 2 times across 2 insns in block 7; set 1 time; GENERAL_REGS or none.
3251 Register 108 used 2 times across 2 insns in block 7; set 1 time; GENERAL_REGS or none.
3253 Register 109 used 2 times across 2 insns in block 7; set 1 time; GENERAL_REGS or none.
3255 Register 110 used 2 times across 2 insns in block 18; set 1 time; GENERAL_REGS or none.
3257 Register 111 used 4 times across 6 insns; set 3 times; GENERAL_REGS or none.
3259 Register 112 used 2 times across 2 insns in block 20; set 1 time; pref AREG, else GENERAL_REGS.
3261 Register 113 used 2 times across 2 insns in block 15; set 1 time; GENERAL_REGS or none.
3263 21 basic blocks, 28 edges.
3265 Basic block 2 , prev 0, next 3, loop_depth 0, count 0, freq 0.
3266 Predecessors: ENTRY (fallthru)
3267 Successors: 3 (fallthru) 4
3268 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3269 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3271 Basic block 3 , prev 2, next 4, loop_depth 0, count 0, freq 0.
3272 Predecessors: 2 (fallthru)
3274 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3275 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 111
3277 Basic block 4 , prev 3, next 5, loop_depth 0, count 0, freq 0.
3279 Successors: 5 (fallthru) 6
3280 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3281 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3283 Basic block 5 , prev 4, next 6, loop_depth 0, count 0, freq 0.
3284 Predecessors: 4 (fallthru)
3286 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3287 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 111
3289 Basic block 6 , prev 5, next 7, loop_depth 0, count 0, freq 0.
3292 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3293 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3295 Basic block 7 , prev 6, next 8, loop_depth 0, count 0, freq 0.
3297 Successors: 8 (fallthru) 9
3298 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3299 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3301 Basic block 8 , prev 7, next 9, loop_depth 0, count 0, freq 0.
3302 Predecessors: 7 (fallthru)
3304 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3305 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3307 Basic block 9 , prev 8, next 10, loop_depth 0, count 0, freq 0.
3309 Successors: 10 (fallthru)
3310 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3311 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3313 Basic block 10 , prev 9, next 11, loop_depth 0, count 0, freq 0.
3314 Predecessors: 8 9 (fallthru)
3315 Successors: 11 (fallthru) 12
3316 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3317 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3319 Basic block 11 , prev 10, next 12, loop_depth 0, count 0, freq 0.
3320 Predecessors: 10 (fallthru)
3322 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3323 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3325 Basic block 12 , prev 11, next 13, loop_depth 0, count 0, freq 0.
3327 Successors: 13 (fallthru)
3328 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3329 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3331 Basic block 13 , prev 12, next 14, loop_depth 0, count 0, freq 0.
3332 Predecessors: 11 12 (fallthru)
3333 Successors: 17 14 (fallthru)
3334 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3335 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3337 Basic block 14 , prev 13, next 15, loop_depth 0, count 0, freq 0.
3338 Predecessors: 13 (fallthru)
3339 Successors: 17 15 (fallthru)
3340 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3341 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3343 Basic block 15 , prev 14, next 16, loop_depth 0, count 0, freq 0.
3344 Predecessors: 14 (fallthru)
3345 Successors: 17 16 (fallthru)
3346 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3347 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3349 Basic block 16 , prev 15, next 17, loop_depth 0, count 0, freq 0.
3350 Predecessors: 15 (fallthru)
3351 Successors: 17 (fallthru)
3352 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3353 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3355 Basic block 17 , prev 16, next 18, loop_depth 0, count 0, freq 0.
3356 Predecessors: 13 14 15 16 (fallthru)
3357 Successors: 18 (fallthru)
3358 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3359 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3361 Basic block 18 , prev 17, next 19, loop_depth 0, count 0, freq 0.
3362 Predecessors: 6 17 (fallthru)
3363 Successors: 7 19 (fallthru)
3364 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3365 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3367 Basic block 19 , prev 18, next 20, loop_depth 0, count 0, freq 0.
3368 Predecessors: 18 (fallthru)
3369 Successors: 20 (fallthru)
3370 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3371 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 111
3373 Basic block 20 , prev 19, next 1, loop_depth 0, count 0, freq 0.
3374 Predecessors: 3 5 19 (fallthru)
3375 Successors: EXIT [100.0%] (fallthru)
3376 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 111
3377 Registers live at end: 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3379 ;; Register 58 in 0.
3380 ;; Register 59 in 0.
3381 ;; Register 60 in 0.
3382 ;; Register 61 in 0.
3383 ;; Register 62 in 0.
3384 ;; Register 63 in 1.
3385 ;; Register 64 in 0.
3386 ;; Register 65 in 0.
3387 ;; Register 66 in 0.
3388 ;; Register 67 in 0.
3389 ;; Register 68 in 1.
3390 ;; Register 69 in 0.
3391 ;; Register 70 in 1.
3392 ;; Register 71 in 0.
3393 ;; Register 72 in 0.
3394 ;; Register 73 in 0.
3395 ;; Register 74 in 0.
3396 ;; Register 75 in 0.
3397 ;; Register 76 in 0.
3398 ;; Register 77 in 0.
3399 ;; Register 78 in 0.
3400 ;; Register 79 in 0.
3401 ;; Register 80 in 0.
3402 ;; Register 81 in 0.
3403 ;; Register 82 in 0.
3404 ;; Register 83 in 0.
3405 ;; Register 84 in 0.
3406 ;; Register 85 in 1.
3407 ;; Register 86 in 0.
3408 ;; Register 87 in 0.
3409 ;; Register 88 in 0.
3410 ;; Register 89 in 0.
3411 ;; Register 90 in 0.
3412 ;; Register 91 in 0.
3413 ;; Register 92 in 1.
3414 ;; Register 93 in 0.
3415 ;; Register 94 in 0.
3416 ;; Register 95 in 0.
3417 ;; Register 96 in 0.
3418 ;; Register 97 in 0.
3419 ;; Register 98 in 1.
3420 ;; Register 99 in 0.
3421 ;; Register 100 in 0.
3422 ;; Register 101 in 0.
3423 ;; Register 102 in 0.
3424 ;; Register 103 in 0.
3425 ;; Register 104 in 0.
3426 ;; Register 105 in 0.
3427 ;; Register 106 in 0.
3428 ;; Register 107 in 0.
3429 ;; Register 108 in 0.
3430 ;; Register 109 in 0.
3431 ;; Register 110 in 0.
3432 ;; Register 112 in 0.
3433 ;; Register 113 in 0.
3434 (note 2 0 3 NOTE_INSN_DELETED)
3436 (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
3438 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3439 (note 5 3 7 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
3441 (insn 7 5 8 2 (set (reg:CCZ 17 flags)
3442 (compare:CCZ (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])
3443 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
3446 (jump_insn 8 7 10 2 (set (pc)
3447 (if_then_else (ne (reg:CCZ 17 flags)
3448 (const_int 0 [0x0]))
3450 (pc))) 365 {*jcc_1} (nil)
3451 (expr_list:REG_DEAD (reg:CCZ 17 flags)
3453 ;; End of basic block 2, registers live:
3454 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3456 ;; Start of basic block 3, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3457 (note 10 8 12 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
3459 (insn 12 10 13 3 (parallel [
3460 (set (reg/f:SI 7 sp)
3461 (plus:SI (reg/f:SI 7 sp)
3462 (const_int -12 [0xfffffff4])))
3463 (clobber (reg:CC 17 flags))
3464 ]) 148 {*addsi_1} (nil)
3465 (expr_list:REG_UNUSED (reg:CC 17 flags)
3468 (insn 13 12 14 3 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
3469 (symbol_ref/f:SI ("*LC12") [flags 0x2] <string_cst 0xb6b20b94>)) 28 {*pushsi2} (nil)
3472 (call_insn 14 13 15 3 (set (reg:SI 0 ax)
3473 (call (mem:QI (symbol_ref:SI ("puts") [flags 0x41] <function_decl 0xb72e5d20 __builtin_puts>) [0 S1 A8])
3474 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
3475 (expr_list:REG_UNUSED (reg:SI 0 ax)
3479 (insn 15 14 17 3 (parallel [
3480 (set (reg/f:SI 7 sp)
3481 (plus:SI (reg/f:SI 7 sp)
3482 (const_int 16 [0x10])))
3483 (clobber (reg:CC 17 flags))
3484 ]) 148 {*addsi_1} (nil)
3485 (expr_list:REG_UNUSED (reg:CC 17 flags)
3488 (insn 17 15 18 3 (set (reg:SI 111 [ D.16337 ])
3489 (const_int -1 [0xffffffff])) 34 {*movsi_1} (nil)
3492 (jump_insn 18 17 19 3 (set (pc)
3493 (label_ref 168)) 380 {jump} (nil)
3495 ;; End of basic block 3, registers live:
3496 6 [bp] 7 [sp] 16 [argp] 20 [frame] 111
3500 ;; Start of basic block 4, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3501 (code_label 20 19 21 4 58 "" [1 uses])
3503 (note 21 20 23 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
3505 (insn 23 21 24 4 (set (reg:CCNO 17 flags)
3506 (compare:CCNO (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
3507 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])
3508 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
3511 (jump_insn 24 23 26 4 (set (pc)
3512 (if_then_else (gt (reg:CCNO 17 flags)
3513 (const_int 0 [0x0]))
3515 (pc))) 365 {*jcc_1} (nil)
3516 (expr_list:REG_DEAD (reg:CCNO 17 flags)
3518 ;; End of basic block 4, registers live:
3519 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3521 ;; Start of basic block 5, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3522 (note 26 24 28 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
3524 (insn 28 26 29 5 (parallel [
3525 (set (reg/f:SI 7 sp)
3526 (plus:SI (reg/f:SI 7 sp)
3527 (const_int -8 [0xfffffff8])))
3528 (clobber (reg:CC 17 flags))
3529 ]) 148 {*addsi_1} (nil)
3530 (expr_list:REG_UNUSED (reg:CC 17 flags)
3533 (insn 29 28 30 5 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
3534 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
3535 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])) 28 {*pushsi2} (nil)
3538 (insn 30 29 31 5 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
3539 (symbol_ref/f:SI ("*LC13") [flags 0x2] <string_cst 0xb6b38640>)) 28 {*pushsi2} (nil)
3542 (call_insn 31 30 32 5 (set (reg:SI 0 ax)
3543 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
3544 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
3545 (expr_list:REG_UNUSED (reg:SI 0 ax)
3546 (expr_list:REG_EH_REGION (const_int 0 [0x0])
3550 (insn 32 31 34 5 (parallel [
3551 (set (reg/f:SI 7 sp)
3552 (plus:SI (reg/f:SI 7 sp)
3553 (const_int 16 [0x10])))
3554 (clobber (reg:CC 17 flags))
3555 ]) 148 {*addsi_1} (nil)
3556 (expr_list:REG_UNUSED (reg:CC 17 flags)
3559 (insn 34 32 35 5 (set (reg:SI 111 [ D.16337 ])
3560 (const_int -1 [0xffffffff])) 34 {*movsi_1} (nil)
3563 (jump_insn 35 34 36 5 (set (pc)
3564 (label_ref 168)) 380 {jump} (nil)
3566 ;; End of basic block 5, registers live:
3567 6 [bp] 7 [sp] 16 [argp] 20 [frame] 111
3571 ;; Start of basic block 6, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3572 (code_label 37 36 38 6 61 "" [1 uses])
3574 (note 38 37 40 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
3576 (insn 40 38 41 6 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3577 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])
3578 (const_int 0 [0x0])) 34 {*movsi_1} (nil)
3581 (jump_insn 41 40 42 6 (set (pc)
3582 (label_ref 159)) 380 {jump} (nil)
3584 ;; End of basic block 6, registers live:
3585 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3589 ;; Start of basic block 7, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3590 (code_label 43 42 44 7 64 "" [1 uses])
3592 (note 44 43 46 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
3594 (insn 46 44 47 7 (set (reg:SI 109 [ i.14 ])
3595 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3596 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
3599 (insn 47 46 48 7 (parallel [
3600 (set (reg:SI 108 [ D.16344 ])
3601 (ashift:SI (reg:SI 109 [ i.14 ])
3602 (const_int 3 [0x3])))
3603 (clobber (reg:CC 17 flags))
3604 ]) 288 {*ashlsi3_1} (nil)
3605 (expr_list:REG_DEAD (reg:SI 109 [ i.14 ])
3606 (expr_list:REG_UNUSED (reg:CC 17 flags)
3609 (insn 48 47 49 7 (set (reg:SI 107 [ D.16345 ])
3610 (reg:SI 108 [ D.16344 ])) 34 {*movsi_1} (nil)
3611 (expr_list:REG_DEAD (reg:SI 108 [ D.16344 ])
3614 (insn 49 48 50 7 (parallel [
3615 (set (reg:SI 106 [ D.16346 ])
3616 (plus:SI (reg:SI 107 [ D.16345 ])
3617 (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])))
3618 (clobber (reg:CC 17 flags))
3619 ]) 148 {*addsi_1} (nil)
3620 (expr_list:REG_DEAD (reg:SI 107 [ D.16345 ])
3621 (expr_list:REG_UNUSED (reg:CC 17 flags)
3624 (insn 50 49 51 7 (set (reg:SI 105 [ D.16347 ])
3625 (mem/s/f/j:SI (plus:SI (reg:SI 106 [ D.16346 ])
3626 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
3627 (expr_list:REG_DEAD (reg:SI 106 [ D.16346 ])
3630 (insn 51 50 52 7 (set (reg:CCZ 17 flags)
3631 (compare:CCZ (reg:SI 105 [ D.16347 ])
3632 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
3633 (expr_list:REG_DEAD (reg:SI 105 [ D.16347 ])
3636 (jump_insn 52 51 54 7 (set (pc)
3637 (if_then_else (ne (reg:CCZ 17 flags)
3638 (const_int 0 [0x0]))
3640 (pc))) 365 {*jcc_1} (nil)
3641 (expr_list:REG_DEAD (reg:CCZ 17 flags)
3643 ;; End of basic block 7, registers live:
3644 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3646 ;; Start of basic block 8, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3647 (note 54 52 55 8 [bb 8] NOTE_INSN_BASIC_BLOCK)
3649 (insn 55 54 56 8 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3650 (const_int -12 [0xfffffff4])) [0 len1+0 S4 A32])
3651 (const_int 0 [0x0])) 34 {*movsi_1} (nil)
3654 (jump_insn 56 55 57 8 (set (pc)
3655 (label_ref 72)) 380 {jump} (nil)
3657 ;; End of basic block 8, registers live:
3658 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3662 ;; Start of basic block 9, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3663 (code_label 58 57 59 9 65 "" [1 uses])
3665 (note 59 58 61 9 [bb 9] NOTE_INSN_BASIC_BLOCK)
3667 (insn 61 59 62 9 (set (reg:SI 104 [ i.15 ])
3668 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3669 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
3672 (insn 62 61 63 9 (parallel [
3673 (set (reg:SI 103 [ D.16349 ])
3674 (ashift:SI (reg:SI 104 [ i.15 ])
3675 (const_int 3 [0x3])))
3676 (clobber (reg:CC 17 flags))
3677 ]) 288 {*ashlsi3_1} (nil)
3678 (expr_list:REG_DEAD (reg:SI 104 [ i.15 ])
3679 (expr_list:REG_UNUSED (reg:CC 17 flags)
3682 (insn 63 62 64 9 (set (reg:SI 102 [ D.16350 ])
3683 (reg:SI 103 [ D.16349 ])) 34 {*movsi_1} (nil)
3684 (expr_list:REG_DEAD (reg:SI 103 [ D.16349 ])
3687 (insn 64 63 65 9 (parallel [
3688 (set (reg:SI 101 [ D.16351 ])
3689 (plus:SI (reg:SI 102 [ D.16350 ])
3690 (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])))
3691 (clobber (reg:CC 17 flags))
3692 ]) 148 {*addsi_1} (nil)
3693 (expr_list:REG_DEAD (reg:SI 102 [ D.16350 ])
3694 (expr_list:REG_UNUSED (reg:CC 17 flags)
3697 (insn 65 64 66 9 (set (reg:SI 100 [ D.16352 ])
3698 (mem/s/f/j:SI (plus:SI (reg:SI 101 [ D.16351 ])
3699 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
3700 (expr_list:REG_DEAD (reg:SI 101 [ D.16351 ])
3703 (insn 66 65 67 9 (parallel [
3704 (set (reg/f:SI 7 sp)
3705 (plus:SI (reg/f:SI 7 sp)
3706 (const_int -12 [0xfffffff4])))
3707 (clobber (reg:CC 17 flags))
3708 ]) 148 {*addsi_1} (nil)
3709 (expr_list:REG_UNUSED (reg:CC 17 flags)
3712 (insn 67 66 68 9 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
3713 (reg:SI 100 [ D.16352 ])) 28 {*pushsi2} (nil)
3714 (expr_list:REG_DEAD (reg:SI 100 [ D.16352 ])
3717 (call_insn/u 68 67 69 9 (set (reg:SI 0 ax)
3718 (call (mem:QI (symbol_ref:SI ("strlen") [flags 0x41] <function_decl 0xb72e1e00 strlen>) [0 S1 A8])
3719 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
3720 (expr_list:REG_EH_REGION (const_int 0 [0x0])
3722 (expr_list:REG_DEP_TRUE (use (mem:BLK (scratch) [0 A8]))
3725 (insn 69 68 70 9 (parallel [
3726 (set (reg/f:SI 7 sp)
3727 (plus:SI (reg/f:SI 7 sp)
3728 (const_int 16 [0x10])))
3729 (clobber (reg:CC 17 flags))
3730 ]) 148 {*addsi_1} (nil)
3731 (expr_list:REG_UNUSED (reg:CC 17 flags)
3734 (insn 70 69 71 9 (set (reg:SI 99 [ D.16353 ])
3735 (reg:SI 0 ax)) 34 {*movsi_1} (nil)
3736 (expr_list:REG_DEAD (reg:SI 0 ax)
3739 (insn 71 70 72 9 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3740 (const_int -12 [0xfffffff4])) [0 len1+0 S4 A32])
3741 (reg:SI 99 [ D.16353 ])) 34 {*movsi_1} (nil)
3742 (expr_list:REG_DEAD (reg:SI 99 [ D.16353 ])
3744 ;; End of basic block 9, registers live:
3745 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3747 ;; Start of basic block 10, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3748 (code_label 72 71 73 10 67 "" [1 uses])
3750 (note 73 72 75 10 [bb 10] NOTE_INSN_BASIC_BLOCK)
3752 (insn 75 73 76 10 (parallel [
3753 (set (reg:SI 98 [ D.16354 ])
3754 (plus:SI (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])
3755 (const_int 8 [0x8])))
3756 (clobber (reg:CC 17 flags))
3757 ]) 148 {*addsi_1} (nil)
3758 (expr_list:REG_UNUSED (reg:CC 17 flags)
3761 (insn 76 75 77 10 (set (reg:SI 97 [ i.16 ])
3762 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3763 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
3766 (insn 77 76 78 10 (parallel [
3767 (set (reg:SI 96 [ D.16356 ])
3768 (ashift:SI (reg:SI 97 [ i.16 ])
3769 (const_int 3 [0x3])))
3770 (clobber (reg:CC 17 flags))
3771 ]) 288 {*ashlsi3_1} (nil)
3772 (expr_list:REG_DEAD (reg:SI 97 [ i.16 ])
3773 (expr_list:REG_UNUSED (reg:CC 17 flags)
3776 (insn 78 77 79 10 (set (reg:SI 95 [ D.16357 ])
3777 (reg:SI 96 [ D.16356 ])) 34 {*movsi_1} (nil)
3778 (expr_list:REG_DEAD (reg:SI 96 [ D.16356 ])
3781 (insn 79 78 80 10 (parallel [
3782 (set (reg:SI 94 [ D.16358 ])
3783 (plus:SI (reg:SI 98 [ D.16354 ])
3784 (reg:SI 95 [ D.16357 ])))
3785 (clobber (reg:CC 17 flags))
3786 ]) 148 {*addsi_1} (nil)
3787 (expr_list:REG_DEAD (reg:SI 98 [ D.16354 ])
3788 (expr_list:REG_DEAD (reg:SI 95 [ D.16357 ])
3789 (expr_list:REG_UNUSED (reg:CC 17 flags)
3792 (insn 80 79 81 10 (set (reg:SI 93 [ D.16359 ])
3793 (mem/s/f/j:SI (plus:SI (reg:SI 94 [ D.16358 ])
3794 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
3795 (expr_list:REG_DEAD (reg:SI 94 [ D.16358 ])
3798 (insn 81 80 82 10 (set (reg:CCZ 17 flags)
3799 (compare:CCZ (reg:SI 93 [ D.16359 ])
3800 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
3801 (expr_list:REG_DEAD (reg:SI 93 [ D.16359 ])
3804 (jump_insn 82 81 84 10 (set (pc)
3805 (if_then_else (ne (reg:CCZ 17 flags)
3806 (const_int 0 [0x0]))
3808 (pc))) 365 {*jcc_1} (nil)
3809 (expr_list:REG_DEAD (reg:CCZ 17 flags)
3811 ;; End of basic block 10, registers live:
3812 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3814 ;; Start of basic block 11, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3815 (note 84 82 85 11 [bb 11] NOTE_INSN_BASIC_BLOCK)
3817 (insn 85 84 86 11 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3818 (const_int -8 [0xfffffff8])) [0 len2+0 S4 A32])
3819 (const_int 0 [0x0])) 34 {*movsi_1} (nil)
3822 (jump_insn 86 85 87 11 (set (pc)
3823 (label_ref 103)) 380 {jump} (nil)
3825 ;; End of basic block 11, registers live:
3826 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3830 ;; Start of basic block 12, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3831 (code_label 88 87 89 12 68 "" [1 uses])
3833 (note 89 88 91 12 [bb 12] NOTE_INSN_BASIC_BLOCK)
3835 (insn 91 89 92 12 (parallel [
3836 (set (reg:SI 92 [ D.16360 ])
3837 (plus:SI (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])
3838 (const_int 8 [0x8])))
3839 (clobber (reg:CC 17 flags))
3840 ]) 148 {*addsi_1} (nil)
3841 (expr_list:REG_UNUSED (reg:CC 17 flags)
3844 (insn 92 91 93 12 (set (reg:SI 91 [ i.17 ])
3845 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3846 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
3849 (insn 93 92 94 12 (parallel [
3850 (set (reg:SI 90 [ D.16362 ])
3851 (ashift:SI (reg:SI 91 [ i.17 ])
3852 (const_int 3 [0x3])))
3853 (clobber (reg:CC 17 flags))
3854 ]) 288 {*ashlsi3_1} (nil)
3855 (expr_list:REG_DEAD (reg:SI 91 [ i.17 ])
3856 (expr_list:REG_UNUSED (reg:CC 17 flags)
3859 (insn 94 93 95 12 (set (reg:SI 89 [ D.16363 ])
3860 (reg:SI 90 [ D.16362 ])) 34 {*movsi_1} (nil)
3861 (expr_list:REG_DEAD (reg:SI 90 [ D.16362 ])
3864 (insn 95 94 96 12 (parallel [
3865 (set (reg:SI 88 [ D.16364 ])
3866 (plus:SI (reg:SI 92 [ D.16360 ])
3867 (reg:SI 89 [ D.16363 ])))
3868 (clobber (reg:CC 17 flags))
3869 ]) 148 {*addsi_1} (nil)
3870 (expr_list:REG_DEAD (reg:SI 92 [ D.16360 ])
3871 (expr_list:REG_DEAD (reg:SI 89 [ D.16363 ])
3872 (expr_list:REG_UNUSED (reg:CC 17 flags)
3875 (insn 96 95 97 12 (set (reg:SI 87 [ D.16365 ])
3876 (mem/s/f/j:SI (plus:SI (reg:SI 88 [ D.16364 ])
3877 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
3878 (expr_list:REG_DEAD (reg:SI 88 [ D.16364 ])
3881 (insn 97 96 98 12 (parallel [
3882 (set (reg/f:SI 7 sp)
3883 (plus:SI (reg/f:SI 7 sp)
3884 (const_int -12 [0xfffffff4])))
3885 (clobber (reg:CC 17 flags))
3886 ]) 148 {*addsi_1} (nil)
3887 (expr_list:REG_UNUSED (reg:CC 17 flags)
3890 (insn 98 97 99 12 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
3891 (reg:SI 87 [ D.16365 ])) 28 {*pushsi2} (nil)
3892 (expr_list:REG_DEAD (reg:SI 87 [ D.16365 ])
3895 (call_insn/u 99 98 100 12 (set (reg:SI 0 ax)
3896 (call (mem:QI (symbol_ref:SI ("strlen") [flags 0x41] <function_decl 0xb72e1e00 strlen>) [0 S1 A8])
3897 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
3898 (expr_list:REG_EH_REGION (const_int 0 [0x0])
3900 (expr_list:REG_DEP_TRUE (use (mem:BLK (scratch) [0 A8]))
3903 (insn 100 99 101 12 (parallel [
3904 (set (reg/f:SI 7 sp)
3905 (plus:SI (reg/f:SI 7 sp)
3906 (const_int 16 [0x10])))
3907 (clobber (reg:CC 17 flags))
3908 ]) 148 {*addsi_1} (nil)
3909 (expr_list:REG_UNUSED (reg:CC 17 flags)
3912 (insn 101 100 102 12 (set (reg:SI 86 [ D.16366 ])
3913 (reg:SI 0 ax)) 34 {*movsi_1} (nil)
3914 (expr_list:REG_DEAD (reg:SI 0 ax)
3917 (insn 102 101 103 12 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3918 (const_int -8 [0xfffffff8])) [0 len2+0 S4 A32])
3919 (reg:SI 86 [ D.16366 ])) 34 {*movsi_1} (nil)
3920 (expr_list:REG_DEAD (reg:SI 86 [ D.16366 ])
3922 ;; End of basic block 12, registers live:
3923 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3925 ;; Start of basic block 13, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3926 (code_label 103 102 104 13 70 "" [1 uses])
3928 (note 104 103 106 13 [bb 13] NOTE_INSN_BASIC_BLOCK)
3930 (insn 106 104 107 13 (parallel [
3931 (set (reg:SI 85 [ D.16367 ])
3932 (plus:SI (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])
3933 (const_int 8 [0x8])))
3934 (clobber (reg:CC 17 flags))
3935 ]) 148 {*addsi_1} (nil)
3936 (expr_list:REG_UNUSED (reg:CC 17 flags)
3939 (insn 107 106 108 13 (set (reg:SI 84 [ i.18 ])
3940 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3941 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
3944 (insn 108 107 109 13 (parallel [
3945 (set (reg:SI 83 [ D.16369 ])
3946 (ashift:SI (reg:SI 84 [ i.18 ])
3947 (const_int 3 [0x3])))
3948 (clobber (reg:CC 17 flags))
3949 ]) 288 {*ashlsi3_1} (nil)
3950 (expr_list:REG_DEAD (reg:SI 84 [ i.18 ])
3951 (expr_list:REG_UNUSED (reg:CC 17 flags)
3954 (insn 109 108 110 13 (set (reg:SI 82 [ D.16370 ])
3955 (reg:SI 83 [ D.16369 ])) 34 {*movsi_1} (nil)
3956 (expr_list:REG_DEAD (reg:SI 83 [ D.16369 ])
3959 (insn 110 109 111 13 (parallel [
3960 (set (reg:SI 81 [ D.16371 ])
3961 (plus:SI (reg:SI 85 [ D.16367 ])
3962 (reg:SI 82 [ D.16370 ])))
3963 (clobber (reg:CC 17 flags))
3964 ]) 148 {*addsi_1} (nil)
3965 (expr_list:REG_DEAD (reg:SI 85 [ D.16367 ])
3966 (expr_list:REG_DEAD (reg:SI 82 [ D.16370 ])
3967 (expr_list:REG_UNUSED (reg:CC 17 flags)
3970 (insn 111 110 112 13 (set (reg:SI 80 [ D.16372 ])
3971 (mem/s/f/j:SI (plus:SI (reg:SI 81 [ D.16371 ])
3972 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
3973 (expr_list:REG_DEAD (reg:SI 81 [ D.16371 ])
3976 (insn 112 111 113 13 (set (reg:CCZ 17 flags)
3977 (compare:CCZ (reg:SI 80 [ D.16372 ])
3978 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
3979 (expr_list:REG_DEAD (reg:SI 80 [ D.16372 ])
3982 (jump_insn 113 112 115 13 (set (pc)
3983 (if_then_else (eq (reg:CCZ 17 flags)
3984 (const_int 0 [0x0]))
3986 (pc))) 365 {*jcc_1} (nil)
3987 (expr_list:REG_DEAD (reg:CCZ 17 flags)
3989 ;; End of basic block 13, registers live:
3990 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3992 ;; Start of basic block 14, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
3993 (note 115 113 117 14 [bb 14] NOTE_INSN_BASIC_BLOCK)
3995 (insn 117 115 118 14 (set (reg:SI 79 [ i.19 ])
3996 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
3997 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
4000 (insn 118 117 119 14 (parallel [
4001 (set (reg:SI 78 [ D.16374 ])
4002 (ashift:SI (reg:SI 79 [ i.19 ])
4003 (const_int 3 [0x3])))
4004 (clobber (reg:CC 17 flags))
4005 ]) 288 {*ashlsi3_1} (nil)
4006 (expr_list:REG_DEAD (reg:SI 79 [ i.19 ])
4007 (expr_list:REG_UNUSED (reg:CC 17 flags)
4010 (insn 119 118 120 14 (set (reg:SI 77 [ D.16375 ])
4011 (reg:SI 78 [ D.16374 ])) 34 {*movsi_1} (nil)
4012 (expr_list:REG_DEAD (reg:SI 78 [ D.16374 ])
4015 (insn 120 119 121 14 (parallel [
4016 (set (reg:SI 76 [ D.16376 ])
4017 (plus:SI (reg:SI 77 [ D.16375 ])
4018 (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])))
4019 (clobber (reg:CC 17 flags))
4020 ]) 148 {*addsi_1} (nil)
4021 (expr_list:REG_DEAD (reg:SI 77 [ D.16375 ])
4022 (expr_list:REG_UNUSED (reg:CC 17 flags)
4025 (insn 121 120 122 14 (set (reg:SI 75 [ D.16377 ])
4026 (mem/s/f/j:SI (plus:SI (reg:SI 76 [ D.16376 ])
4027 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
4028 (expr_list:REG_DEAD (reg:SI 76 [ D.16376 ])
4031 (insn 122 121 123 14 (set (reg:CCZ 17 flags)
4032 (compare:CCZ (reg:SI 75 [ D.16377 ])
4033 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
4034 (expr_list:REG_DEAD (reg:SI 75 [ D.16377 ])
4037 (jump_insn 123 122 125 14 (set (pc)
4038 (if_then_else (eq (reg:CCZ 17 flags)
4039 (const_int 0 [0x0]))
4041 (pc))) 365 {*jcc_1} (nil)
4042 (expr_list:REG_DEAD (reg:CCZ 17 flags)
4044 ;; End of basic block 14, registers live:
4045 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4047 ;; Start of basic block 15, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4048 (note 125 123 127 15 [bb 15] NOTE_INSN_BASIC_BLOCK)
4050 (insn 127 125 128 15 (set (reg:SI 74 [ i.20 ])
4051 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4052 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
4055 (insn 128 127 129 15 (parallel [
4056 (set (reg:SI 73 [ D.16379 ])
4057 (ashift:SI (reg:SI 74 [ i.20 ])
4058 (const_int 3 [0x3])))
4059 (clobber (reg:CC 17 flags))
4060 ]) 288 {*ashlsi3_1} (nil)
4061 (expr_list:REG_DEAD (reg:SI 74 [ i.20 ])
4062 (expr_list:REG_UNUSED (reg:CC 17 flags)
4065 (insn 129 128 130 15 (set (reg:SI 72 [ D.16380 ])
4066 (reg:SI 73 [ D.16379 ])) 34 {*movsi_1} (nil)
4067 (expr_list:REG_DEAD (reg:SI 73 [ D.16379 ])
4070 (insn 130 129 131 15 (parallel [
4071 (set (reg/f:SI 71 [ D.16381 ])
4072 (plus:SI (reg:SI 72 [ D.16380 ])
4073 (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])))
4074 (clobber (reg:CC 17 flags))
4075 ]) 148 {*addsi_1} (nil)
4076 (expr_list:REG_DEAD (reg:SI 72 [ D.16380 ])
4077 (expr_list:REG_UNUSED (reg:CC 17 flags)
4080 (insn 131 130 132 15 (set (reg:SI 70 [ D.16382 ])
4081 (mem/s/j:SI (reg/f:SI 71 [ D.16381 ]) [0 <variable>.len+0 S4 A32])) 34 {*movsi_1} (nil)
4082 (expr_list:REG_DEAD (reg/f:SI 71 [ D.16381 ])
4085 (insn 132 131 133 15 (set (reg:SI 113 [ len2 ])
4086 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4087 (const_int -8 [0xfffffff8])) [0 len2+0 S4 A32])) 34 {*movsi_1} (nil)
4090 (insn 133 132 134 15 (parallel [
4091 (set (reg:SI 69 [ D.16383 ])
4092 (plus:SI (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4093 (const_int -12 [0xfffffff4])) [0 len1+0 S4 A32])
4094 (reg:SI 113 [ len2 ])))
4095 (clobber (reg:CC 17 flags))
4096 ]) 148 {*addsi_1} (nil)
4097 (expr_list:REG_DEAD (reg:SI 113 [ len2 ])
4098 (expr_list:REG_UNUSED (reg:CC 17 flags)
4099 (expr_list:REG_EQUAL (plus:SI (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4100 (const_int -12 [0xfffffff4])) [0 len1+0 S4 A32])
4101 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4102 (const_int -8 [0xfffffff8])) [0 len2+0 S4 A32]))
4105 (insn 134 133 135 15 (set (reg:CCGC 17 flags)
4106 (compare:CCGC (reg:SI 70 [ D.16382 ])
4107 (reg:SI 69 [ D.16383 ]))) 2 {*cmpsi_1_insn} (nil)
4108 (expr_list:REG_DEAD (reg:SI 70 [ D.16382 ])
4109 (expr_list:REG_DEAD (reg:SI 69 [ D.16383 ])
4112 (jump_insn 135 134 137 15 (set (pc)
4113 (if_then_else (lt (reg:CCGC 17 flags)
4114 (const_int 0 [0x0]))
4116 (pc))) 365 {*jcc_1} (nil)
4117 (expr_list:REG_DEAD (reg:CCGC 17 flags)
4119 ;; End of basic block 15, registers live:
4120 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4122 ;; Start of basic block 16, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4123 (note 137 135 139 16 [bb 16] NOTE_INSN_BASIC_BLOCK)
4125 (insn 139 137 140 16 (parallel [
4126 (set (reg:SI 68 [ D.16384 ])
4127 (plus:SI (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])
4128 (const_int 8 [0x8])))
4129 (clobber (reg:CC 17 flags))
4130 ]) 148 {*addsi_1} (nil)
4131 (expr_list:REG_UNUSED (reg:CC 17 flags)
4134 (insn 140 139 141 16 (set (reg:SI 67 [ i.21 ])
4135 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4136 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
4139 (insn 141 140 142 16 (parallel [
4140 (set (reg:SI 66 [ D.16386 ])
4141 (ashift:SI (reg:SI 67 [ i.21 ])
4142 (const_int 3 [0x3])))
4143 (clobber (reg:CC 17 flags))
4144 ]) 288 {*ashlsi3_1} (nil)
4145 (expr_list:REG_DEAD (reg:SI 67 [ i.21 ])
4146 (expr_list:REG_UNUSED (reg:CC 17 flags)
4149 (insn 142 141 143 16 (set (reg:SI 65 [ D.16387 ])
4150 (reg:SI 66 [ D.16386 ])) 34 {*movsi_1} (nil)
4151 (expr_list:REG_DEAD (reg:SI 66 [ D.16386 ])
4154 (insn 143 142 144 16 (parallel [
4155 (set (reg:SI 64 [ D.16388 ])
4156 (plus:SI (reg:SI 68 [ D.16384 ])
4157 (reg:SI 65 [ D.16387 ])))
4158 (clobber (reg:CC 17 flags))
4159 ]) 148 {*addsi_1} (nil)
4160 (expr_list:REG_DEAD (reg:SI 68 [ D.16384 ])
4161 (expr_list:REG_DEAD (reg:SI 65 [ D.16387 ])
4162 (expr_list:REG_UNUSED (reg:CC 17 flags)
4165 (insn 144 143 145 16 (set (reg:SI 63 [ D.16389 ])
4166 (mem/s/f/j:SI (plus:SI (reg:SI 64 [ D.16388 ])
4167 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
4168 (expr_list:REG_DEAD (reg:SI 64 [ D.16388 ])
4171 (insn 145 144 146 16 (set (reg:SI 62 [ i.22 ])
4172 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4173 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])) 34 {*movsi_1} (nil)
4176 (insn 146 145 147 16 (parallel [
4177 (set (reg:SI 61 [ D.16391 ])
4178 (ashift:SI (reg:SI 62 [ i.22 ])
4179 (const_int 3 [0x3])))
4180 (clobber (reg:CC 17 flags))
4181 ]) 288 {*ashlsi3_1} (nil)
4182 (expr_list:REG_DEAD (reg:SI 62 [ i.22 ])
4183 (expr_list:REG_UNUSED (reg:CC 17 flags)
4186 (insn 147 146 148 16 (set (reg:SI 60 [ D.16392 ])
4187 (reg:SI 61 [ D.16391 ])) 34 {*movsi_1} (nil)
4188 (expr_list:REG_DEAD (reg:SI 61 [ D.16391 ])
4191 (insn 148 147 149 16 (parallel [
4192 (set (reg:SI 59 [ D.16393 ])
4193 (plus:SI (reg:SI 60 [ D.16392 ])
4194 (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])))
4195 (clobber (reg:CC 17 flags))
4196 ]) 148 {*addsi_1} (nil)
4197 (expr_list:REG_DEAD (reg:SI 60 [ D.16392 ])
4198 (expr_list:REG_UNUSED (reg:CC 17 flags)
4201 (insn 149 148 150 16 (set (reg:SI 58 [ D.16394 ])
4202 (mem/s/f/j:SI (plus:SI (reg:SI 59 [ D.16393 ])
4203 (const_int 4 [0x4])) [0 <variable>.string+0 S4 A32])) 34 {*movsi_1} (nil)
4204 (expr_list:REG_DEAD (reg:SI 59 [ D.16393 ])
4207 (insn 150 149 151 16 (parallel [
4208 (set (reg/f:SI 7 sp)
4209 (plus:SI (reg/f:SI 7 sp)
4210 (const_int -8 [0xfffffff8])))
4211 (clobber (reg:CC 17 flags))
4212 ]) 148 {*addsi_1} (nil)
4213 (expr_list:REG_UNUSED (reg:CC 17 flags)
4216 (insn 151 150 152 16 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4217 (reg:SI 63 [ D.16389 ])) 28 {*pushsi2} (nil)
4218 (expr_list:REG_DEAD (reg:SI 63 [ D.16389 ])
4221 (insn 152 151 153 16 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4222 (reg:SI 58 [ D.16394 ])) 28 {*pushsi2} (nil)
4223 (expr_list:REG_DEAD (reg:SI 58 [ D.16394 ])
4226 (call_insn 153 152 154 16 (set (reg:SI 0 ax)
4227 (call (mem:QI (symbol_ref:SI ("strcat") [flags 0x41] <function_decl 0xb72e14d0 strcat>) [0 S1 A8])
4228 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
4229 (expr_list:REG_UNUSED (reg:SI 0 ax)
4230 (expr_list:REG_EH_REGION (const_int 0 [0x0])
4234 (insn 154 153 155 16 (parallel [
4235 (set (reg/f:SI 7 sp)
4236 (plus:SI (reg/f:SI 7 sp)
4237 (const_int 16 [0x10])))
4238 (clobber (reg:CC 17 flags))
4239 ]) 148 {*addsi_1} (nil)
4240 (expr_list:REG_UNUSED (reg:CC 17 flags)
4242 ;; End of basic block 16, registers live:
4243 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4245 ;; Start of basic block 17, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4246 (code_label 155 154 156 17 71 "" [3 uses])
4248 (note 156 155 158 17 [bb 17] NOTE_INSN_BASIC_BLOCK)
4250 (insn 158 156 159 17 (parallel [
4251 (set (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4252 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])
4253 (plus:SI (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4254 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32])
4255 (const_int 1 [0x1])))
4256 (clobber (reg:CC 17 flags))
4257 ]) 148 {*addsi_1} (nil)
4258 (expr_list:REG_UNUSED (reg:CC 17 flags)
4260 ;; End of basic block 17, registers live:
4261 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4263 ;; Start of basic block 18, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4264 (code_label 159 158 160 18 63 "" [1 uses])
4266 (note 160 159 161 18 [bb 18] NOTE_INSN_BASIC_BLOCK)
4268 (insn 161 160 162 18 (parallel [
4269 (set (reg:SI 110 [ D.16341 ])
4270 (plus:SI (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
4271 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])
4272 (const_int -1 [0xffffffff])))
4273 (clobber (reg:CC 17 flags))
4274 ]) 148 {*addsi_1} (nil)
4275 (expr_list:REG_UNUSED (reg:CC 17 flags)
4278 (insn 162 161 163 18 (set (reg:CCGC 17 flags)
4279 (compare:CCGC (reg:SI 110 [ D.16341 ])
4280 (mem/c/i:SI (plus:SI (reg/f:SI 20 frame)
4281 (const_int -4 [0xfffffffc])) [0 i+0 S4 A32]))) 2 {*cmpsi_1_insn} (nil)
4282 (expr_list:REG_DEAD (reg:SI 110 [ D.16341 ])
4285 (jump_insn 163 162 165 18 (set (pc)
4286 (if_then_else (gt (reg:CCGC 17 flags)
4287 (const_int 0 [0x0]))
4289 (pc))) 365 {*jcc_1} (nil)
4290 (expr_list:REG_DEAD (reg:CCGC 17 flags)
4292 ;; End of basic block 18, registers live:
4293 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4295 ;; Start of basic block 19, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4296 (note 165 163 167 19 [bb 19] NOTE_INSN_BASIC_BLOCK)
4298 (insn 167 165 168 19 (set (reg:SI 111 [ D.16337 ])
4299 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
4300 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])) 34 {*movsi_1} (nil)
4302 ;; End of basic block 19, registers live:
4303 6 [bp] 7 [sp] 16 [argp] 20 [frame] 111
4305 ;; Start of basic block 20, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 111
4306 (code_label 168 167 169 20 60 "" [2 uses])
4308 (note 169 168 170 20 [bb 20] NOTE_INSN_BASIC_BLOCK)
4310 (insn 170 169 173 20 (set (reg:SI 112 [ <result> ])
4311 (reg:SI 111 [ D.16337 ])) 34 {*movsi_1} (nil)
4312 (expr_list:REG_DEAD (reg:SI 111 [ D.16337 ])
4315 (note 173 170 176 20 NOTE_INSN_FUNCTION_END)
4317 (insn 176 173 182 20 (set (reg/i:SI 0 ax [ <result> ])
4318 (reg:SI 112 [ <result> ])) 34 {*movsi_1} (nil)
4319 (expr_list:REG_DEAD (reg:SI 112 [ <result> ])
4322 (insn 182 176 0 20 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
4324 ;; End of basic block 20, registers live:
4325 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4328 ;; Function int SortStringArray(MqlStr*, int) (_Z15SortStringArrayP6MqlStri@8)
4334 Register 58 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:4000
4335 Register 59 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:20000 INT_SSE_REGS:20000 FLOAT_INT_SSE_REGS:20000 ALL_REGS:20000 MEM:7000
4336 Register 60 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:10000 INT_SSE_REGS:10000 FLOAT_INT_SSE_REGS:10000 ALL_REGS:10000 MEM:3000
4338 Register 53 pref FLOAT_INT_SSE_REGS or none
4339 Register 54 pref FLOAT_INT_SSE_REGS or none
4340 Register 55 pref FLOAT_INT_SSE_REGS or none
4341 Register 56 pref FLOAT_INT_SSE_REGS or none
4342 Register 57 pref FLOAT_INT_SSE_REGS or none
4343 Register 58 pref GENERAL_REGS or none
4344 Register 59 pref GENERAL_REGS or none
4345 Register 60 pref AREG, else GENERAL_REGS
4346 Register 61 pref FLOAT_INT_SSE_REGS or none
4349 Register 58 used 2 times across 4 insns in block 6; set 1 time; GENERAL_REGS or none.
4351 Register 59 used 4 times across 6 insns; set 3 times; GENERAL_REGS or none.
4353 Register 60 used 2 times across 2 insns in block 7; set 1 time; pref AREG, else GENERAL_REGS.
4355 8 basic blocks, 9 edges.
4357 Basic block 2 , prev 0, next 3, loop_depth 0, count 0, freq 0.
4358 Predecessors: ENTRY (fallthru)
4359 Successors: 3 (fallthru) 4
4360 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4361 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4363 Basic block 3 , prev 2, next 4, loop_depth 0, count 0, freq 0.
4364 Predecessors: 2 (fallthru)
4366 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4367 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 59
4369 Basic block 4 , prev 3, next 5, loop_depth 0, count 0, freq 0.
4371 Successors: 5 (fallthru) 6
4372 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4373 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4375 Basic block 5 , prev 4, next 6, loop_depth 0, count 0, freq 0.
4376 Predecessors: 4 (fallthru)
4378 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4379 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 59
4381 Basic block 6 , prev 5, next 7, loop_depth 0, count 0, freq 0.
4383 Successors: 7 (fallthru)
4384 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4385 Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 59
4387 Basic block 7 , prev 6, next 1, loop_depth 0, count 0, freq 0.
4388 Predecessors: 3 5 6 (fallthru)
4389 Successors: EXIT [100.0%] (fallthru)
4390 Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 59
4391 Registers live at end: 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4393 ;; Register 58 in 0.
4394 ;; Register 60 in 0.
4395 (note 2 0 3 NOTE_INSN_DELETED)
4397 (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
4399 ;; Start of basic block 2, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4400 (note 5 3 7 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
4402 (insn 7 5 8 2 (set (reg:CCZ 17 flags)
4403 (compare:CCZ (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])
4404 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
4407 (jump_insn 8 7 10 2 (set (pc)
4408 (if_then_else (ne (reg:CCZ 17 flags)
4409 (const_int 0 [0x0]))
4411 (pc))) 365 {*jcc_1} (nil)
4412 (expr_list:REG_DEAD (reg:CCZ 17 flags)
4414 ;; End of basic block 2, registers live:
4415 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4417 ;; Start of basic block 3, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4418 (note 10 8 12 3 [bb 3] NOTE_INSN_BASIC_BLOCK)
4420 (insn 12 10 13 3 (parallel [
4421 (set (reg/f:SI 7 sp)
4422 (plus:SI (reg/f:SI 7 sp)
4423 (const_int -12 [0xfffffff4])))
4424 (clobber (reg:CC 17 flags))
4425 ]) 148 {*addsi_1} (nil)
4426 (expr_list:REG_UNUSED (reg:CC 17 flags)
4429 (insn 13 12 14 3 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4430 (symbol_ref/f:SI ("*LC14") [flags 0x2] <string_cst 0xb6b20b2c>)) 28 {*pushsi2} (nil)
4433 (call_insn 14 13 15 3 (set (reg:SI 0 ax)
4434 (call (mem:QI (symbol_ref:SI ("puts") [flags 0x41] <function_decl 0xb72e5d20 __builtin_puts>) [0 S1 A8])
4435 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
4436 (expr_list:REG_UNUSED (reg:SI 0 ax)
4440 (insn 15 14 17 3 (parallel [
4441 (set (reg/f:SI 7 sp)
4442 (plus:SI (reg/f:SI 7 sp)
4443 (const_int 16 [0x10])))
4444 (clobber (reg:CC 17 flags))
4445 ]) 148 {*addsi_1} (nil)
4446 (expr_list:REG_UNUSED (reg:CC 17 flags)
4449 (insn 17 15 18 3 (set (reg:SI 59 [ D.16328 ])
4450 (const_int -1 [0xffffffff])) 34 {*movsi_1} (nil)
4453 (jump_insn 18 17 19 3 (set (pc)
4454 (label_ref 49)) 380 {jump} (nil)
4456 ;; End of basic block 3, registers live:
4457 6 [bp] 7 [sp] 16 [argp] 20 [frame] 59
4461 ;; Start of basic block 4, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4462 (code_label 20 19 21 4 78 "" [1 uses])
4464 (note 21 20 23 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
4466 (insn 23 21 24 4 (set (reg:CCNO 17 flags)
4467 (compare:CCNO (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
4468 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])
4469 (const_int 0 [0x0]))) 0 {*cmpsi_ccno_1} (nil)
4472 (jump_insn 24 23 26 4 (set (pc)
4473 (if_then_else (gt (reg:CCNO 17 flags)
4474 (const_int 0 [0x0]))
4476 (pc))) 365 {*jcc_1} (nil)
4477 (expr_list:REG_DEAD (reg:CCNO 17 flags)
4479 ;; End of basic block 4, registers live:
4480 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4482 ;; Start of basic block 5, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4483 (note 26 24 28 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
4485 (insn 28 26 29 5 (parallel [
4486 (set (reg/f:SI 7 sp)
4487 (plus:SI (reg/f:SI 7 sp)
4488 (const_int -8 [0xfffffff8])))
4489 (clobber (reg:CC 17 flags))
4490 ]) 148 {*addsi_1} (nil)
4491 (expr_list:REG_UNUSED (reg:CC 17 flags)
4494 (insn 29 28 30 5 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4495 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
4496 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])) 28 {*pushsi2} (nil)
4499 (insn 30 29 31 5 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4500 (symbol_ref/f:SI ("*LC15") [flags 0x2] <string_cst 0xb6b387c0>)) 28 {*pushsi2} (nil)
4503 (call_insn 31 30 32 5 (set (reg:SI 0 ax)
4504 (call (mem:QI (symbol_ref:SI ("printf") [flags 0x41] <function_decl 0xb72e58c0 printf>) [0 S1 A8])
4505 (const_int 16 [0x10]))) 550 {*call_value_0} (nil)
4506 (expr_list:REG_UNUSED (reg:SI 0 ax)
4507 (expr_list:REG_EH_REGION (const_int 0 [0x0])
4511 (insn 32 31 34 5 (parallel [
4512 (set (reg/f:SI 7 sp)
4513 (plus:SI (reg/f:SI 7 sp)
4514 (const_int 16 [0x10])))
4515 (clobber (reg:CC 17 flags))
4516 ]) 148 {*addsi_1} (nil)
4517 (expr_list:REG_UNUSED (reg:CC 17 flags)
4520 (insn 34 32 35 5 (set (reg:SI 59 [ D.16328 ])
4521 (const_int -1 [0xffffffff])) 34 {*movsi_1} (nil)
4524 (jump_insn 35 34 36 5 (set (pc)
4525 (label_ref 49)) 380 {jump} (nil)
4527 ;; End of basic block 5, registers live:
4528 6 [bp] 7 [sp] 16 [argp] 20 [frame] 59
4532 ;; Start of basic block 6, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
4533 (code_label 37 36 38 6 81 "" [1 uses])
4535 (note 38 37 40 6 [bb 6] NOTE_INSN_BASIC_BLOCK)
4537 (insn 40 38 41 6 (set (reg:SI 58 [ arraysize.13 ])
4538 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
4539 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])) 34 {*movsi_1} (nil)
4542 (insn 41 40 42 6 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4543 (symbol_ref:SI ("_Z13CompareMqlStrPKvS0_") [flags 0x3] <function_decl 0xb6b057e0 CompareMqlStr>)) 28 {*pushsi2} (nil)
4546 (insn 42 41 43 6 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4547 (const_int 8 [0x8])) 28 {*pushsi2} (nil)
4550 (insn 43 42 44 6 (set (mem/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4551 (reg:SI 58 [ arraysize.13 ])) 28 {*pushsi2} (nil)
4552 (expr_list:REG_DEAD (reg:SI 58 [ arraysize.13 ])
4555 (insn 44 43 45 6 (set (mem/f/i:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A32])
4556 (mem/c/i:SI (reg/f:SI 16 argp) [0 arr+0 S4 A32])) 28 {*pushsi2} (nil)
4559 (call_insn 45 44 46 6 (call (mem:QI (symbol_ref:SI ("qsort") [flags 0x41] <function_decl 0xb6ad7930 qsort>) [0 S1 A8])
4560 (const_int 16 [0x10])) 385 {*call_0} (nil)
4564 (insn 46 45 48 6 (parallel [
4565 (set (reg/f:SI 7 sp)
4566 (plus:SI (reg/f:SI 7 sp)
4567 (const_int 16 [0x10])))
4568 (clobber (reg:CC 17 flags))
4569 ]) 148 {*addsi_1} (nil)
4570 (expr_list:REG_UNUSED (reg:CC 17 flags)
4573 (insn 48 46 49 6 (set (reg:SI 59 [ D.16328 ])
4574 (mem/c/i:SI (plus:SI (reg/f:SI 16 argp)
4575 (const_int 4 [0x4])) [0 arraysize+0 S4 A32])) 34 {*movsi_1} (nil)
4577 ;; End of basic block 6, registers live:
4578 6 [bp] 7 [sp] 16 [argp] 20 [frame] 59
4580 ;; Start of basic block 7, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 59
4581 (code_label 49 48 50 7 80 "" [2 uses])
4583 (note 50 49 51 7 [bb 7] NOTE_INSN_BASIC_BLOCK)
4585 (insn 51 50 54 7 (set (reg:SI 60 [ <result> ])
4586 (reg:SI 59 [ D.16328 ])) 34 {*movsi_1} (nil)
4587 (expr_list:REG_DEAD (reg:SI 59 [ D.16328 ])
4590 (note 54 51 57 7 NOTE_INSN_FUNCTION_END)
4592 (insn 57 54 63 7 (set (reg/i:SI 0 ax [ <result> ])
4593 (reg:SI 60 [ <result> ])) 34 {*movsi_1} (nil)
4594 (expr_list:REG_DEAD (reg:SI 60 [ <result> ])
4597 (insn 63 57 0 7 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
4599 ;; End of basic block 7, registers live:
4600 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]