libmpeg2/vis.h

   1 /*
   2  * vis.h
   3  * Copyright (C) 2003 David S. Miller <davem@redhat.com>
   4  *
   5  * This file is part of mpeg2dec, a free MPEG-2 video stream decoder.
   6  * See http://libmpeg2.sourceforge.net/ for updates.
   7  *
   8  * mpeg2dec is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * mpeg2dec is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22
  23 /* You may be asking why I hard-code the instruction opcodes and don't
  24  * use the normal VIS assembler mnenomics for the VIS instructions.
  25  *
  26  * The reason is that Sun, in their infinite wisdom, decided that a binary
  27  * using a VIS instruction will cause it to be marked (in the ELF headers)
  28  * as doing so, and this prevents the OS from loading such binaries if the
  29  * current cpu doesn't have VIS.  There is no way to easily override this
  30  * behavior of the assembler that I am aware of.
  31  *
  32  * This totally defeats what libmpeg2 is trying to do which is allow a
  33  * single binary to be created, and then detect the availability of VIS
  34  * at runtime.
  35  *
  36  * I'm not saying that tainting the binary by default is bad, rather I'm
  37  * saying that not providing a way to override this easily unnecessarily
  38  * ties people's hands.
  39  *
  40  * Thus, we do the opcode encoding by hand and output 32-bit words in
  41  * the assembler to keep the binary from becoming tainted.
  42  */
  43
  44 #ifndef LIBMPEG2_VIS_H
  45 #define LIBMPEG2_VIS_H
  46
  47 #define vis_opc_base    ((0x1 << 31) | (0x36 << 19))
  48 #define vis_opf(X)      ((X) << 5)
  49 #define vis_sreg(X)     (X)
  50 #define vis_dreg(X)     (((X)&0x1f)|((X)>>5))
  51 #define vis_rs1_s(X)    (vis_sreg(X) << 14)
  52 #define vis_rs1_d(X)    (vis_dreg(X) << 14)
  53 #define vis_rs2_s(X)    (vis_sreg(X) << 0)
  54 #define vis_rs2_d(X)    (vis_dreg(X) << 0)
  55 #define vis_rd_s(X)     (vis_sreg(X) << 25)
  56 #define vis_rd_d(X)     (vis_dreg(X) << 25)
  57
  58 #define vis_ss2s(opf,rs1,rs2,rd) \
  59         __asm__ __volatile__ (".word %0" \
  60                               : : "i" (vis_opc_base | vis_opf(opf) | \
  61                                        vis_rs1_s(rs1) | \
  62                                        vis_rs2_s(rs2) | \
  63                                        vis_rd_s(rd)))
  64
  65 #define vis_dd2d(opf,rs1,rs2,rd) \
  66         __asm__ __volatile__ (".word %0" \
  67                               : : "i" (vis_opc_base | vis_opf(opf) | \
  68                                        vis_rs1_d(rs1) | \
  69                                        vis_rs2_d(rs2) | \
  70                                        vis_rd_d(rd)))
  71
  72 #define vis_ss2d(opf,rs1,rs2,rd) \
  73         __asm__ __volatile__ (".word %0" \
  74                               : : "i" (vis_opc_base | vis_opf(opf) | \
  75                                        vis_rs1_s(rs1) | \
  76                                        vis_rs2_s(rs2) | \
  77                                        vis_rd_d(rd)))
  78
  79 #define vis_sd2d(opf,rs1,rs2,rd) \
  80         __asm__ __volatile__ (".word %0" \
  81                               : : "i" (vis_opc_base | vis_opf(opf) | \
  82                                        vis_rs1_s(rs1) | \
  83                                        vis_rs2_d(rs2) | \
  84                                        vis_rd_d(rd)))
  85
  86 #define vis_d2s(opf,rs2,rd) \
  87         __asm__ __volatile__ (".word %0" \
  88                               : : "i" (vis_opc_base | vis_opf(opf) | \
  89                                        vis_rs2_d(rs2) | \
  90                                        vis_rd_s(rd)))
  91
  92 #define vis_s2d(opf,rs2,rd) \
  93         __asm__ __volatile__ (".word %0" \
  94                               : : "i" (vis_opc_base | vis_opf(opf) | \
  95                                        vis_rs2_s(rs2) | \
  96                                        vis_rd_d(rd)))
  97
  98 #define vis_d12d(opf,rs1,rd) \
  99         __asm__ __volatile__ (".word %0" \
 100                               : : "i" (vis_opc_base | vis_opf(opf) | \
 101                                        vis_rs1_d(rs1) | \
 102                                        vis_rd_d(rd)))
 103
 104 #define vis_d22d(opf,rs2,rd) \
 105         __asm__ __volatile__ (".word %0" \
 106                               : : "i" (vis_opc_base | vis_opf(opf) | \
 107                                        vis_rs2_d(rs2) | \
 108                                        vis_rd_d(rd)))
 109
 110 #define vis_s12s(opf,rs1,rd) \
 111         __asm__ __volatile__ (".word %0" \
 112                               : : "i" (vis_opc_base | vis_opf(opf) | \
 113                                        vis_rs1_s(rs1) | \
 114                                        vis_rd_s(rd)))
 115
 116 #define vis_s22s(opf,rs2,rd) \
 117         __asm__ __volatile__ (".word %0" \
 118                               : : "i" (vis_opc_base | vis_opf(opf) | \
 119                                        vis_rs2_s(rs2) | \
 120                                        vis_rd_s(rd)))
 121
 122 #define vis_s(opf,rd) \
 123         __asm__ __volatile__ (".word %0" \
 124                               : : "i" (vis_opc_base | vis_opf(opf) | \
 125                                        vis_rd_s(rd)))
 126
 127 #define vis_d(opf,rd) \
 128         __asm__ __volatile__ (".word %0" \
 129                               : : "i" (vis_opc_base | vis_opf(opf) | \
 130                                        vis_rd_d(rd)))
 131
 132 #define vis_r2m(op,rd,mem) \
 133         __asm__ __volatile__ (#op "\t%%f" #rd ", [%0]" : : "r" (&(mem)) )
 134
 135 #define vis_r2m_2(op,rd,mem1,mem2) \
 136         __asm__ __volatile__ (#op "\t%%f" #rd ", [%0 + %1]" : : "r" (mem1), "r" (mem2) )
 137
 138 #define vis_m2r(op,mem,rd) \
 139         __asm__ __volatile__ (#op "\t[%0], %%f" #rd : : "r" (&(mem)) )
 140
 141 #define vis_m2r_2(op,mem1,mem2,rd) \
 142         __asm__ __volatile__ (#op "\t[%0 + %1], %%f" #rd : : "r" (mem1), "r" (mem2) )
 143
 144 static inline void vis_set_gsr(unsigned int _val)
 145 {
 146         register unsigned int val asm("g1");
 147
 148         val = _val;
 149         __asm__ __volatile__(".word 0xa7804000"
 150                              : : "r" (val));
 151 }
 152
 153 #define VIS_GSR_ALIGNADDR_MASK  0x0000007
 154 #define VIS_GSR_ALIGNADDR_SHIFT 0
 155 #define VIS_GSR_SCALEFACT_MASK  0x0000078
 156 #define VIS_GSR_SCALEFACT_SHIFT 3
 157
 158 #define vis_ld32(mem,rs1)               vis_m2r(ld, mem, rs1)
 159 #define vis_ld32_2(mem1,mem2,rs1)       vis_m2r_2(ld, mem1, mem2, rs1)
 160 #define vis_st32(rs1,mem)               vis_r2m(st, rs1, mem)
 161 #define vis_st32_2(rs1,mem1,mem2)       vis_r2m_2(st, rs1, mem1, mem2)
 162 #define vis_ld64(mem,rs1)               vis_m2r(ldd, mem, rs1)
 163 #define vis_ld64_2(mem1,mem2,rs1)       vis_m2r_2(ldd, mem1, mem2, rs1)
 164 #define vis_st64(rs1,mem)               vis_r2m(std, rs1, mem)
 165 #define vis_st64_2(rs1,mem1,mem2)       vis_r2m_2(std, rs1, mem1, mem2)
 166
 167 #define vis_ldblk(mem, rd) \
 168 do {    register void *__mem asm("g1"); \
 169         __mem = &(mem); \
 170         __asm__ __volatile__(".word 0xc1985e00 | %1" \
 171                              : \
 172                              : "r" (__mem), \
 173                                "i" (vis_rd_d(rd)) \
 174                              : "memory"); \
 175 } while (0)
 176
 177 #define vis_stblk(rd, mem) \
 178 do {    register void *__mem asm("g1"); \
 179         __mem = &(mem); \
 180         __asm__ __volatile__(".word 0xc1b85e00 | %1" \
 181                              : \
 182                              : "r" (__mem), \
 183                                "i" (vis_rd_d(rd)) \
 184                              : "memory"); \
 185 } while (0)
 186
 187 #define vis_membar_storestore() \
 188         __asm__ __volatile__(".word 0x8143e008" : : : "memory")
 189
 190 #define vis_membar_sync()       \
 191         __asm__ __volatile__(".word 0x8143e040" : : : "memory")
 192
 193 /* 16 and 32 bit partitioned addition and subtraction.  The normal
 194  * versions perform 4 16-bit or 2 32-bit additions or subtractions.
 195  * The 's' versions perform 2 16-bit or 2 32-bit additions or
 196  * subtractions.
 197  */
 198
 199 #define vis_padd16(rs1,rs2,rd)          vis_dd2d(0x50, rs1, rs2, rd)
 200 #define vis_padd16s(rs1,rs2,rd)         vis_ss2s(0x51, rs1, rs2, rd)
 201 #define vis_padd32(rs1,rs2,rd)          vis_dd2d(0x52, rs1, rs2, rd)
 202 #define vis_padd32s(rs1,rs2,rd)         vis_ss2s(0x53, rs1, rs2, rd)
 203 #define vis_psub16(rs1,rs2,rd)          vis_dd2d(0x54, rs1, rs2, rd)
 204 #define vis_psub16s(rs1,rs2,rd)         vis_ss2s(0x55, rs1, rs2, rd)
 205 #define vis_psub32(rs1,rs2,rd)          vis_dd2d(0x56, rs1, rs2, rd)
 206 #define vis_psub32s(rs1,rs2,rd)         vis_ss2s(0x57, rs1, rs2, rd)
 207
 208 /* Pixel formatting instructions.  */
 209
 210 #define vis_pack16(rs2,rd)              vis_d2s( 0x3b,      rs2, rd)
 211 #define vis_pack32(rs1,rs2,rd)          vis_dd2d(0x3a, rs1, rs2, rd)
 212 #define vis_packfix(rs2,rd)             vis_d2s( 0x3d,      rs2, rd)
 213 #define vis_expand(rs2,rd)              vis_s2d( 0x4d,      rs2, rd)
 214 #define vis_pmerge(rs1,rs2,rd)          vis_ss2d(0x4b, rs1, rs2, rd)
 215
 216 /* Partitioned multiply instructions.  */
 217
 218 #define vis_mul8x16(rs1,rs2,rd)         vis_sd2d(0x31, rs1, rs2, rd)
 219 #define vis_mul8x16au(rs1,rs2,rd)       vis_ss2d(0x33, rs1, rs2, rd)
 220 #define vis_mul8x16al(rs1,rs2,rd)       vis_ss2d(0x35, rs1, rs2, rd)
 221 #define vis_mul8sux16(rs1,rs2,rd)       vis_dd2d(0x36, rs1, rs2, rd)
 222 #define vis_mul8ulx16(rs1,rs2,rd)       vis_dd2d(0x37, rs1, rs2, rd)
 223 #define vis_muld8sux16(rs1,rs2,rd)      vis_ss2d(0x38, rs1, rs2, rd)
 224 #define vis_muld8ulx16(rs1,rs2,rd)      vis_ss2d(0x39, rs1, rs2, rd)
 225
 226 /* Alignment instructions.  */
 227
 228 static inline void *vis_alignaddr(void *_ptr)
 229 {
 230         register void *ptr asm("g1");
 231
 232         ptr = _ptr;
 233
 234         __asm__ __volatile__(".word %2"
 235                              : "=&r" (ptr)
 236                              : "0" (ptr),
 237                                "i" (vis_opc_base | vis_opf(0x18) |
 238                                     vis_rs1_s(1) |
 239                                     vis_rs2_s(0) |
 240                                     vis_rd_s(1)));
 241
 242         return ptr;
 243 }
 244
 245 static inline void vis_alignaddr_g0(void *_ptr)
 246 {
 247         register void *ptr asm("g1");
 248
 249         ptr = _ptr;
 250
 251         __asm__ __volatile__(".word %2"
 252                              : "=&r" (ptr)
 253                              : "0" (ptr),
 254                                "i" (vis_opc_base | vis_opf(0x18) |
 255                                     vis_rs1_s(1) |
 256                                     vis_rs2_s(0) |
 257                                     vis_rd_s(0)));
 258 }
 259
 260 static inline void *vis_alignaddrl(void *_ptr)
 261 {
 262         register void *ptr asm("g1");
 263
 264         ptr = _ptr;
 265
 266         __asm__ __volatile__(".word %2"
 267                              : "=&r" (ptr)
 268                              : "0" (ptr),
 269                                "i" (vis_opc_base | vis_opf(0x19) |
 270                                     vis_rs1_s(1) |
 271                                     vis_rs2_s(0) |
 272                                     vis_rd_s(1)));
 273
 274         return ptr;
 275 }
 276
 277 static inline void vis_alignaddrl_g0(void *_ptr)
 278 {
 279         register void *ptr asm("g1");
 280
 281         ptr = _ptr;
 282
 283         __asm__ __volatile__(".word %2"
 284                              : "=&r" (ptr)
 285                              : "0" (ptr),
 286                                "i" (vis_opc_base | vis_opf(0x19) |
 287                                     vis_rs1_s(1) |
 288                                     vis_rs2_s(0) |
 289                                     vis_rd_s(0)));
 290 }
 291
 292 #define vis_faligndata(rs1,rs2,rd)      vis_dd2d(0x48, rs1, rs2, rd)
 293
 294 /* Logical operate instructions.  */
 295
 296 #define vis_fzero(rd)                   vis_d(   0x60,           rd)
 297 #define vis_fzeros(rd)                  vis_s(   0x61,           rd)
 298 #define vis_fone(rd)                    vis_d(   0x7e,           rd)
 299 #define vis_fones(rd)                   vis_s(   0x7f,           rd)
 300 #define vis_src1(rs1,rd)                vis_d12d(0x74, rs1,      rd)
 301 #define vis_src1s(rs1,rd)               vis_s12s(0x75, rs1,      rd)
 302 #define vis_src2(rs2,rd)                vis_d22d(0x78,      rs2, rd)
 303 #define vis_src2s(rs2,rd)               vis_s22s(0x79,      rs2, rd)
 304 #define vis_not1(rs1,rd)                vis_d12d(0x6a, rs1,      rd)
 305 #define vis_not1s(rs1,rd)               vis_s12s(0x6b, rs1,      rd)
 306 #define vis_not2(rs2,rd)                vis_d22d(0x66,      rs2, rd)
 307 #define vis_not2s(rs2,rd)               vis_s22s(0x67,      rs2, rd)
 308 #define vis_or(rs1,rs2,rd)              vis_dd2d(0x7c, rs1, rs2, rd)
 309 #define vis_ors(rs1,rs2,rd)             vis_ss2s(0x7d, rs1, rs2, rd)
 310 #define vis_nor(rs1,rs2,rd)             vis_dd2d(0x62, rs1, rs2, rd)
 311 #define vis_nors(rs1,rs2,rd)            vis_ss2s(0x63, rs1, rs2, rd)
 312 #define vis_and(rs1,rs2,rd)             vis_dd2d(0x70, rs1, rs2, rd)
 313 #define vis_ands(rs1,rs2,rd)            vis_ss2s(0x71, rs1, rs2, rd)
 314 #define vis_nand(rs1,rs2,rd)            vis_dd2d(0x6e, rs1, rs2, rd)
 315 #define vis_nands(rs1,rs2,rd)           vis_ss2s(0x6f, rs1, rs2, rd)
 316 #define vis_xor(rs1,rs2,rd)             vis_dd2d(0x6c, rs1, rs2, rd)
 317 #define vis_xors(rs1,rs2,rd)            vis_ss2s(0x6d, rs1, rs2, rd)
 318 #define vis_xnor(rs1,rs2,rd)            vis_dd2d(0x72, rs1, rs2, rd)
 319 #define vis_xnors(rs1,rs2,rd)           vis_ss2s(0x73, rs1, rs2, rd)
 320 #define vis_ornot1(rs1,rs2,rd)          vis_dd2d(0x7a, rs1, rs2, rd)
 321 #define vis_ornot1s(rs1,rs2,rd)         vis_ss2s(0x7b, rs1, rs2, rd)
 322 #define vis_ornot2(rs1,rs2,rd)          vis_dd2d(0x76, rs1, rs2, rd)
 323 #define vis_ornot2s(rs1,rs2,rd)         vis_ss2s(0x77, rs1, rs2, rd)
 324 #define vis_andnot1(rs1,rs2,rd)         vis_dd2d(0x68, rs1, rs2, rd)
 325 #define vis_andnot1s(rs1,rs2,rd)        vis_ss2s(0x69, rs1, rs2, rd)
 326 #define vis_andnot2(rs1,rs2,rd)         vis_dd2d(0x64, rs1, rs2, rd)
 327 #define vis_andnot2s(rs1,rs2,rd)        vis_ss2s(0x65, rs1, rs2, rd)
 328
 329 /* Pixel component distance.  */
 330
 331 #define vis_pdist(rs1,rs2,rd)           vis_dd2d(0x3e, rs1, rs2, rd)
 332
 333 #endif /* LIBMPEG2_VIS_H */