2 * Copyright 1992-2000 by Alan Hourihane, Wigan, England
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that
7 * copyright notice and this permission notice appear in supporting
8 * documentation, and that the name of Alan Hourihane not be used in
9 * advertising or publicity pertaining to distribution of the software without
10 * specific, written prior permission. Alan Hourihane makes no representations
11 * about the suitability of this software for any purpose. It is provided
12 * "as is" without express or implied warranty.
14 * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20 * PERFORMANCE OF THIS SOFTWARE.
22 * Author: Alan Hourihane, alanh@fairlite.demon.co.uk
24 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_regs.h,v 1.22 2002/01/11 13:06:30 alanh Exp $ */
26 #ifndef MPLAYER_CYBERBLADE_REGS_H
27 #define MPLAYER_CYBERBLADE_REGS_H
34 /* General Registers */
35 #define SPR 0x1F /* Software Programming Register (videoram) */
38 #define RevisionID 0x09
39 #define ConfPort1 0x0C
40 #define ConfPort2 0x0C
42 #define OldMode2 0x00 /* Should be 0x0D - dealt with in trident_dac.c */
45 #define Protection 0x11
49 #define ClockHigh 0x19
56 #define Underline 0x14
58 #define CRTCModuleTest 0x1E
59 #define FIFOControl 0x20
60 #define LinearAddReg 0x21
61 #define DRAMTiming 0x23
63 #define RAMDACTiming 0x25
65 #define AddColReg 0x29
66 #define InterfaceSel 0x2A
67 #define HorizOverflow 0x2B
69 #define Performance 0x2F
70 #define GraphEngReg 0x36
72 #define PixelBusReg 0x38
74 #define DRAMControl 0x3A
75 #define MiscContReg 0x3C
76 #define CursorXLow 0x40
77 #define CursorXHigh 0x41
78 #define CursorYLow 0x42
79 #define CursorYHigh 0x43
80 #define CursorLocLow 0x44
81 #define CursorLocHigh 0x45
82 #define CursorXOffset 0x46
83 #define CursorYOffset 0x47
84 #define CursorFG1 0x48
85 #define CursorFG2 0x49
86 #define CursorFG3 0x4A
87 #define CursorFG4 0x4B
88 #define CursorBG1 0x4C
89 #define CursorBG2 0x4D
90 #define CursorBG3 0x4E
91 #define CursorBG4 0x4F
92 #define CursorControl 0x50
94 #define PreEndControl 0x56
95 #define PreEndFetch 0x57
96 #define PCIMaster 0x60
97 #define Enhancement0 0x62
100 /* --- Additions by AMR for Vidix support --- */
101 #define VideoWin1_HScale 0x80
102 #define VideoWin1_VScale 0x82
103 #define VideoWin1_Start 0x86
104 #define VideoWin1_Stop 0x8a
105 #define Video_Flags 0x8e
106 #define VideoWin1_Y_BPR 0x90
107 #define VideoWin1_Y_Offset 0x92
108 #define Video_LineBufferThreshold 0x95
109 #define Video_LineBufferLevel 0x96
110 #define Video_Flags2 0x97
113 #define TVinterface 0xC0
115 #define ClockControl 0xCF
119 #define MiscExtFunc 0x0F
120 #define MiscIntContReg 0x2F
121 #define CyberControl 0x30
122 #define CyberEnhance 0x31
123 #define FPConfig 0x33
124 #define VertStretch 0x52
125 #define HorStretch 0x53
126 #define BiosMode 0x5c
127 #define BiosNewMode1 0x5a
128 #define BiosNewMode2 0x5c
131 /* --- IO Macros by AMR --- */
133 #define CRINB(reg) (OUTPORT8(0x3d4,reg), INPORT8(0x3d5))
134 #define SRINB(reg) (OUTPORT8(0x3c4,reg), INPORT8(0x3c5))
135 #define CROUTB(reg,val) (OUTPORT8(0x3d4,reg), OUTPORT8(0x3d5,val))
136 #define SROUTB(reg,val) (OUTPORT8(0x3c4,reg), OUTPORT8(0x3c5,val))
140 #endif /* MPLAYER_CYBERBLADE_REGS_H */