mono/mini/mini-arm.h

   1 /**
   2  * \file
   3  * Copyright 2011 Xamarin Inc
   4  * Licensed under the MIT license. See LICENSE file in the project root for full license information.
   5  */
   6
   7 #ifndef __MONO_MINI_ARM_H__
   8 #define __MONO_MINI_ARM_H__
   9
  10 #include <mono/arch/arm/arm-codegen.h>
  11 #include <mono/utils/mono-context.h>
  12 #include <glib.h>
  13
  14 #if defined(ARM_FPU_NONE)
  15 #define MONO_ARCH_SOFT_FLOAT_FALLBACK 1
  16 #endif
  17
  18 #if defined(__ARM_EABI__)
  19 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
  20 #define ARM_ARCHITECTURE "armel"
  21 #else
  22 #define ARM_ARCHITECTURE "armeb"
  23 #endif
  24 #else
  25 #define ARM_ARCHITECTURE "arm"
  26 #endif
  27
  28 #if defined(ARM_FPU_VFP)
  29 #define ARM_FP_MODEL "vfp"
  30 #elif defined(ARM_FPU_NONE)
  31 #define ARM_FP_MODEL "vfp+fallback"
  32 #elif defined(ARM_FPU_VFP_HARD)
  33 #define ARM_FP_MODEL "vfp+hard"
  34 #else
  35 #error "At least one of ARM_FPU_NONE, ARM_FPU_VFP or ARM_FPU_VFP_HARD must be defined."
  36 #endif
  37
  38 #define MONO_ARCH_ARCHITECTURE ARM_ARCHITECTURE "," ARM_FP_MODEL
  39
  40 #define MONO_ARCH_CPU_SPEC mono_arm_cpu_desc
  41
  42 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
  43 #define ARM_LSW_REG ARMREG_R0
  44 #define ARM_MSW_REG ARMREG_R1
  45 #else
  46 #define ARM_LSW_REG ARMREG_R1
  47 #define ARM_MSW_REG ARMREG_R0
  48 #endif
  49
  50 #define MONO_MAX_IREGS 16
  51
  52 #define MONO_SAVED_GREGS 10 /* r4-r11, ip, lr */
  53
  54 /* r4-r11, ip, lr: registers saved in the LMF  */
  55 #define MONO_ARM_REGSAVE_MASK 0x5ff0
  56 #define MONO_ARM_FIRST_SAVED_REG ARMREG_R4
  57 #define MONO_ARM_NUM_SAVED_REGS 10
  58
  59 /* Parameters used by the register allocator */
  60
  61 #define MONO_ARCH_CALLEE_REGS ((1<<ARMREG_R0) | (1<<ARMREG_R1) | (1<<ARMREG_R2) | (1<<ARMREG_R3) | (1<<ARMREG_IP))
  62 #define MONO_ARCH_CALLEE_SAVED_REGS ((1<<ARMREG_V1) | (1<<ARMREG_V2) | (1<<ARMREG_V3) | (1<<ARMREG_V4) | (1<<ARMREG_V5) | (1<<ARMREG_V6) | (1<<ARMREG_V7))
  63
  64 /*
  65  * TODO: Make use of VFP v3 registers d16-d31.
  66  */
  67
  68 /*
  69  * TODO: We can't use registers d8-d15 in hard float mode because the
  70  * register allocator doesn't allocate floating point registers globally.
  71  */
  72
  73 #if defined(ARM_FPU_VFP_HARD)
  74 #define MONO_SAVED_FREGS 16
  75 #define MONO_MAX_FREGS 32
  76
  77 /*
  78  * d8-d15 must be preserved across function calls. We use d14-d15 as
  79  * scratch registers in the JIT. The rest have no meaning tied to them.
  80  */
  81 #define MONO_ARCH_CALLEE_FREGS 0x00005555
  82 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x55550000
  83 #else
  84 #define MONO_SAVED_FREGS 8
  85 #define MONO_MAX_FREGS 16
  86
  87 /*
  88  * No registers need to be preserved across function calls. We use d0-d1
  89  * as scratch registers in the JIT. The rest have no meaning tied to them.
  90  */
  91 #define MONO_ARCH_CALLEE_FREGS 0x55555550
  92 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x00000000
  93 #endif
  94
  95 #define MONO_ARCH_USE_FPSTACK FALSE
  96
  97 #define MONO_ARCH_INST_SREG2_MASK(ins) (0)
  98
  99 #define MONO_ARCH_INST_FIXED_REG(desc) \
 100         (mono_arch_is_soft_float () ? \
 101         ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1) : \
 102         ((desc) == 'l' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1))
 103
 104 #define MONO_ARCH_INST_IS_REGPAIR(desc) \
 105         (mono_arch_is_soft_float () ? \
 106         ((desc) == 'l' || (desc) == 'L' || (desc) == 'f' || (desc) == 'g') : \
 107         ((desc) == 'l' || (desc) == 'L'))
 108
 109 #define MONO_ARCH_INST_IS_FLOAT(desc) \
 110         (mono_arch_is_soft_float () ? \
 111         (FALSE) : \
 112         ((desc) == 'f' || (desc) == 'g'))
 113
 114 #define MONO_ARCH_INST_REGPAIR_REG2(desc,hreg1) ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_MSW_REG : -1)
 115
 116 #ifdef TARGET_WATCHOS
 117 #define MONO_ARCH_FRAME_ALIGNMENT 16
 118 #else
 119 #define MONO_ARCH_FRAME_ALIGNMENT 8
 120 #endif
 121
 122 /* fixme: align to 16byte instead of 32byte (we align to 32byte to get
 123  * reproduceable results for benchmarks */
 124 #define MONO_ARCH_CODE_ALIGNMENT 32
 125
 126 /* This needs to hold both a 32 bit int and a 64 bit double */
 127 #define mono_unwind_reg_t guint64
 128
 129 /* Argument marshallings for calls between gsharedvt and normal code */
 130 typedef enum {
 131         GSHAREDVT_ARG_NONE = 0,
 132         GSHAREDVT_ARG_BYVAL_TO_BYREF = 1,
 133         GSHAREDVT_ARG_BYREF_TO_BYVAL = 2,
 134         GSHAREDVT_ARG_BYREF_TO_BYVAL_I1 = 3,
 135         GSHAREDVT_ARG_BYREF_TO_BYVAL_I2 = 4,
 136         GSHAREDVT_ARG_BYREF_TO_BYVAL_U1 = 5,
 137         GSHAREDVT_ARG_BYREF_TO_BYVAL_U2 = 6
 138 } GSharedVtArgMarshal;
 139
 140 /* Return value marshalling for calls between gsharedvt and normal code */
 141 typedef enum {
 142         GSHAREDVT_RET_NONE = 0,
 143         GSHAREDVT_RET_IREG = 1,
 144         GSHAREDVT_RET_IREGS = 2,
 145         GSHAREDVT_RET_I1 = 3,
 146         GSHAREDVT_RET_U1 = 4,
 147         GSHAREDVT_RET_I2 = 5,
 148         GSHAREDVT_RET_U2 = 6,
 149         GSHAREDVT_RET_VFP_R4 = 7,
 150         GSHAREDVT_RET_VFP_R8 = 8
 151 } GSharedVtRetMarshal;
 152
 153 typedef struct {
 154         /* Method address to call */
 155         gpointer addr;
 156         /* The trampoline reads this, so keep the size explicit */
 157         int ret_marshal;
 158         /* If ret_marshal != NONE, this is the reg of the vret arg, else -1 */
 159         int vret_arg_reg;
 160         /* The stack slot where the return value will be stored */
 161         int vret_slot;
 162         int stack_usage, map_count;
 163         /* If not -1, then make a virtual call using this vtable offset */
 164         int vcall_offset;
 165         /* If 1, make an indirect call to the address in the rgctx reg */
 166         int calli;
 167         /* Whenever this is a in or an out call */
 168         int gsharedvt_in;
 169         /* Whenever this call uses fp registers */
 170         int have_fregs;
 171         CallInfo *caller_cinfo;
 172         CallInfo *callee_cinfo;
 173         /* Maps stack slots/registers in the caller to the stack slots/registers in the callee */
 174         /* A negative value means a register, i.e. -1=r0, -2=r1 etc. */
 175         int map [MONO_ZERO_LEN_ARRAY];
 176 } GSharedVtCallInfo;
 177
 178
 179 typedef enum {
 180         RegTypeNone,
 181         /* Passed/returned in an ireg */
 182         RegTypeGeneral,
 183         /* Passed/returned in a pair of iregs */
 184         RegTypeIRegPair,
 185         /* Passed on the stack */
 186         RegTypeBase,
 187         /* First word in r3, second word on the stack */
 188         RegTypeBaseGen,
 189         /* FP value passed in either an ireg or a vfp reg */
 190         RegTypeFP,
 191         /* Struct passed/returned in gregs */
 192         RegTypeStructByVal,
 193         RegTypeStructByAddr,
 194         RegTypeStructByAddrOnStack,
 195         /* gsharedvt argument passed by addr in greg */
 196         RegTypeGSharedVtInReg,
 197         /* gsharedvt argument passed by addr on stack */
 198         RegTypeGSharedVtOnStack,
 199         RegTypeHFA
 200 } ArgStorage;
 201
 202 typedef struct {
 203         gint32  offset;
 204         guint16 vtsize; /* in param area */
 205         /* RegTypeHFA */
 206         int esize;
 207         /* RegTypeHFA/RegTypeStructByVal */
 208         int nregs;
 209         guint8  reg;
 210         ArgStorage  storage;
 211         /* RegTypeStructByVal */
 212         gint32  struct_size, align;
 213         guint8  size    : 4; /* 1, 2, 4, 8, or regs used by RegTypeStructByVal */
 214         guint8  is_signed : 1;
 215 } ArgInfo;
 216
 217 struct CallInfo {
 218         int nargs;
 219         guint32 stack_usage;
 220         /* The index of the vret arg in the argument list for RegTypeStructByAddr */
 221         int vret_arg_index;
 222         ArgInfo ret;
 223         ArgInfo sig_cookie;
 224         ArgInfo args [1];
 225 };
 226
 227 #define PARAM_REGS 4
 228 #define FP_PARAM_REGS 8
 229
 230 typedef struct {
 231         /* General registers */
 232         host_mgreg_t gregs [PARAM_REGS];
 233         /* Floating registers */
 234         float fregs [FP_PARAM_REGS * 2];
 235         /* Stack usage, used for passing params on stack */
 236         guint32 stack_size;
 237         guint8 *stack;
 238 } CallContext;
 239
 240 /* Structure used by the sequence points in AOTed code */
 241 struct SeqPointInfo {
 242         gpointer ss_trigger_page;
 243         gpointer bp_trigger_page;
 244         gpointer ss_tramp_addr;
 245         guint8* bp_addrs [MONO_ZERO_LEN_ARRAY];
 246 };
 247
 248 typedef struct {
 249         double fpregs [FP_PARAM_REGS];
 250         host_mgreg_t res, res2;
 251         guint8 *ret;
 252         guint32 has_fpregs;
 253         guint32 n_stackargs;
 254         /* This should come last as the structure is dynamically extended */
 255         host_mgreg_t regs [PARAM_REGS];
 256 } DynCallArgs;
 257
 258 void arm_patch (guchar *code, const guchar *target);
 259 guint8* mono_arm_emit_load_imm (guint8 *code, int dreg, guint32 val);
 260 int mono_arm_is_rotated_imm8 (guint32 val, gint *rot_amount);
 261
 262 void
 263 mono_arm_throw_exception_by_token (guint32 type_token, host_mgreg_t pc, host_mgreg_t sp, host_mgreg_t *int_regs, gdouble *fp_regs);
 264
 265 gpointer
 266 mono_arm_start_gsharedvt_call (GSharedVtCallInfo *info, gpointer *caller, gpointer *callee, gpointer mrgctx_reg, double *caller_fregs, double *callee_fregs);
 267
 268 typedef enum {
 269         MONO_ARM_FPU_NONE = 0,
 270         MONO_ARM_FPU_VFP = 1,
 271         MONO_ARM_FPU_VFP_HARD = 2
 272 } MonoArmFPU;
 273
 274 /* keep the size of the structure a multiple of 8 */
 275 struct MonoLMF {
 276         /*
 277          * If the second lowest bit is set to 1, then this is a MonoLMFExt structure, and
 278          * the other fields are not valid.
 279          */
 280         gpointer    previous_lmf;
 281         gpointer    lmf_addr;
 282         /* This is only set in trampoline LMF frames */
 283         MonoMethod *method;
 284         host_mgreg_t sp;
 285         host_mgreg_t ip;
 286         host_mgreg_t fp;
 287         /* Currently only used in trampolines on armhf to hold d0-d15. We don't really
 288          * need to put d0-d7 in the LMF, but it simplifies the trampoline code.
 289          */
 290         double     fregs [16];
 291         /* all but sp and pc: matches the PUSH instruction layout in the trampolines
 292          * 0-4 should be considered undefined (execpt in the magic tramp)
 293          * sp is saved at IP.
 294          */
 295         host_mgreg_t iregs [14];
 296 };
 297
 298 typedef struct MonoCompileArch {
 299         MonoInst *seq_point_info_var;
 300         MonoInst *ss_trigger_page_var;
 301         MonoInst *seq_point_ss_method_var;
 302         MonoInst *seq_point_bp_method_var;
 303         MonoInst *vret_addr_loc;
 304         gboolean omit_fp;
 305         gboolean omit_fp_computed;
 306         CallInfo *cinfo;
 307         MonoInst *vfp_scratch_slots [2];
 308         int atomic_tmp_offset;
 309         guint8 *thunks;
 310         int thunks_size;
 311 } MonoCompileArch;
 312
 313 #define MONO_ARCH_EMULATE_FCONV_TO_U4 1
 314 #define MONO_ARCH_EMULATE_FCONV_TO_I8 1
 315 #define MONO_ARCH_EMULATE_FCONV_TO_U8 1
 316 #define MONO_ARCH_EMULATE_LCONV_TO_R8 1
 317 #define MONO_ARCH_EMULATE_LCONV_TO_R4 1
 318 #define MONO_ARCH_EMULATE_LCONV_TO_R8_UN 1
 319 #define MONO_ARCH_EMULATE_FREM 1
 320 #define MONO_ARCH_EMULATE_DIV 1
 321 #define MONO_ARCH_EMULATE_CONV_R8_UN 1
 322 #define MONO_ARCH_EMULATE_MUL_OVF 1
 323
 324 #define ARM_FIRST_ARG_REG 0
 325 #define ARM_LAST_ARG_REG 3
 326
 327 #define MONO_ARCH_USE_SIGACTION 1
 328
 329 #if defined(HOST_WATCHOS)
 330 #undef MONO_ARCH_USE_SIGACTION
 331 #endif
 332
 333 #define MONO_ARCH_NEED_DIV_CHECK 1
 334
 335 #define MONO_ARCH_HAVE_GENERALIZED_IMT_TRAMPOLINE 1
 336
 337 #define MONO_ARCH_HAVE_FULL_AOT_TRAMPOLINES 1
 338 #define MONO_ARCH_HAVE_DECOMPOSE_LONG_OPTS 1
 339
 340 #define MONO_ARCH_INTERPRETER_SUPPORTED 1
 341 #define MONO_ARCH_AOT_SUPPORTED 1
 342 #define MONO_ARCH_LLVM_SUPPORTED 1
 343
 344 #define MONO_ARCH_GSHARED_SUPPORTED 1
 345 #define MONO_ARCH_DYN_CALL_SUPPORTED 1
 346 #define MONO_ARCH_DYN_CALL_PARAM_AREA 0
 347
 348 #define MONO_ARCH_HAVE_OP_TAILCALL_MEMBASE 1
 349 #define MONO_ARCH_HAVE_OP_TAILCALL_REG 1
 350
 351 #if !(defined(TARGET_ANDROID) && defined(MONO_CROSS_COMPILE))
 352 #define MONO_ARCH_SOFT_DEBUG_SUPPORTED 1
 353 #endif
 354
 355 #define MONO_ARCH_HAVE_EXCEPTIONS_INIT 1
 356 #define MONO_ARCH_HAVE_GET_TRAMPOLINES 1
 357 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1
 358 #define MONO_ARCH_GC_MAPS_SUPPORTED 1
 359 #define MONO_ARCH_HAVE_SETUP_ASYNC_CALLBACK 1
 360 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1
 361 #define MONO_ARCH_HAVE_SETUP_RESUME_FROM_SIGNAL_HANDLER_CTX 1
 362 #define MONO_ARCH_GSHAREDVT_SUPPORTED 1
 363 #define MONO_ARCH_HAVE_GENERAL_RGCTX_LAZY_FETCH_TRAMPOLINE 1
 364 #define MONO_ARCH_HAVE_OPCODE_NEEDS_EMULATION 1
 365 #define MONO_ARCH_HAVE_OBJC_GET_SELECTOR 1
 366 #define MONO_ARCH_HAVE_SDB_TRAMPOLINES 1
 367 #define MONO_ARCH_HAVE_PATCH_CODE_NEW 1
 368 #define MONO_ARCH_HAVE_OP_GENERIC_CLASS_INIT 1
 369 #define MONO_ARCH_FLOAT32_SUPPORTED 1
 370 #define MONO_ARCH_LLVM_TARGET_LAYOUT "e-p:32:32-n32-S64"
 371
 372 #define MONO_ARCH_HAVE_INTERP_ENTRY_TRAMPOLINE 1
 373 #define MONO_ARCH_HAVE_FTNPTR_ARG_TRAMPOLINE 1
 374 #define MONO_ARCH_HAVE_INTERP_PINVOKE_TRAMP 1
 375 #define MONO_ARCH_HAVE_INTERP_NATIVE_TO_MANAGED 1
 376
 377 #if defined(TARGET_WATCHOS) || (defined(__linux__) && !defined(TARGET_ANDROID))
 378 #define MONO_ARCH_DISABLE_HW_TRAPS 1
 379 #define MONO_ARCH_HAVE_UNWIND_BACKTRACE 1
 380 #endif
 381
 382 /* ARM doesn't have too many registers, so we have to use a callee saved one */
 383 #define MONO_ARCH_RGCTX_REG ARMREG_V5
 384 #define MONO_ARCH_IMT_REG MONO_ARCH_RGCTX_REG
 385 /* First argument reg */
 386 #define MONO_ARCH_VTABLE_REG ARMREG_R0
 387
 388 // Does the ABI have a volatile non-parameter register, so tailcall
 389 // can pass context to generics or interfaces?
 390 #define MONO_ARCH_HAVE_VOLATILE_NON_PARAM_REGISTER 0
 391
 392 #define MONO_CONTEXT_SET_LLVM_EXC_REG(ctx, exc) do { (ctx)->regs [0] = (gsize)exc; } while (0)
 393
 394 #define MONO_INIT_CONTEXT_FROM_FUNC(ctx,func) do {      \
 395                 MONO_CONTEXT_SET_BP ((ctx), __builtin_frame_address (0));       \
 396                 MONO_CONTEXT_SET_SP ((ctx), __builtin_frame_address (0));       \
 397                 MONO_CONTEXT_SET_IP ((ctx), (func));    \
 398         } while (0)
 399
 400 #define MONO_ARCH_INIT_TOP_LMF_ENTRY(lmf)
 401
 402 void
 403 mono_arm_throw_exception (MonoObject *exc, host_mgreg_t pc, host_mgreg_t sp, host_mgreg_t *int_regs, gdouble *fp_regs, gboolean preserve_ips);
 404
 405 void
 406 mono_arm_throw_exception_by_token (guint32 type_token, host_mgreg_t pc, host_mgreg_t sp, host_mgreg_t *int_regs, gdouble *fp_regs);
 407
 408 void
 409 mono_arm_resume_unwind (guint32 dummy1, host_mgreg_t pc, host_mgreg_t sp, host_mgreg_t *int_regs, gdouble *fp_regs);
 410
 411 gboolean
 412 mono_arm_thumb_supported (void);
 413
 414 gboolean
 415 mono_arm_eabi_supported (void);
 416
 417 int
 418 mono_arm_i8_align (void);
 419
 420 GSList*
 421 mono_arm_get_exception_trampolines (gboolean aot);
 422
 423 guint8*
 424 mono_arm_get_thumb_plt_entry (guint8 *code);
 425
 426 guint8*
 427 mono_arm_patchable_b (guint8 *code, int cond);
 428
 429 guint8*
 430 mono_arm_patchable_bl (guint8 *code, int cond);
 431
 432 gboolean
 433 mono_arm_is_hard_float (void);
 434
 435 void
 436 mono_arm_unaligned_stack (MonoMethod *method);
 437
 438 /* MonoJumpInfo **ji */
 439 guint8*
 440 mono_arm_emit_aotconst (gpointer ji, guint8 *code, guint8 *buf, int dreg, int patch_type, gconstpointer data);
 441
 442 CallInfo*
 443 mono_arch_get_call_info (MonoMemPool *mp, MonoMethodSignature *sig);
 444
 445 #endif /* __MONO_MINI_ARM_H__ */