| blob | aef45cb580f23857114eff726cbd37dc84b8253e |
1 /**
2 * \file
3 * AMD64 backend for the Mono code generator
4 *
5 * Based on mini-x86.c.
6 *
7 * Authors:
8 * Paolo Molaro (lupus@ximian.com)
9 * Dietmar Maurer (dietmar@ximian.com)
10 * Patrik Torstensson
11 * Zoltan Varga (vargaz@gmail.com)
12 * Johan Lorensson (lateralusx.github@gmail.com)
13 *
14 * (C) 2003 Ximian, Inc.
15 * Copyright 2003-2011 Novell, Inc (http://www.novell.com)
16 * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
17 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
18 */
20 #include <string.h>
21 #include <math.h>
22 #include <assert.h>
23 #ifdef HAVE_UNISTD_H
24 #include <unistd.h>
25 #endif
27 #include <mono/metadata/abi-details.h>
28 #include <mono/metadata/appdomain.h>
29 #include <mono/metadata/debug-helpers.h>
30 #include <mono/metadata/threads.h>
31 #include <mono/metadata/profiler-private.h>
32 #include <mono/metadata/mono-debug.h>
33 #include <mono/metadata/gc-internals.h>
34 #include <mono/utils/mono-math.h>
35 #include <mono/utils/mono-mmap.h>
36 #include <mono/utils/mono-memory-model.h>
37 #include <mono/utils/mono-tls.h>
38 #include <mono/utils/mono-hwcap.h>
39 #include <mono/utils/mono-threads.h>
40 #include <mono/utils/unlocked.h>
52 #ifdef MONO_XEN_OPT
54 #else
55 #define optimize_for_xen 0
56 #endif
61 #define IS_IMM32(val) ((((guint64)val) >> 32) == 0)
63 #define IS_REX(inst) (((inst) >= 0x40) && ((inst) <= 0x4f))
65 #ifdef TARGET_WIN32
66 /* Under windows, the calling convention is never stdcall */
67 #define CALLCONV_IS_STDCALL(call_conv) (FALSE)
68 #else
69 #define CALLCONV_IS_STDCALL(call_conv) ((call_conv) == MONO_CALL_STDCALL)
70 #endif
72 /* This mutex protects architecture specific caches */
73 #define mono_mini_arch_lock() mono_os_mutex_lock (&mini_arch_mutex)
74 #define mono_mini_arch_unlock() mono_os_mutex_unlock (&mini_arch_mutex)
77 /* The single step trampoline */
80 /* The breakpoint trampoline */
83 /* Offset between fp and the first argument in the callee */
84 #define ARGS_OFFSET 16
85 #define GP_SCRATCH_REG AMD64_R11
87 /* Max number of bblocks before we bail from using more advanced branch placement code */
88 #define MAX_BBLOCKS_FOR_BRANCH_OPTS 800
90 /*
91 * AMD64 register usage:
92 * - callee saved registers are used for global register allocation
93 * - %r11 is used for materializing 64 bit constants in opcodes
94 * - the rest is used for local allocation
95 */
97 /*
98 * Floating point comparison results:
99 * ZF PF CF
100 * A > B 0 0 0
101 * A < B 0 0 1
102 * A = B 1 0 0
103 * A > B 0 0 0
104 * UNORDERED 1 1 1
105 */
109 {
127 }
129 }
134 };
139 };
143 {
146 else
148 }
152 {
155 else
157 }
159 static gboolean
161 {
162 #if 0
164 #else
166 #endif
167 }
171 {
172 /* Skip REX */
177 }
181 {
186 }
188 static void
190 {
191 // NOTE: Sometimes code has just been generated, is not running yet,
192 // and has no alignment requirements. Sometimes it could be running while we patch it,
193 // and there are alignment requirements.
194 // FIXME Assert alignment.
198 /* Skip REX */
202 }
205 /* amd64_set_reg_template */
207 }
208 else if ((code [0] == 0x8b) && rex && x86_modrm_mod (code [1]) == 0 && x86_modrm_rm (code [1]) == 5) {
209 /* mov 0(%rip), %dreg */
211 }
213 /* call or jmp *<OFFSET>(%rip) */
215 }
217 /* call or jmp <DISP> */
221 }
222 else
224 }
226 void
228 {
230 }
232 #define DEBUG(a) if (cfg->verbose_level > 1) a
236 {
242 /* Since the same stack slot size is used for all arg */
243 /* types, it needs to be big enough to hold them all */
245 }
250 }
251 }
255 {
261 /* Since the same stack slot size is used for both float */
262 /* types, it needs to be big enough to hold them both */
264 }
266 /* A double register */
269 else
273 }
274 }
277 ARG_CLASS_NO_CLASS,
278 ARG_CLASS_MEMORY,
279 ARG_CLASS_INTEGER,
280 ARG_CLASS_SSE
283 static ArgumentClass
285 {
308 #ifdef TARGET_WIN32
310 #else
312 #endif
322 }
323 /* fall through */
331 }
333 }
336 }
338 /* Merge */
340 ;
347 else
351 }
358 /*
359 * collect_field_info_nested:
360 *
361 * Collect field info from KLASS recursively into FIELDS.
362 */
363 static void
364 collect_field_info_nested (MonoClass *klass, GArray *fields_array, int offset, gboolean pinvoke, gboolean unicode)
365 {
374 collect_field_info_nested (mono_class_from_mono_type_internal (info->fields [i].field->type), fields_array, info->fields [i].offset, pinvoke, unicode);
376 guint32 align;
377 StructFieldInfo f;
385 /* This can happen with .pack directives eg. 'fixed' arrays */
387 /* Replicate the last field to fill out the remaining place, since the code in add_valuetype () needs type information */
392 }
396 }
399 }
400 }
401 }
403 gpointer iter;
411 collect_field_info_nested (mono_class_from_mono_type_internal (field->type), fields_array, field->offset - MONO_ABI_SIZEOF (MonoObject), pinvoke, unicode);
414 StructFieldInfo f;
421 }
422 }
423 }
424 }
426 #ifdef TARGET_WIN32
428 /* Windows x64 ABI can pass/return value types in register of size 1,2,4,8 bytes. */
429 #define MONO_WIN64_VALUE_TYPE_FITS_REG(arg_size) (arg_size <= SIZEOF_REGISTER && (arg_size == 1 || arg_size == 2 || arg_size == 4 || arg_size == 8))
431 static gboolean
432 allocate_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, const AMD64_Reg_No int_regs [], int int_reg_count, const AMD64_XMM_Reg_No float_regs [], int float_reg_count, guint32 *current_int_reg, guint32 *current_float_reg)
433 {
436 assert (arg_info != NULL && int_regs != NULL && float_regs != NULL && current_int_reg != NULL && current_float_reg != NULL);
446 /* Pass parameter in integer register. */
452 /* Pass parameter in float register. */
453 arg_info->pair_storage [0] = (arg_size <= sizeof (gfloat)) ? ArgInFloatSSEReg : ArgInDoubleSSEReg;
457 }
462 }
465 }
468 allocate_parameter_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
469 {
470 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, param_regs, PARAM_REGS, float_param_regs, FLOAT_PARAM_REGS, current_int_reg, current_float_reg);
471 }
474 allocate_return_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
475 {
476 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, return_regs, RETURN_REGS, float_return_regs, FLOAT_RETURN_REGS, current_int_reg, current_float_reg);
477 }
479 static void
480 allocate_storage_for_valuetype_win64 (ArgInfo *arg_info, MonoType *type, gboolean is_return, ArgumentClass arg_class,
482 {
483 /* Windows x64 value type ABI.
484 *
485 * Parameters: https://msdn.microsoft.com/en-us/library/zthk2dkh.aspx
486 *
487 * Integer/Float types smaller than or equals to 8 bytes or porperly sized struct/union (1,2,4,8)
488 * Try pass in register using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8), if no more registers, pass on stack using ArgOnStack as storage and size of parameter(1,2,4,8).
489 * Integer/Float types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
490 * Try to pass pointer in register using ArgValuetypeAddrInIReg, if no more registers, pass pointer on stack using ArgValuetypeAddrOnStack as storage and parameter size of register (8 bytes).
491 *
492 * Return values: https://msdn.microsoft.com/en-us/library/7572ztz4.aspx.
493 *
494 * Integers/Float types smaller than or equal to 8 bytes
495 * Return in corresponding register RAX/XMM0 using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8).
496 * Properly sized struct/unions (1,2,4,8)
497 * Return in register RAX using ArgValuetypeInReg as storage and size of parameter(1,2,4,8).
498 * Types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
499 * Return pointer to allocated stack space (allocated by caller) using ArgValuetypeAddrInIReg as storage and parameter size.
500 */
502 assert (arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
506 /* Parameter cases. */
510 /* First, try to use registers for parameter. If type is struct it can only be passed by value in integer register. */
512 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
513 /* No more registers, fallback passing parameter on stack as value. */
514 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
516 /* Passing value directly on stack, so use size of value. */
522 }
524 /* Fallback to stack, try to pass address to parameter in register. Always use integer register to represent stack address. */
526 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
527 /* No more registers, fallback passing address to parameter on stack. */
528 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
530 /* Passing an address to value on stack, so use size of register as argument size. */
536 }
537 }
539 /* Return value cases. */
543 /* Return value fits into return registers. If type is struct it can only be returned by value in integer register. */
545 allocate_return_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
547 /* Only RAX/XMM0 should be used to return valuetype. */
548 assert ((arg_info->pair_regs[0] == AMD64_RAX && arg_info->pair_regs[1] == ArgNone) || (arg_info->pair_regs[0] == AMD64_XMM0 && arg_info->pair_regs[1] == ArgNone));
550 /* Return value doesn't fit into return register, return address to allocated stack space (allocated by caller and passed as input). */
552 allocate_return_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
554 /* Only RAX should be used to return valuetype address. */
560 }
561 }
562 }
564 static void
565 get_valuetype_size_win64 (MonoClass *klass, gboolean pinvoke, ArgInfo *arg_info, MonoType *type, ArgumentClass *arg_class, guint32 *arg_size)
566 {
570 assert (klass != NULL && arg_info != NULL && type != NULL && arg_class != NULL && arg_size != NULL);
573 /* Calculate argument class type and size of marshalled type. */
577 /* Calculate argument class type and size of managed type. */
579 }
581 /* Windows ABI only handle value types on stack or passed in integer register (if it fits register size). */
585 /* Value type has a size that doesn't seem to fit register according to ABI. Try to used full stack size of type. */
587 }
589 /*
590 * Standard C and C++ doesn't allow empty structs, empty structs will always have a size of 1 byte.
591 * GCC have an extension to allow empty structs, https://gcc.gnu.org/onlinedocs/gcc/Empty-Structures.html.
592 * This cause a little dilemma since runtime build using none GCC compiler will not be compatible with
593 * GCC build C libraries and the other way around. On platforms where empty structs has size of 1 byte
594 * it must be represented in call and cannot be dropped.
595 */
600 }
603 }
605 static void
608 {
611 ArgumentClass arg_class;
613 assert (signature != NULL && arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
618 /* Only drop value type if its not an empty struct as input that must be represented in call */
619 if ((arg_size == 0 && !arg_info->pass_empty_struct) || (arg_info->pass_empty_struct && is_return)) {
623 /* Alocate storage for value type. */
624 allocate_storage_for_valuetype_win64 (arg_info, type, is_return, arg_class, arg_size, current_int_reg, current_float_reg, stack_size);
625 }
626 }
630 static void
632 gboolean is_return,
634 {
635 #ifdef TARGET_WIN32
637 #else
639 /* Keep track of the size used in each quad so we can */
640 /* use the right size when copying args/return vars. */
653 /* We pass and return vtypes of size 8 in a register */
656 }
658 /* If this struct can't be split up naturally into 8-byte */
659 /* chunks (registers), pass it on the stack. */
666 }
667 /*
668 * Collect field information recursively to be able to
669 * handle nested structures.
670 */
680 }
681 }
687 }
690 /* Allways pass in memory */
699 }
703 else
712 /* Always pass in 1 or 2 integer registers */
715 /* Only the simplest cases are supported */
719 }
721 /*
722 * Implement the algorithm from section 3.2.3 of the X86_64 ABI.
723 * The X87 and SSEUP stuff is left out since there are no such types in
724 * the CLR.
725 */
730 }
741 }
746 ArgumentClass class1;
750 else
754 /* Unaligned field */
755 NOT_IMPLEMENTED;
756 }
758 /* Skip fields in other quad */
764 /* How far into this quad this data extends.*/
765 /* (8 is size of quad) */
769 }
770 /* Empty structs have a nonzero size, causing this assert to be hit */
774 }
775 }
779 /* Post merger cleanup */
783 /* Allocate registers */
784 {
790 while (quadsize [1] != 0 && quadsize [1] != 1 && quadsize [1] != 2 && quadsize [1] != 4 && quadsize [1] != 8)
809 else
812 }
823 }
831 }
832 }
836 /* Revert possible register assignments */
843 else
849 }
850 }
852 }
854 /*
855 * get_call_info:
856 *
857 * Obtain information about a call according to the calling convention.
858 * For AMD64 System V, see the "System V ABI, x86-64 Architecture Processor Supplement
859 * Draft Version 0.23" document for more information.
860 * For AMD64 Windows, see "Overview of x64 Calling Conventions",
861 * https://msdn.microsoft.com/en-us/library/ms235286.aspx
862 */
865 {
875 else
884 #ifdef TARGET_WIN32
885 /* Reserve space where the callee can save the argument registers */
887 #endif
889 /* return value */
924 }
928 }
929 /* fall through */
937 }
947 }
950 /*
951 * To simplify get_this_arg_reg () and LLVM integration, emit the vret arg after
952 * the first argument, allowing 'this' to be always passed in the first arg reg.
953 * Also do this if the first argument is a reference type, since virtual calls
954 * are sometimes made using calli without sig->hasthis set, like in the delegate
955 * invoke wrappers.
956 */
958 if ((ret_storage == ArgValuetypeAddrInIReg || ret_storage == ArgGsharedvtVariableInReg) && !is_pinvoke && (sig->hasthis || (sig->param_count > 0 && MONO_TYPE_IS_REFERENCE (mini_get_underlying_type (sig->params [0]))))) {
964 }
969 /* this */
976 }
977 }
983 /* Emit the signature cookie just before the implicit arguments */
985 }
991 #ifdef TARGET_WIN32
992 /* The float param registers and other param registers must be the same index on Windows x64.*/
997 #endif
1000 /* We allways pass the sig cookie on the stack for simplicity */
1001 /*
1002 * Prevent implicit arguments + the sig cookie from being passed
1003 * in registers.
1004 */
1008 /* Emit the signature cookie just before the implicit arguments */
1010 }
1040 }
1042 /* gsharedvt arguments are passed by ref */
1046 else
1049 }
1050 /* fall through */
1068 /* gsharedvt arguments are passed by ref */
1073 else
1078 }
1079 }
1081 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
1085 /* Emit the signature cookie just before the implicit arguments */
1087 }
1093 }
1095 static int
1097 {
1101 }
1103 static gpointer
1105 {
1115 // Empty struct
1120 }
1121 }
1123 static void
1125 {
1129 /* Reconstruct the value type */
1143 }
1144 dest_cast++;
1145 }
1146 }
1148 static void
1150 {
1167 }
1168 src_cast++;
1169 }
1170 }
1172 void
1173 mono_arch_set_native_call_context_args (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1174 {
1177 gpointer storage;
1191 }
1192 }
1202 else
1208 }
1211 }
1213 void
1214 mono_arch_set_native_call_context_ret (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1215 {
1218 gpointer storage;
1233 else
1239 }
1242 }
1244 void
1245 mono_arch_get_native_call_context_args (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1246 {
1249 gpointer storage;
1257 }
1258 }
1269 }
1271 }
1274 }
1276 void
1277 mono_arch_get_native_call_context_ret (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1278 {
1282 gpointer storage;
1284 /* No return value */
1292 /* The return values were stored directly at address passed in reg */
1301 }
1303 }
1306 }
1308 /*
1309 * mono_arch_get_argument_info:
1310 * @csig: a method signature
1311 * @param_count: the number of parameters to consider
1312 * @arg_info: an array to store the result infos
1313 *
1314 * Gathers information on parameters such as size, alignment and
1315 * padding. arg_info should be large enought to hold param_count + 1 entries.
1316 *
1317 * Returns the size of the argument area on the stack.
1318 */
1319 int
1320 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
1321 {
1326 /* The arguments are saved to a stack area in mono_arch_instrument_prolog */
1329 }
1333 /* FIXME: */
1335 }
1340 }
1342 #ifndef DISABLE_JIT
1343 gboolean
1344 mono_arch_tailcall_supported (MonoCompile *cfg, MonoMethodSignature *caller_sig, MonoMethodSignature *callee_sig, gboolean virtual_)
1345 {
1351 // Limit stack_usage to 1G. Assume 32bit limits when we move parameters.
1355 // valuetype parameters are address of local
1361 }
1367 }
1370 /*
1371 * Initialize the cpu to execute managed code.
1372 */
1373 void
1375 {
1376 #ifndef _MSC_VER
1377 guint16 fpcw;
1379 /* spec compliance requires running with double precision */
1385 #else
1386 /* TODO: This is crashing on Win64 right now.
1387 * _control87 (_PC_53, MCW_PC);
1388 */
1389 #endif
1390 }
1392 /*
1393 * Initialize architecture specific code.
1394 */
1395 void
1397 {
1401 mono_aot_register_jit_icall ("mono_amd64_throw_corlib_exception", mono_amd64_throw_corlib_exception);
1404 #if defined(MONO_ARCH_GSHAREDVT_SUPPORTED)
1405 mono_aot_register_jit_icall ("mono_amd64_start_gsharedvt_call", mono_amd64_start_gsharedvt_call);
1406 #endif
1410 }
1412 /*
1413 * Cleanup architecture specific code.
1414 */
1415 void
1417 {
1419 }
1421 /*
1422 * This function returns the optimizations supported on this cpu.
1423 */
1424 guint32
1426 {
1436 else
1440 }
1443 }
1445 /*
1446 * This function test for all SSE functions supported.
1447 *
1448 * Returns a bitmask corresponding to all supported versions.
1449 *
1450 */
1451 guint32
1453 {
1478 }
1480 #ifndef DISABLE_JIT
1482 GList *
1484 {
1492 /* unused vars */
1504 }
1505 }
1510 }
1512 /**
1513 * mono_arch_compute_omit_fp:
1514 * Determine whether the frame pointer can be eliminated.
1515 */
1516 static void
1518 {
1535 /*
1536 * FIXME: Remove some of the restrictions.
1537 */
1546 /*
1547 if (cfg->method->save_lmf)
1548 cfg->arch.omit_fp = FALSE;
1549 */
1561 if (ainfo->storage == ArgOnStack || ainfo->storage == ArgValuetypeAddrInIReg || ainfo->storage == ArgValuetypeAddrOnStack) {
1562 /*
1563 * The stack offset can only be determined when the frame
1564 * size is known.
1565 */
1567 }
1568 }
1576 }
1577 }
1579 GList *
1581 {
1589 /* We use the callee saved registers for global allocation */
1595 #ifdef TARGET_WIN32
1598 #endif
1601 }
1603 /*
1604 * mono_arch_regalloc_cost:
1605 *
1606 * Return the cost, in number of memory references, of the action of
1607 * allocating the variable VMV into a register during global register
1608 * allocation.
1609 */
1610 guint32
1612 {
1616 /* The register is already saved */
1617 /* substract 1 for the invisible store in the prolog */
1619 else
1620 /* push+pop */
1622 }
1624 /*
1625 * mono_arch_fill_argument_info:
1626 *
1627 * Populate cfg->args, cfg->ret and cfg->vret_addr with information about the arguments
1628 * of the method.
1629 */
1630 void
1632 {
1642 /*
1643 * Contrary to mono_arch_allocate_vars (), the information should describe
1644 * where the arguments are at the beginning of the method, not where they can be
1645 * accessed during the execution of the method. The later makes no sense for the
1646 * global register allocator, since a variable can be in more than one location.
1647 */
1664 }
1684 /* Dummy */
1689 }
1690 }
1691 }
1693 void
1695 {
1711 /*
1712 * We use the ABI calling conventions for managed code as well.
1713 * Exception: valuetypes are only sometimes passed or returned in registers.
1714 */
1716 /*
1717 * The stack looks like this:
1718 * <incoming arguments passed on the stack>
1719 * <return value>
1720 * <lmf/caller saved registers>
1721 * <locals>
1722 * <spill area>
1723 * <localloc area> -> grows dynamically
1724 * <params area>
1725 */
1732 /* Locals are allocated backwards from %fp */
1735 }
1739 /* Save all callee-saved registers normally (except RBP, if not already used), and restore them when unwinding through an LMF */
1742 }
1746 /* Reserve space for callee saved registers */
1750 }
1765 /* The register is volatile */
1774 }
1778 }
1781 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
1790 }
1794 }
1795 }
1797 /* Allocate locals */
1798 offsets = mono_allocate_stack_slots (cfg, cfg->arch.omit_fp ? FALSE: TRUE, &locals_stack_size, &locals_stack_align);
1802 }
1809 }
1818 else
1820 //printf ("allocated local %d to ", i); mono_print_tree_nl (ins);
1821 }
1822 }
1829 }
1837 /* FIXME: Allocate volatile arguments to registers */
1841 /*
1842 * Under AMD64, all registers used to pass arguments to functions
1843 * are volatile across calls.
1844 * FIXME: Optimize this.
1845 */
1846 if ((ainfo->storage == ArgInIReg) || (ainfo->storage == ArgInFloatSSEReg) || (ainfo->storage == ArgInDoubleSSEReg) || (ainfo->storage == ArgValuetypeInReg) || (ainfo->storage == ArgGSharedVtInReg))
1859 }
1874 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
1883 }
1887 }
1893 }
1895 NOT_IMPLEMENTED;
1896 }
1898 if (!inreg && (ainfo->storage != ArgOnStack) && (ainfo->storage != ArgValuetypeAddrInIReg) && (ainfo->storage != ArgValuetypeAddrOnStack) && (ainfo->storage != ArgGSharedVtOnStack)) {
1901 /* These arguments are saved to the stack in the prolog */
1905 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (target_mgreg_t) : sizeof (target_mgreg_t);
1906 // Arguments are yet supported by the stack map creation code
1907 //cfg->locals_max_stack_offset = MAX (cfg->locals_max_stack_offset, offset);
1909 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (target_mgreg_t) : sizeof (target_mgreg_t);
1911 //cfg->locals_min_stack_offset = MIN (cfg->locals_min_stack_offset, offset);
1912 }
1913 }
1914 }
1915 }
1918 }
1920 void
1922 {
1935 if (cinfo->ret.storage == ArgValuetypeAddrInIReg || cinfo->ret.storage == ArgGsharedvtVariableInReg) {
1940 }
1941 }
1950 }
1958 }
1965 }
1966 }
1968 static void
1969 add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, ArgStorage storage, int reg, MonoInst *tree)
1970 {
2000 }
2001 }
2003 static int
2005 {
2008 #if defined(MONO_ARCH_ILP32)
2010 #else
2012 #endif
2019 }
2022 }
2024 static void
2026 {
2031 NOT_IMPLEMENTED;
2035 /*
2036 * mono_ArgIterator_Setup assumes the signature cookie is
2037 * passed first and all the arguments which were before it are
2038 * passed on the stack after the signature. So compensate by
2039 * passing a different signature.
2040 */
2041 tmp_sig = mono_metadata_signature_dup_full (m_class_get_image (cfg->method->klass), call->signature);
2044 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
2049 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORE_MEMBASE_REG, AMD64_RSP, cinfo->sig_cookie.offset, sig_reg);
2050 }
2052 #ifdef ENABLE_LLVM
2055 {
2067 }
2068 }
2070 LLVMCallInfo*
2072 {
2085 linfo = mono_mempool_alloc0 (cfg->mempool, sizeof (LLVMCallInfo) + (sizeof (LLVMArgInfo) * n));
2087 /*
2088 * LLVM always uses the native ABI while we use our own ABI, the
2089 * only difference is the handling of vtypes:
2090 * - we only pass/receive them in registers in some cases, and only
2091 * in 1 or 2 integer registers.
2092 */
2106 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2107 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2111 }
2117 }
2120 /* Vtype returned using a hidden argument */
2127 }
2134 else
2151 else
2156 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2157 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2161 }
2165 linfo->args [i].pair_storage [j] = arg_storage_to_llvm_arg_storage (cfg, ainfo->pair_storage [j]);
2179 }
2180 }
2183 }
2184 #endif
2186 void
2188 {
2201 /* We shouldn't be called in the llvm case */
2204 }
2206 /*
2207 * Emit all arguments which are passed on the stack to prevent register
2208 * allocation problems.
2209 */
2218 else
2222 //XXX what about ArgGSharedVtOnStack here?
2223 // FIXME tailcall is not always yet initialized.
2230 else
2234 }
2239 }
2240 }
2241 }
2243 /*
2244 * Emit all parameters passed in registers in non-reverse order for better readability
2245 * and to help the optimization in emit_prolog ().
2246 */
2254 }
2265 else
2271 /* Already done */
2283 // FIXME tailcall is not always yet initialized.
2285 /* Already emitted above */
2287 //FIXME what about ArgGSharedVtOnStack ?
2288 // FIXME tailcall is not always yet initialized.
2294 }
2296 guint32 align;
2297 guint32 size;
2302 /*
2303 * Other backends use mono_type_stack_size (), but that
2304 * aligns the size to 8, which is larger than the size of
2305 * the source, leading to reads of invalid memory if the
2306 * source is at the end of address space.
2307 */
2309 }
2312 /* Avoid asserts in emit_memcpy () */
2313 mono_cfg_set_exception_invalid_program (cfg, g_strdup_printf ("Passing an argument of size '%d'.", size));
2314 /* Continue normally */
2315 }
2327 }
2329 }
2332 }
2335 /* Emit the signature cookie just before the implicit arguments */
2337 }
2339 /* Handle the case where there are no implicit arguments */
2346 /*
2347 * Tell the JIT to use a more efficient calling convention: call using
2348 * OP_CALL, compute the result location after the call, and save the
2349 * result there.
2350 */
2352 /*
2353 * Nullify the instruction computing the vret addr to enable
2354 * future optimizations.
2355 */
2360 NOT_IMPLEMENTED;
2361 /*
2362 * The valuetype is in RAX:RDX after the call, need to be copied to
2363 * the stack. Push the address here, so the call instruction can
2364 * access it.
2365 */
2368 /* Prevent it from being register allocated or optimized away */
2370 }
2373 }
2385 }
2388 }
2393 }
2396 }
2398 void
2400 {
2416 //Pass empty struct value as 0 on platforms representing empty structs as 1 byte.
2418 }
2434 }
2435 }
2440 }
2442 }
2447 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
2471 }
2473 }
2475 /* Pass by addr */
2490 // FIXME: Code growth
2492 }
2496 EMIT_NEW_GC_PARAM_SLOT_LIVENESS_DEF (cfg, def, ainfo->offset, m_class_get_byval_arg (ins->klass));
2497 }
2498 }
2499 }
2501 void
2503 {
2509 else
2515 }
2518 }
2522 #define EMIT_COND_BRANCH(ins,cond,sign) \
2523 if (ins->inst_true_bb->native_offset) { \
2524 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
2525 } else { \
2526 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
2527 if (optimize_branch_pred && \
2528 x86_is_imm8 (ins->inst_true_bb->max_offset - offset)) \
2529 x86_branch8 (code, cond, 0, sign); \
2530 else \
2531 x86_branch32 (code, cond, 0, sign); \
2532 }
2540 static gboolean
2542 {
2555 }
2570 }
2571 }
2574 }
2576 /*
2577 * mono_arch_dyn_call_prepare:
2578 *
2579 * Return a pointer to an arch-specific structure which contains information
2580 * needed by mono_arch_get_dyn_call_args (). Return NULL if OP_DYN_CALL is not
2581 * supported for SIG.
2582 * This function is equivalent to ffi_prep_cif in libffi.
2583 */
2584 MonoDynCallInfo*
2586 {
2596 }
2599 // FIXME: Preprocess the info to speed up get_dyn_call_args ().
2609 info->nstack_args = MAX (info->nstack_args, (ainfo->offset / sizeof (target_mgreg_t)) + (ainfo->arg_size / sizeof (target_mgreg_t)));
2613 }
2614 }
2625 if (t->type == MONO_TYPE_GENERICINST && mono_class_is_nullable (mono_class_from_mono_type_internal (t))) {
2630 /* Nullables need a temporary buffer, its stored at the end of DynCallArgs.regs after the stack args */
2633 }
2634 }
2638 }
2639 }
2643 /* Align to 16 bytes */
2648 }
2650 /*
2651 * mono_arch_dyn_call_free:
2652 *
2653 * Free a MonoDynCallInfo structure.
2654 */
2655 void
2657 {
2662 }
2664 int
2666 {
2669 /* Extend the 'regs' field dynamically */
2670 return sizeof (DynCallArgs) + (ainfo->nstack_args * sizeof (target_mgreg_t)) + ainfo->nullable_area;
2671 }
2673 #define PTR_TO_GREG(ptr) ((host_mgreg_t)(ptr))
2674 #define GREG_TO_PTR(greg) ((gpointer)(greg))
2676 /*
2677 * mono_arch_get_start_dyn_call:
2678 *
2679 * Convert the arguments ARGS to a format which can be passed to OP_DYN_CALL, and
2680 * store the result into BUF.
2681 * ARGS should be an array of pointers pointing to the arguments.
2682 * RET should point to a memory buffer large enought to hold the result of the
2683 * call.
2684 * This function should be as fast as possible, any work which does not depend
2685 * on the actual values of the arguments should be done in
2686 * mono_arch_dyn_call_prepare ().
2687 * start_dyn_call + OP_DYN_CALL + finish_dyn_call is equivalent to ffi_call in
2688 * libffi.
2689 */
2690 void
2692 {
2713 }
2723 /* Stored after the stack arguments */
2730 }
2732 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg)
2750 }
2755 }
2762 #if !defined(MONO_ARCH_ILP32)
2765 #endif
2768 #if defined(MONO_ARCH_ILP32)
2773 #endif
2801 }
2803 }
2810 }
2816 } else if (t->type == MONO_TYPE_GENERICINST && mono_class_is_nullable (mono_class_from_mono_type_internal (t))) {
2828 }
2830 /* The argument pointed to by arg is either a boxed vtype or null */
2834 /* Fall though */
2837 /* Fall through */
2838 }
2857 }
2866 }
2867 }
2871 // In DYNCALL use case value types are already copied when included in parameter array.
2872 // Currently no need to make an extra temporary value type on stack for this use case.
2882 }
2884 }
2887 }
2888 }
2889 }
2891 /*
2892 * mono_arch_finish_dyn_call:
2893 *
2894 * Store the result of a dyn call into the return value buffer passed to
2895 * start_dyn_call ().
2896 * This function should be as fast as possible, any work which does not depend
2897 * on the actual values of the arguments should be done in
2898 * mono_arch_dyn_call_prepare ().
2899 */
2900 void
2902 {
2956 /* Fall through */
2957 }
2959 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg) {
2960 /* Nothing to do */
2979 }
2980 }
2981 }
2985 }
2986 }
2988 #undef PTR_TO_GREG
2989 #undef GREG_TO_PTR
2991 /* emit an exception if condition is fail */
2992 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
2993 do { \
2994 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
2995 if (tins == NULL) { \
2996 mono_add_patch_info (cfg, code - cfg->native_code, \
2997 MONO_PATCH_INFO_EXC, exc_name); \
2998 x86_branch32 (code, cond, 0, signed); \
2999 } else { \
3000 EMIT_COND_BRANCH (tins, cond, signed); \
3001 } \
3002 } while (0);
3004 #define EMIT_FPCOMPARE(code) do { \
3005 amd64_fcompp (code); \
3006 amd64_fnstsw (code); \
3007 } while (0);
3009 #define EMIT_SSE2_FPFUNC(code, op, dreg, sreg1) do { \
3010 amd64_movsd_membase_reg (code, AMD64_RSP, -8, (sreg1)); \
3011 amd64_fld_membase (code, AMD64_RSP, -8, TRUE); \
3012 amd64_ ##op (code); \
3013 amd64_fst_membase (code, AMD64_RSP, -8, TRUE, TRUE); \
3014 amd64_movsd_reg_membase (code, (dreg), AMD64_RSP, -8); \
3015 } while (0);
3017 #ifndef DISABLE_JIT
3019 emit_call_body (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data)
3020 {
3023 /*
3024 * FIXME: Add support for thunks
3025 */
3026 {
3029 /*
3030 * Indirect calls are expensive so try to make a near call if possible.
3031 * The caller memory is allocated by the code manager so it is
3032 * guaranteed to be at a 32 bit offset.
3033 */
3036 /* The target is in memory allocated using the code manager */
3041 /* The callee might be an AOT method */
3044 /* The target is in malloc-ed memory */
3046 }
3049 /*
3050 * The call might go directly to a native function without
3051 * the wrapper.
3052 */
3058 }
3059 }
3060 }
3073 /*
3074 * This is not really an optimization, but required because the
3075 * generic class init trampolines use R11 to pass the vtable.
3076 */
3078 }
3083 /* No wrapper */
3086 }
3088 /* ?See the comment in mono_codegen ()? */
3090 }
3091 }
3095 }
3096 }
3097 }
3100 /* These methods are allocated using malloc */
3103 #ifdef MONO_ARCH_NOMAP32BIT
3105 #endif
3106 /* The 64bit XEN kernel does not honour the MAP_32BIT flag. (#522894) */
3113 }
3116 /*
3117 * Align the call displacement to an address divisible by 4 so it does
3118 * not span cache lines. This is required for code patching to work on SMP
3119 * systems.
3120 */
3124 }
3127 }
3133 }
3137 }
3138 }
3143 }
3146 emit_call (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data, gboolean win64_adjust_stack)
3147 {
3148 #ifdef TARGET_WIN32
3151 #endif
3153 #ifdef TARGET_WIN32
3156 #endif
3161 }
3165 {
3173 }
3176 }
3179 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB) || ((opcode) == OP_ISBB_IMM)))
3181 /*
3182 * mono_arch_peephole_pass_1:
3183 *
3184 * Perform peephole opts which should/can be performed before local regalloc
3185 */
3186 void
3188 {
3199 /*
3200 * X86_LEA is like ADD, but doesn't have the
3201 * sreg1==dreg restriction. inst_imm > 0 is needed since LEA sign-extends
3202 * its operand to 64 bit.
3203 */
3206 }
3213 /*
3214 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3215 * the latter has length 2-3 instead of 6 (reverse constant
3216 * propagation). These instruction sequences are very common
3217 * in the initlocals bblock.
3218 */
3220 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3223 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG)) {
3224 /* Continue */
3225 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3227 /* Continue */
3229 /* Continue */
3232 }
3233 }
3234 }
3238 /* OP_COMPARE_IMM (reg, 0)
3239 * -->
3240 * OP_AMD64_TEST_NULL (reg)
3241 */
3250 /*
3251 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3252 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
3253 * -->
3254 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3255 * OP_COMPARE_IMM reg, imm
3256 *
3257 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
3258 */
3265 /* check if we can remove cmp reg,0 with test null */
3268 }
3271 }
3274 }
3275 }
3277 void
3279 {
3287 /* reg = 0 -> XOR (reg, reg) */
3288 /* XOR sets cflags on x86, so we cant do it always */
3293 /* Fall through */
3296 }
3297 }
3299 /*
3300 * Use IXOR to avoid a rex prefix if possible. The cpu will sign extend the
3301 * 0 result into 64 bits.
3302 */
3305 }
3306 /* Fall through */
3311 /*
3312 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3313 * the latter has length 2-3 instead of 6 (reverse constant
3314 * propagation). These instruction sequences are very common
3315 * in the initlocals bblock.
3316 */
3318 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3321 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_REG) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG) || (ins2->opcode == OP_LIVERANGE_START) || (ins2->opcode == OP_GC_LIVENESS_DEF) || (ins2->opcode == OP_GC_LIVENESS_USE)) {
3322 /* Continue */
3323 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3325 /* Continue */
3327 /* Continue */
3330 }
3331 }
3332 }
3342 }
3345 }
3346 }
3348 #define NEW_INS(cfg,ins,dest,op) do { \
3349 MONO_INST_NEW ((cfg), (dest), (op)); \
3350 (dest)->cil_code = (ins)->cil_code; \
3351 mono_bblock_insert_before_ins (bb, ins, (dest)); \
3352 } while (0)
3354 /*
3355 * mono_arch_lowering_pass:
3356 *
3357 * Converts complex opcodes into simpler ones so that each IR instruction
3358 * corresponds to one machine instruction.
3359 */
3360 void
3362 {
3365 /*
3366 * FIXME: Need to add more instructions, but the current machine
3367 * description can't model some parts of the composite instructions like
3368 * cdq.
3369 */
3389 }
3391 #ifndef MONO_ARCH_ILP32
3393 #endif
3395 /* Don't generate memindex opcodes (to simplify */
3396 /* read sandboxing) */
3403 }
3405 #ifndef MONO_ARCH_ILP32
3407 #endif
3415 }
3417 #ifdef MONO_ARCH_SIMD_INTRINSICS
3438 }
3440 #endif
3443 }
3444 }
3447 }
3449 static const int
3450 branch_cc_table [] = {
3454 };
3456 /* Maps CMP_... constants to X86_CC_... constants */
3457 static const int
3458 cc_table [] = {
3461 };
3463 static const int
3464 cc_signed_table [] = {
3467 };
3469 /*#include "cprop.c"*/
3472 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int sreg, int size, gboolean is_signed)
3473 {
3476 else
3484 }
3488 {
3492 #if defined(TARGET_WIN32)
3494 #elif defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
3497 #endif
3502 /*
3503 * Under Windows:
3504 * If requested stack size is larger than one page,
3505 * perform stack-touch operation
3506 */
3507 /*
3508 * Generate stack probe code.
3509 * Under Windows, it is necessary to allocate one page at a time,
3510 * "touching" stack after each successful sub-allocation. This is
3511 * because of the way stack growth is implemented - there is a
3512 * guard page before the lowest stack page that is currently commited.
3513 * Stack normally grows sequentially so OS traps access to the
3514 * guard page and commits more pages when needed.
3515 */
3536 }
3537 else
3545 }
3549 }
3553 }
3573 }
3575 }
3579 {
3581 guint32 quad;
3583 /* Move return value to the target register */
3584 /* FIXME: do this in the local reg allocator */
3600 }
3604 }
3606 }
3623 /* Load the destination address */
3625 amd64_mov_reg_membase (code, AMD64_RCX, loc->inst_basereg, loc->inst_offset, sizeof(gpointer));
3630 amd64_mov_membase_reg (code, AMD64_RCX, (quad * sizeof (target_mgreg_t)), cinfo->ret.pair_regs [quad], sizeof (target_mgreg_t));
3641 NOT_IMPLEMENTED;
3642 }
3643 }
3644 }
3646 }
3649 }
3653 #ifdef TARGET_MACH
3655 #endif
3657 gboolean
3659 {
3660 #ifdef TARGET_MACH
3673 /*
3674 * We're looking for these two instructions:
3675 *
3676 * mov %gs:[offset](,%rdi,8),%rax
3677 * retq
3678 */
3691 /*
3692 * Apple now loads a different version of pthread_getspecific when launched from Xcode
3693 * For that version we're looking for these instructions:
3694 *
3695 * pushq %rbp
3696 * movq %rsp, %rbp
3697 * mov %gs:[offset](,%rdi,8),%rax
3698 * popq %rbp
3699 * retq
3700 */
3718 }
3722 #elif defined(TARGET_ANDROID)
3724 #else
3728 #endif
3729 }
3731 int
3733 {
3734 #ifdef TARGET_OSX
3736 #else
3739 #endif
3740 }
3742 /*
3743 * \param code buffer to store code to
3744 * \param dreg hard register where to place the result
3745 * \param tls_offset offset info
3746 * \return a pointer to the end of the stored code
3747 *
3748 * mono_amd64_emit_tls_get emits in \p code the native code that puts in
3749 * the dreg register the item in the thread local storage identified
3750 * by tls_offset.
3751 */
3754 {
3755 #ifdef TARGET_WIN32
3763 /* Load TEB->TlsExpansionSlots */
3771 }
3772 #elif defined(TARGET_MACH)
3775 #else
3783 }
3784 #endif
3786 }
3790 {
3791 #ifdef TARGET_WIN32
3793 #elif defined(TARGET_MACH)
3796 #else
3800 #endif
3802 }
3804 /*
3805 * emit_setup_lmf:
3806 *
3807 * Emit code to initialize an LMF structure at LMF_OFFSET.
3808 */
3811 {
3812 /*
3813 * The ip field is not set, the exception handling code will obtain it from the stack location pointed to by the sp field.
3814 */
3815 /*
3816 * sp is saved right before calls but we need to save it here too so
3817 * async stack walks would work.
3818 */
3819 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
3820 /* Save rbp */
3821 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), AMD64_RBP, 8);
3823 mono_emit_unwind_op_offset (cfg, code, AMD64_RBP, - (cfa_offset - (lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp))));
3825 /* These can't contain refs */
3826 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, previous_lmf), SLOT_NOREF);
3827 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), SLOT_NOREF);
3828 /* These are handled automatically by the stack marking code */
3829 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), SLOT_NOREF);
3832 }
3834 #ifdef TARGET_WIN32
3836 #define TEB_LAST_ERROR_SLOT 0x30
3837 #define TEB_LAST_ERROR_OFFSET 0x068
3841 {
3842 /* Threads last error value is located in TEB_LAST_ERROR_OFFSET. */
3848 }
3850 #else
3854 {
3856 }
3858 #endif
3860 /* benchmark and set based on cpu */
3861 #define LOOP_ALIGNMENT 8
3862 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
3864 #ifndef DISABLE_JIT
3868 {
3869 #ifndef TARGET_WIN32
3872 else
3874 #endif
3876 }
3879 amd64_handle_varargs_call (MonoCompile *cfg, guint8 *code, MonoCallInst *call, gboolean free_rax)
3880 {
3881 #ifdef TARGET_WIN32
3883 #else
3884 /*
3885 * The AMD64 ABI forces callers to know about varargs.
3886 */
3889 // deliberatly nothing -- but nreg = 0 and do not return
3890 } else if (cfg->method->wrapper_type == MONO_WRAPPER_MANAGED_TO_NATIVE && m_class_get_image (cfg->method->klass) != mono_defaults.corlib) {
3891 /*
3892 * Since the unmanaged calling convention doesn't contain a
3893 * 'vararg' entry, we have to treat every pinvoke call as a
3894 * potential vararg call.
3895 */
3900 }
3905 }
3907 #endif
3908 }
3910 void
3912 {
3917 /* Fix max_offset estimate for each successor bb */
3918 gboolean optimize_branch_pred = (cfg->opt & MONO_OPT_BRANCH) && (cfg->max_block_num < MAX_BBLOCKS_FOR_BRANCH_OPTS);
3926 }
3927 }
3931 /* set alignment depending on cpu */
3934 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
3938 }
3939 }
3948 if (mono_break_at_bb_method && mono_method_desc_full_match (mono_break_at_bb_method, cfg->method) && bb->block_num == mono_break_at_bb_bb_num)
3985 /* In AMD64 NaCl, pointers are 4 bytes, */
3986 /* so STORE_* != STOREI8_*. Likewise below. */
3988 amd64_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, sizeof(gpointer));
3997 /* In NaCl, this could be a PCONST type, which could */
3998 /* mean a pointer type was copied directly into the */
3999 /* lower 32-bits of inst_imm, so for InvalidPtr==-1 */
4000 /* the value would be 0x00000000FFFFFFFF which is */
4001 /* not proper for an imm32 unless you cast it. */
4003 amd64_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, (gint32)ins->inst_imm, sizeof(gpointer));
4010 #ifdef MONO_ARCH_ILP32
4011 /* In ILP32, pointers are 4 bytes, so separate these */
4012 /* cases, use literal 8 below where we really want 8 */
4016 #endif
4018 // FIXME: Decompose this earlier
4024 }
4031 // FIXME: Decompose this earlier
4037 }
4044 /* For NaCl, pointers are 4 bytes, so separate these */
4045 /* cases, use literal 8 below where we really want 8 */
4051 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, sizeof(gpointer));
4054 /* Use literal 8 instead of sizeof pointer or */
4055 /* register, we really want 8 for this opcode */
4066 /* The cpu zero extends the result into 64 bits */
4067 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE, 4);
4073 /* The cpu zero extends the result into 64 bits */
4074 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE, 4);
4101 /* Clean out the upper word */
4112 #if defined(MONO_ARCH_ILP32)
4113 /* Comparison of pointer immediates should be 4 bytes to avoid sign-extend problems */
4117 #endif
4149 /* FIXME: Make a 64 version too */
4150 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4154 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4158 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4162 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4166 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4169 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4172 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4175 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4181 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4200 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4203 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4206 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4210 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4213 amd64_alu_membase8_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4239 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4242 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4245 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4251 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4256 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4260 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4264 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4268 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4272 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4302 /* Load ss_tramp_var */
4303 /* This is equal to &ss_trampoline */
4305 /* Load the trampoline address */
4307 /* Call it if it is non-null */
4313 }
4315 /*
4316 * This is the address which is saved in seq points,
4317 */
4322 guint32 val;
4326 /* Load info var */
4329 /* Load the info->bp_addrs [offset], which is either NULL or the address of the breakpoint trampoline */
4334 /* Call the trampoline */
4341 /*
4342 * Emit a test+branch against a constant, the constant will be overwritten
4343 * by mono_arch_set_breakpoint () to cause the test to fail.
4344 */
4352 /* Load bp_tramp_var */
4353 /* This is equal to &bp_trampoline */
4355 /* Call the trampoline */
4358 }
4359 /*
4360 * Add an additional nop so skipping the bp doesn't cause the ip to point
4361 * to another IL offset.
4362 */
4365 }
4418 /* MOV r1, r2 */
4419 /* ADD r1, r1 */
4425 /* LEA r1, [r2 + r2*2] */
4429 /* LEA r1, [r2 + r2*4] */
4433 /* LEA r1, [r2 + r2*2] */
4434 /* ADD r1, r1 */
4439 /* LEA r1, [r2 + r2*8] */
4443 /* LEA r1, [r2 + r2*4] */
4444 /* ADD r1, r1 */
4449 /* LEA r1, [r2 + r2*2] */
4450 /* SHL r1, 2 */
4455 /* LEA r1, [r2 + r2*4] */
4456 /* LEA r1, [r1 + r1*4] */
4461 /* LEA r1, [r2 + r2*4] */
4462 /* SHL r1, 2 */
4463 /* LEA r1, [r1 + r1*4] */
4471 }
4473 }
4476 /* Regalloc magic makes the div/rem cases the same */
4484 }
4495 }
4506 }
4517 }
4650 /* the mul operation and the exception check should most likely be split */
4653 /*g_assert (ins->sreg2 == X86_EAX);
4654 g_assert (ins->dreg == X86_EAX);*/
4660 /* no need to save since we're going to store to it anyway */
4664 }
4667 }
4672 }
4676 }
4678 /* save before the check since pop and mov don't change the flags */
4687 }
4714 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
4738 /* This needs to operate on 64 bit values */
4739 amd64_cmov_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, ins->sreg2);
4753 else
4774 }
4776 }
4781 }
4784 // This opcode helps compute sizes, i.e.
4785 // of the subsequent OP_TAILCALL, but contributes no code.
4803 // FIXME hardcoding RAX here is not ideal.
4819 // FIXME Patch data instead of code.
4825 }
4826 }
4828 /* Restore callee saved registers */
4834 }
4839 // FIXME:
4841 NOT_IMPLEMENTED;
4844 /* Copy arguments on the stack to our argument area */
4845 // FIXME use rep mov for constant code size, before nonvolatiles
4846 // restored, first saving rsi, rdi into volatiles
4850 }
4852 #ifdef TARGET_WIN32
4856 #else
4858 #endif
4859 }
4861 #ifdef TARGET_WIN32
4862 // Redundant REX byte indicates a tailcall to the native unwinder. It means nothing to the processor.
4863 // https://github.com/dotnet/coreclr/blob/966dabb5bb3c4bf1ea885e1e8dc6528e8c64dc4f/src/unwinder/amd64/unwinder_amd64.cpp#L1394
4864 // FIXME This should be jmp rip+32 for AOT direct to same assembly.
4865 // FIXME This should be jmp [rip+32] for AOT direct to not-same assembly (through data).
4866 // FIXME This should be jmp [rip+32] for JIT direct -- patch data instead of code.
4867 // This is only close to ideal for tailcall_membase, and even then it should
4868 // have a more dynamic register allocation.
4871 #else
4872 // NT does not have varargs rax use, and NT ABI does not have red zone.
4873 // Use red-zone mov/jmp instead of push/ret to preserve call/ret speculation stack.
4874 // FIXME Just like NT the direct cases are are not ideal.
4878 #endif
4882 }
4884 /* ensure ins->sreg1 is not NULL */
4891 }
4904 else
4922 }
4952 /* r11 = args buffer filled by mono_arch_get_dyn_call_args () */
4954 /* r10 = ftn */
4957 /* Save args buffer */
4960 /* Set fp arg regs */
4961 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, has_fp), sizeof (target_mgreg_t));
4966 amd64_sse_movsd_reg_membase (code, i, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + (i * sizeof (double)));
4969 /* Allocate param area */
4970 /* This doesn't need to be freed since OP_DYN_CALL is never called in a loop */
4971 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, nstack_args), 8);
4974 /* Set stack args */
4975 /* rax/rcx/rdx/r8/r9 is scratch */
4980 amd64_mov_reg_membase (code, limit_reg, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, nstack_args), 8);
4982 amd64_lea_membase (code, src_reg, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + ((PARAM_REGS) * sizeof (target_mgreg_t)));
4998 /* Set argument registers */
5000 amd64_mov_reg_membase (code, param_regs [i], AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + (i * sizeof (target_mgreg_t)), sizeof (target_mgreg_t));
5002 /* Make the call */
5008 /* Save result */
5011 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs), AMD64_XMM0);
5012 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + sizeof (double), AMD64_XMM1);
5014 }
5017 amd64_mov_membase_reg (code, lmf_var->inst_basereg, lmf_var->inst_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
5019 }
5044 else
5055 }
5061 amd64_test_membase_imm_size (code, ins->sreg1, MONO_STRUCT_OFFSET (MonoVTable, initialized), 1, 1);
5071 }
5074 amd64_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
5083 /* keep alignment */
5111 }
5115 }
5119 }
5127 }
5135 }
5137 /* Align stack */
5141 /*
5142 * ins->inst_eh_blocks and bb->clause_holes are part of same GList.
5143 * Holes from bb->clause_holes will be added separately for the entire
5144 * basic block. Add only the rest of them.
5145 */
5148 /* Restore stack alignment */
5152 /* Even though we're saving RSP, use sizeof */
5153 /* gpointer because spvar is of type IntPtr */
5154 /* see: mono_create_spvar_for_region */
5156 amd64_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, AMD64_RSP, sizeof(gpointer));
5162 amd64_alu_reg_imm (code, X86_SUB, AMD64_RSP, ALIGN_TO (cfg->param_area, MONO_ARCH_FRAME_ALIGNMENT));
5163 }
5165 }
5168 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5171 }
5174 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5175 /* The local allocator will put the result into RAX */
5178 }
5187 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
5188 //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
5189 //break;
5197 else
5199 }
5225 amd64_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
5248 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], (const char *)ins->inst_p1);
5265 /* floating point opcodes */
5271 }
5275 }
5277 }
5284 else
5286 }
5292 }
5294 }
5305 /* This requires a double->single conversion */
5307 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
5308 }
5316 }
5324 }
5335 }
5346 }
5408 /* Based on gcc code */
5412 /* Positive case */
5417 /* Negative case */
5418 /* Save to the red zone */
5428 /* Restore */
5433 }
5458 }
5491 }
5506 }
5532 }
5585 /*
5586 * The two arguments are swapped because the fbranch instructions
5587 * depend on this for the non-sse case to work.
5588 */
5592 /*
5593 * FIXME: Get rid of this.
5594 * The two arguments are swapped because the fbranch instructions
5595 * depend on this for the non-sse case to work.
5596 */
5601 /* zeroing the register at the start results in
5602 * shorter and faster code (we can also remove the widening op)
5603 */
5622 }
5624 }
5627 /* zeroing the register at the start results in
5628 * shorter and faster code (we can also remove the widening op)
5629 */
5644 }
5646 }
5656 }
5659 /* zeroing the register at the start results in
5660 * shorter and faster code (we can also remove the widening op)
5661 */
5673 }
5675 }
5685 }
5716 }
5741 }
5748 }
5750 }
5776 }
5798 }
5800 }
5807 }
5809 /* Branch if C013 != 100 */
5810 /* branch if !ZF or (PF|CF) */
5827 /* skip branch if C1=1 */
5830 /* branch if (C0 | C3) = 1 */
5836 }
5839 /* Branch if C013 == 100 or 001 */
5842 /* skip branch if C1=1 */
5845 /* branch if (C0 | C3) = 1 */
5849 }
5851 /* Branch if C013 == 000 */
5855 /* Branch if C013=000 or 100 */
5858 /* skip branch if C1=1 */
5861 /* branch if C0=0 */
5865 }
5867 /* Branch if C013 != 001 */
5872 /* Transfer value to the fp stack */
5890 }
5894 }
5899 }
5911 /* dreg contains the old value, add with sreg2 value */
5918 }
5923 /* LOCK prefix is implied. */
5928 }
5931 guint32 size;
5935 else
5938 /*
5939 * See http://msdn.microsoft.com/en-us/magazine/cc302329.aspx for
5940 * an explanation of how this works.
5941 */
5952 }
5956 }
5960 }
5964 }
5968 }
5972 }
5976 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, ins->opcode == OP_ATOMIC_LOAD_U4 ? 4 : 8);
5978 }
5985 }
5987 }
5991 }
6019 }
6026 }
6032 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
6033 }
6038 }
6049 }
6055 gpointer card_table_mask;
6062 /*If either point to the stack we can simply avoid the WB. This happens due to
6063 * optimizations revealing a stack store that was not visible when op_cardtable was emited.
6064 */
6068 /*
6069 * We need one register we can clobber, we choose EDX and make sreg1
6070 * fixed EAX to work around limitations in the local register allocator.
6071 * sreg2 might get allocated to EDX, but that is not a problem since
6072 * we use it before clobbering EDX.
6073 */
6076 /*
6077 * This is the code we produce:
6078 *
6079 * edx = value
6080 * edx >>= nursery_shift
6081 * cmp edx, (nursery_start >> nursery_shift)
6082 * jne done
6083 * edx = ptr
6084 * edx >>= card_table_shift
6085 * edx += cardtable
6086 * [edx] = 1
6087 * done:
6088 */
6095 /*
6096 * The value we need to compare against is 64 bits, so we need
6097 * another spare register. We use RBX, which we save and
6098 * restore.
6099 */
6106 }
6108 }
6114 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GC_CARD_TABLE_ADDR, card_table);
6122 }
6123 #ifdef MONO_ARCH_SIMD_INTRINSICS
6124 /* TODO: Some of these IR opcodes are marked as no clobber when they indeed do. */
6514 /*TODO: This is appart of the sse spec but not added
6515 case OP_PSARQ:
6516 amd64_sse_psraq_reg_imm (code, ins->dreg, ins->inst_imm);
6517 break;
6518 case OP_PSARQ_REG:
6519 amd64_sse_psraq_reg_reg (code, ins->dreg, ins->sreg2);
6520 break;
6521 */
6566 }
6577 /*amd64_movd_reg_xreg_size (code, ins->dreg, ins->sreg1, 4);
6578 if (ins->inst_c0)
6579 amd64_shift_reg_imm_size (code, X86_SHR, ins->dreg, 16, 4);*/
6586 else
6596 /*sreg1 is the extracted ireg (scratch)
6597 /sreg2 is the to be inserted ireg (scratch)
6598 /dreg is the xreg to receive the value*/
6600 /*clear the bits from the extracted word*/
6602 /*shift the value to insert if needed*/
6605 /*join them together*/
6618 else
6627 else
6634 else
6642 else
6650 else
6654 }
6659 else
6683 /*FIXME the peephole pass should have killed this*/
6718 }
6740 }
6750 #endif
6753 printf ("R%d START=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6756 }
6759 printf ("R%d END=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6762 }
6771 }
6788 amd64_mov_membase_reg (code, ins->sreg1, MONO_STRUCT_OFFSET (MonoContext, gregs) + i * sizeof (target_mgreg_t), i, sizeof (target_mgreg_t));
6793 }
6799 }
6800 }
6803 }
6807 G_BEGIN_DECLS
6810 G_END_DECLS
6812 void
6814 {
6815 /* The signature doesn't matter */
6816 mono_register_jit_icall (mono_amd64_throw_exception, "mono_amd64_throw_exception", mono_create_icall_signature ("void"), TRUE);
6818 #if defined(TARGET_WIN32) || defined(HOST_WIN32)
6819 #if _MSC_VER
6821 #else
6823 #endif
6824 #endif
6825 }
6827 void
6828 mono_arch_patch_code_new (MonoCompile *cfg, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gpointer target)
6829 {
6832 /*
6833 * Debug code to help track down problems where the target of a near call is
6834 * is not valid.
6835 */
6851 }
6852 }
6853 }
6856 }
6858 #ifndef DISABLE_JIT
6860 static int
6862 {
6871 }
6873 /*
6874 * This macro is used for testing whenever the unwinder works correctly at every point
6875 * where an async exception can happen.
6876 */
6877 /* This will generate a SIGSEGV at the given point in the code */
6878 #define async_exc_point(code) do { \
6879 if (mono_inject_async_exc_method && mono_method_desc_full_match (mono_inject_async_exc_method, cfg->method)) { \
6880 if (cfg->arch.async_point_count == mono_inject_async_exc_pos) \
6881 amd64_mov_reg_mem (code, AMD64_RAX, 0, 4); \
6882 cfg->arch.async_point_count ++; \
6883 } \
6884 } while (0)
6886 #ifdef TARGET_WIN32
6888 emit_prolog_setup_sp_win64 (MonoCompile *cfg, guint8 *code, int alloc_size, int *cfa_offset_input)
6889 {
6892 /* Allocate windows stack frame using stack probing method */
6898 }
6905 }
6907 // NOTE, in a standard win64 prolog the alloc unwind info is always emitted, but since mono
6908 // uses a frame pointer with negative offsets and a standard win64 prolog assumes positive offsets, we can't
6909 // emit sp alloc unwind metadata since the native OS unwinder will incorrectly restore sp. Excluding the alloc
6910 // metadata on the other hand won't give the OS the information so it can just restore the frame pointer to sp and
6911 // that will retrieve the expected results.
6914 }
6919 }
6922 guint8 *
6924 {
6939 /* Amount of stack space allocated by register saving code */
6942 /* Offset between RSP and the CFA */
6945 /*
6946 * The prolog consists of the following parts:
6947 * FP present:
6948 * - push rbp
6949 * - mov rbp, rsp
6950 * - save callee saved regs using moves
6951 * - allocate frame
6952 * - save rgctx if needed
6953 * - save lmf if needed
6954 * FP not present:
6955 * - allocate frame
6956 * - save rgctx if needed
6957 * - save lmf if needed
6958 * - save callee saved regs using moves
6959 */
6961 // CFA = sp + 8
6964 // IP saved at CFA - 8
6975 /* These are handled automatically by the stack marking code */
6982 }
6984 /* The param area is always at offset 0 from sp */
6985 /* This needs to be allocated here, since it has to come after the spill area */
6988 // FIXME:
6991 }
6994 /*
6995 * On enter, the stack is misaligned by the pushing of the return
6996 * address. It is either made aligned by the pushing of %rbp, or by
6997 * this.
6998 */
7002 /* Mark the padding slot as NOREF */
7004 }
7008 /* Mark the padding slot as NOREF */
7010 }
7013 }
7019 /* Allocate stack frame */
7020 #ifdef TARGET_WIN32
7022 #else
7024 /* See mono_emit_stack_alloc */
7025 #if defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
7028 /* Use a loop for large sizes */
7042 }
7046 }
7048 guint32 required_code_size = ((remaining_size / 0x1000) + 1) * 11; /*11 is the max size of amd64_alu_reg_imm + amd64_test_membase_reg*/
7056 }
7061 }
7068 }
7069 }
7070 #else
7076 }
7077 #endif
7078 }
7079 #endif
7081 /* Stack alignment check */
7082 #if 0
7083 {
7093 }
7094 #endif
7097 /* Fill the stack frame with a dummy value to force deterministic behavior */
7099 /* Save registers to the red zone */
7105 MONO_RESTORE_WARNING
7116 }
7118 /* Save LMF */
7122 /* Save callee saved registers */
7125 /* Save caller saved registers after sp is adjusted */
7126 /* The registers are saved at the bottom of the frame */
7127 /* FIXME: Optimize this so the regs are saved at the end of the frame in increasing order */
7129 /* The registers are saved just below the saved rbp */
7131 }
7139 /* These are handled automatically by the stack marking code */
7143 // FIXME: GC
7144 }
7148 }
7149 }
7151 /* store runtime generic context */
7156 amd64_mov_membase_reg (code, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, sizeof(gpointer));
7158 mono_add_var_location (cfg, cfg->rgctx_var, TRUE, MONO_ARCH_RGCTX_REG, 0, 0, code - cfg->native_code);
7159 mono_add_var_location (cfg, cfg->rgctx_var, FALSE, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, code - cfg->native_code, 0);
7160 }
7162 /* compute max_length in order to use short forward jumps */
7169 /* max alignment for loops */
7175 }
7177 /* Take prolog and epilog instrumentation into account */
7182 }
7183 }
7191 /* Save volatile arguments to the stack */
7193 amd64_mov_membase_reg (code, cfg->vret_addr->inst_basereg, cfg->vret_addr->inst_offset, cinfo->ret.reg, 8);
7194 }
7196 /* Keep this in sync with emit_load_volatile_arguments */
7203 /* Unused arguments */
7206 /* Save volatile arguments to the stack */
7212 /* FIXME: I1 etc */
7213 /*
7214 if (stack_offset & 0x1)
7215 size = 1;
7216 else if (stack_offset & 0x2)
7217 size = 2;
7218 else if (stack_offset & 0x4)
7219 size = 4;
7220 else
7221 size = 8;
7222 */
7225 /*
7226 * Save the original location of 'this',
7227 * get_generic_info_from_stack_frame () needs this to properly look up
7228 * the argument value during the handling of async exceptions.
7229 */
7232 mono_add_var_location (cfg, ins, FALSE, ins->inst_basereg, ins->inst_offset, code - cfg->native_code, 0);
7233 }
7235 }
7246 amd64_mov_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof (target_mgreg_t)), ainfo->pair_regs [quad], sizeof (target_mgreg_t));
7249 amd64_movss_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof (target_mgreg_t)), ainfo->pair_regs [quad]);
7252 amd64_movsd_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof (target_mgreg_t)), ainfo->pair_regs [quad]);
7258 }
7259 }
7263 amd64_mov_membase_reg (code, ins->inst_left->inst_basereg, ins->inst_left->inst_offset, ainfo->pair_regs [0], sizeof (target_mgreg_t));
7272 }
7274 /* Argument allocated to (non-volatile) register */
7284 }
7289 }
7290 }
7291 }
7296 /*
7297 * Optimize the common case of the first bblock making a call with the same
7298 * arguments as the method. This works because the arguments are still in their
7299 * original argument registers.
7300 * FIXME: Generalize this
7301 */
7311 }
7324 if (((next->opcode == OP_LOAD_MEMBASE) || (next->opcode == OP_LOADI4_MEMBASE)) && next->inst_basereg == ins->inst_basereg && next->inst_offset == ins->inst_offset) {
7331 /* Only continue if the instruction doesn't change argument regs */
7334 }
7335 }
7337 }
7340 }
7342 /* Argument allocated to (non-volatile) register */
7348 }
7352 }
7353 }
7357 //next = mono_inst_list_next (&next->node, &first_bb->ins_list);
7360 }
7361 }
7362 }
7367 /* Initialize seq_point_info_var */
7369 /* Initialize the variable from a GOT slot */
7370 /* Same as OP_AOTCONST */
7371 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_SEQ_POINT_INFO, cfg->method);
7375 }
7378 /* Initialize ss_tramp_var */
7383 amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, MONO_STRUCT_OFFSET (SeqPointInfo, ss_tramp_addr), 8);
7386 /* Initialize ss_tramp_var */
7393 /* Initialize bp_tramp_var */
7399 }
7400 }
7405 }
7407 void
7409 {
7424 /* Mark the start of the epilog */
7427 /* Save the uwind state which is needed by the out-of-line code */
7430 /* the code restoring the registers must be kept in sync with OP_TAILCALL */
7434 amd64_mov_reg_membase (code, AMD64_RBP, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), 8);
7436 /*
7437 * emit_setup_lmf () marks RBP as saved, we have to mark it as same value here before clearing up the stack
7438 * since its stack slot will become invalid.
7439 */
7441 }
7443 /* Restore callee saved regs */
7446 /* Restore only used_int_regs, not arch.saved_iregs */
7447 #if defined(MONO_SUPPORT_TASKLETS)
7449 #else
7451 #endif
7456 }
7458 }
7459 }
7461 /* Load returned vtypes into registers if needed */
7470 amd64_mov_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof (target_mgreg_t)), ainfo->pair_size [quad]);
7473 amd64_movss_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof (target_mgreg_t)));
7476 amd64_movsd_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof (target_mgreg_t)));
7482 }
7483 }
7484 }
7489 }
7491 #ifdef TARGET_WIN32
7495 #else
7498 #endif
7499 }
7504 /* Restore the unwind state to be the same as before the epilog */
7508 }
7510 void
7512 {
7520 /* Compute needed space */
7530 }
7534 /* add code to raise exceptions */
7541 guint32 throw_ip;
7548 //x86_breakpoint (code);
7549 /* Find a throw sequence for the same exception class */
7557 }
7566 }
7567 amd64_mov_reg_imm (code, AMD64_ARG_REG1, m_class_get_type_token (exc_class) - MONO_TOKEN_TYPE_DEF);
7571 code = emit_call_body (cfg, code, MONO_PATCH_INFO_JIT_ICALL, "mono_arch_throw_corlib_exception");
7579 nthrows ++;
7580 }
7581 }
7583 }
7585 /* do nothing */
7587 }
7589 }
7591 /* Handle relocations with RIP relative addressing */
7600 guint32 target_pos;
7602 /* The SSE opcodes require a 16 byte alignment */
7609 }
7613 }
7621 }
7627 }
7634 /*loading is faster against aligned addresses.*/
7640 /*alu_op [rex] modr/m imm32 - 7 or 8 bytes */
7643 else
7651 }
7654 }
7663 ;
7665 }
7666 }
7668 }
7671 }
7675 MONO_NEVER_INLINE
7676 void
7678 {
7679 /* call/ret required (or likely other control transfer) */
7680 }
7682 void
7684 {
7685 }
7687 gboolean
7689 {
7691 }
7693 /*
7694 * Determine whenever the trap whose info is in SIGINFO is caused by
7695 * integer overflow.
7696 */
7697 gboolean
7699 {
7700 MonoContext ctx;
7703 gint64 value;
7711 rip ++;
7712 }
7713 else
7716 if ((rip [0] == 0xf7) && (x86_modrm_mod (rip [1]) == 0x3) && (x86_modrm_reg (rip [1]) == 0x7)) {
7717 /* idiv REG */
7724 }
7727 }
7729 guint32
7731 {
7733 }
7735 /**
7736 * \return TRUE if no sw breakpoint was present.
7737 *
7738 * Copy \p size bytes from \p code - \p offset to the buffer \p buf. If the debugger inserted software
7739 * breakpoints in the original code, they are removed in the copy.
7740 */
7741 gboolean
7742 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
7743 {
7744 /*
7745 * If method_start is non-NULL we need to perform bound checks, since we access memory
7746 * at code - offset we could go before the start of the method and end up in a different
7747 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
7748 * instead.
7749 */
7756 }
7758 }
7760 int
7762 {
7764 }
7766 gpointer
7768 {
7770 }
7772 #define MAX_ARCH_DELEGATE_PARAMS 10
7774 static gpointer
7776 {
7784 start = code = (guint8 *)mono_global_codeman_reserve (64 + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7786 /* Replace the this argument with the target */
7788 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7792 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
7794 start = code = (guint8 *)mono_global_codeman_reserve (64 + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7799 /* We have to shift the arguments left */
7802 #ifdef TARGET_WIN32
7805 else
7807 #else
7809 #endif
7810 }
7813 }
7815 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
7816 }
7821 *info = mono_tramp_info_create ("delegate_invoke_impl_has_target", start, code - start, NULL, unwind_ops);
7826 }
7832 else
7837 }
7838 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL));
7841 }
7843 #define MAX_VIRTUAL_DELEGATE_OFFSET 32
7845 static gpointer
7847 {
7856 start = code = (guint8 *)mono_global_codeman_reserve (size + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7860 /* Replace the this argument with the target */
7862 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7865 /* Load the IMT reg */
7866 amd64_mov_reg_membase (code, MONO_ARCH_IMT_REG, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, method), 8);
7867 }
7869 /* Load the vtable */
7870 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_ARG_REG1, MONO_STRUCT_OFFSET (MonoObject, vtable), 8);
7872 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL));
7879 }
7881 /*
7882 * mono_arch_get_delegate_invoke_impls:
7883 *
7884 * Return a list of MonoTrampInfo structures for the delegate invoke impl
7885 * trampolines.
7886 */
7887 GSList*
7889 {
7900 }
7905 }
7912 }
7915 }
7917 gpointer
7919 {
7926 /* FIXME: Support more cases */
7942 }
7967 }
7972 }
7975 }
7977 gpointer
7978 mono_arch_get_delegate_virtual_invoke_impl (MonoMethodSignature *sig, MonoMethod *method, int offset, gboolean load_imt_reg)
7979 {
7981 gpointer code;
7987 }
7989 void
7991 {
7992 #if !defined(HOST_WIN32) && defined(MONO_XEN_OPT)
7994 #endif
7995 }
7997 void
7999 {
8000 }
8002 #define CMP_SIZE (6 + 1)
8003 #define CMP_REG_REG_SIZE (4 + 1)
8004 #define BR_SMALL_SIZE 2
8005 #define BR_LARGE_SIZE 6
8006 #define MOV_REG_IMM_SIZE 10
8007 #define MOV_REG_IMM_32BIT_SIZE 6
8008 #define JUMP_REG_SIZE (2 + 1)
8010 static int
8012 {
8017 }
8019 /*
8020 * LOCKING: called with the domain lock held
8021 */
8022 gpointer
8023 mono_arch_build_imt_trampoline (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
8024 gpointer fail_tramp)
8025 {
8039 else
8041 }
8047 else
8049 }
8058 else
8061 /* with assert below:
8062 * item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
8063 */
8064 }
8065 }
8069 else
8073 }
8075 }
8077 code = (guint8 *)mono_method_alloc_generic_virtual_trampoline (domain, size + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
8078 else
8093 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8097 }
8098 }
8105 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8107 }
8114 }
8116 /* enable the commented code to assert on wrong method */
8117 #if 0
8119 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8123 }
8126 /* See the comment below about R10 */
8127 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8132 #else
8133 /* We're using R10 (MONO_ARCH_IMT_SCRATCH_REG) here because R11 (MONO_ARCH_IMT_REG)
8134 needs to be preserved. R10 needs
8135 to be preserved for calls which
8136 require a runtime generic context,
8137 but interface calls don't. */
8138 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8140 #endif
8141 }
8144 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof (target_mgreg_t));
8148 }
8152 else
8154 }
8156 }
8157 /* patch the branches to get to the target items */
8163 }
8164 }
8165 }
8170 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
8172 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_IMT_TRAMPOLINE, NULL));
8174 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
8177 }
8179 MonoMethod*
8181 {
8183 }
8185 MonoVTable*
8187 {
8189 }
8191 GSList*
8193 {
8200 }
8202 #ifndef DISABLE_JIT
8204 MonoInst*
8205 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
8206 {
8219 }
8227 }
8249 }
8250 }
8259 }
8261 #if 0
8262 /* OP_FREM is not IEEE compatible */
8267 }
8268 #endif
8270 if (!cfg->compile_aot && (mono_arch_cpu_enumerate_simd_versions () & SIMD_VERSION_SSE41) && fsig->param_count == 1 && fsig->params [0]->type == MONO_TYPE_R8) {
8286 }
8287 }
8288 }
8291 }
8292 #endif
8294 host_mgreg_t
8296 {
8298 }
8300 void
8302 {
8304 }
8306 /*
8307 * mono_arch_emit_load_aotconst:
8308 *
8309 * Emit code to load the contents of the GOT slot identified by TRAMP_TYPE and
8310 * TARGET from the mscorlib GOT in full-aot code.
8311 * On AMD64, the result is placed into R11.
8312 */
8313 guint8*
8314 mono_arch_emit_load_aotconst (guint8 *start, guint8 *code, MonoJumpInfo **ji, MonoJumpInfoType tramp_type, gconstpointer target)
8315 {
8320 }
8322 /*
8323 * mono_arch_get_trampolines:
8324 *
8325 * Return a list of MonoTrampInfo structures describing arch specific trampolines
8326 * for AOT.
8327 */
8328 GSList *
8330 {
8332 }
8334 /* Soft Debug support */
8335 #ifdef MONO_ARCH_SOFT_DEBUG_SUPPORTED
8337 /*
8338 * mono_arch_set_breakpoint:
8339 *
8340 * Set a breakpoint at the native code corresponding to JI at NATIVE_OFFSET.
8341 * The location should contain code emitted by OP_SEQ_POINT.
8342 */
8343 void
8345 {
8350 SeqPointInfo *info = mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8355 /* ip points to a mov r11, 0 */
8359 }
8360 }
8362 /*
8363 * mono_arch_clear_breakpoint:
8364 *
8365 * Clear the breakpoint at IP.
8366 */
8367 void
8369 {
8374 SeqPointInfo *info = mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8379 }
8380 }
8382 gboolean
8384 {
8385 /* We use soft breakpoints on amd64 */
8387 }
8389 /*
8390 * mono_arch_skip_breakpoint:
8391 *
8392 * Modify CTX so the ip is placed after the breakpoint instruction, so when
8393 * we resume, the instruction is not executed again.
8394 */
8395 void
8397 {
8399 }
8401 /*
8402 * mono_arch_start_single_stepping:
8403 *
8404 * Start single stepping.
8405 */
8406 void
8408 {
8410 }
8412 /*
8413 * mono_arch_stop_single_stepping:
8414 *
8415 * Stop single stepping.
8416 */
8417 void
8419 {
8421 }
8423 /*
8424 * mono_arch_is_single_step_event:
8425 *
8426 * Return whenever the machine state in SIGCTX corresponds to a single
8427 * step event.
8428 */
8429 gboolean
8431 {
8432 /* We use soft breakpoints on amd64 */
8434 }
8436 /*
8437 * mono_arch_skip_single_step:
8438 *
8439 * Modify CTX so the ip is placed after the single step trigger instruction,
8440 * we resume, the instruction is not executed again.
8441 */
8442 void
8444 {
8446 }
8448 /*
8449 * mono_arch_create_seq_point_info:
8450 *
8451 * Return a pointer to a data structure which is used by the sequence
8452 * point implementation in AOTed code.
8453 */
8454 SeqPointInfo*
8456 {
8460 // FIXME: Add a free function
8464 code);
8471 // FIXME: Optimize the size
8472 info = (SeqPointInfo *)g_malloc0 (sizeof (SeqPointInfo) + (ji->code_size * sizeof (gpointer)));
8480 }
8483 }
8485 #endif
8487 gboolean
8489 {
8520 }
8521 }
8523 CallInfo*
8525 {
8527 }