3 * Copyright 2011 Xamarin Inc
4 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
7 #ifndef __MONO_MINI_ARM_H__
8 #define __MONO_MINI_ARM_H__
10 #include <mono/arch/arm/arm-codegen.h>
11 #include <mono/utils/mono-context.h>
14 #if defined(ARM_FPU_NONE)
15 #define MONO_ARCH_SOFT_FLOAT_FALLBACK 1
18 #if defined(__ARM_EABI__)
19 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
20 #define ARM_ARCHITECTURE "armel"
22 #define ARM_ARCHITECTURE "armeb"
25 #define ARM_ARCHITECTURE "arm"
28 #if defined(ARM_FPU_VFP)
29 #define ARM_FP_MODEL "vfp"
30 #elif defined(ARM_FPU_NONE)
31 #define ARM_FP_MODEL "vfp+fallback"
32 #elif defined(ARM_FPU_VFP_HARD)
33 #define ARM_FP_MODEL "vfp+hard"
35 #error "At least one of ARM_FPU_NONE, ARM_FPU_VFP or ARM_FPU_VFP_HARD must be defined."
38 #define MONO_ARCH_ARCHITECTURE ARM_ARCHITECTURE "," ARM_FP_MODEL
40 #define MONO_ARCH_CPU_SPEC mono_arm_cpu_desc
42 #if G_BYTE_ORDER == G_LITTLE_ENDIAN
43 #define ARM_LSW_REG ARMREG_R0
44 #define ARM_MSW_REG ARMREG_R1
46 #define ARM_LSW_REG ARMREG_R1
47 #define ARM_MSW_REG ARMREG_R0
50 #define MONO_MAX_IREGS 16
52 #define MONO_SAVED_GREGS 10 /* r4-r11, ip, lr */
54 /* r4-r11, ip, lr: registers saved in the LMF */
55 #define MONO_ARM_REGSAVE_MASK 0x5ff0
56 #define MONO_ARM_FIRST_SAVED_REG ARMREG_R4
57 #define MONO_ARM_NUM_SAVED_REGS 10
59 /* Parameters used by the register allocator */
61 #define MONO_ARCH_CALLEE_REGS ((1<<ARMREG_R0) | (1<<ARMREG_R1) | (1<<ARMREG_R2) | (1<<ARMREG_R3) | (1<<ARMREG_IP))
62 #define MONO_ARCH_CALLEE_SAVED_REGS ((1<<ARMREG_V1) | (1<<ARMREG_V2) | (1<<ARMREG_V3) | (1<<ARMREG_V4) | (1<<ARMREG_V5) | (1<<ARMREG_V6) | (1<<ARMREG_V7))
65 * TODO: Make use of VFP v3 registers d16-d31.
69 * TODO: We can't use registers d8-d15 in hard float mode because the
70 * register allocator doesn't allocate floating point registers globally.
73 #if defined(ARM_FPU_VFP_HARD)
74 #define MONO_SAVED_FREGS 16
75 #define MONO_MAX_FREGS 32
78 * d8-d15 must be preserved across function calls. We use d14-d15 as
79 * scratch registers in the JIT. The rest have no meaning tied to them.
81 #define MONO_ARCH_CALLEE_FREGS 0x00005555
82 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x55550000
84 #define MONO_SAVED_FREGS 8
85 #define MONO_MAX_FREGS 16
88 * No registers need to be preserved across function calls. We use d0-d1
89 * as scratch registers in the JIT. The rest have no meaning tied to them.
91 #define MONO_ARCH_CALLEE_FREGS 0x55555550
92 #define MONO_ARCH_CALLEE_SAVED_FREGS 0x00000000
95 #define MONO_ARCH_USE_FPSTACK FALSE
97 #define MONO_ARCH_INST_SREG2_MASK(ins) (0)
99 #define MONO_ARCH_INST_FIXED_REG(desc) \
100 (mono_arch_is_soft_float () ? \
101 ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1) : \
102 ((desc) == 'l' ? ARM_LSW_REG : (desc) == 'a' ? ARMREG_R0 : -1))
104 #define MONO_ARCH_INST_IS_REGPAIR(desc) \
105 (mono_arch_is_soft_float () ? \
106 ((desc) == 'l' || (desc) == 'L' || (desc) == 'f' || (desc) == 'g') : \
107 ((desc) == 'l' || (desc) == 'L'))
109 #define MONO_ARCH_INST_IS_FLOAT(desc) \
110 (mono_arch_is_soft_float () ? \
112 ((desc) == 'f' || (desc) == 'g'))
114 #define MONO_ARCH_INST_REGPAIR_REG2(desc,hreg1) ((desc) == 'l' || (desc) == 'f' || (desc) == 'g' ? ARM_MSW_REG : -1)
116 #ifdef TARGET_WATCHOS
117 #define MONO_ARCH_FRAME_ALIGNMENT 16
119 #define MONO_ARCH_FRAME_ALIGNMENT 8
122 /* fixme: align to 16byte instead of 32byte (we align to 32byte to get
123 * reproduceable results for benchmarks */
124 #define MONO_ARCH_CODE_ALIGNMENT 32
126 /* This needs to hold both a 32 bit int and a 64 bit double */
127 #define mono_unwind_reg_t guint64
129 /* Argument marshallings for calls between gsharedvt and normal code */
131 GSHAREDVT_ARG_NONE
= 0,
132 GSHAREDVT_ARG_BYVAL_TO_BYREF
= 1,
133 GSHAREDVT_ARG_BYREF_TO_BYVAL
= 2,
134 GSHAREDVT_ARG_BYREF_TO_BYVAL_I1
= 3,
135 GSHAREDVT_ARG_BYREF_TO_BYVAL_I2
= 4,
136 GSHAREDVT_ARG_BYREF_TO_BYVAL_U1
= 5,
137 GSHAREDVT_ARG_BYREF_TO_BYVAL_U2
= 6
138 } GSharedVtArgMarshal
;
140 /* Return value marshalling for calls between gsharedvt and normal code */
142 GSHAREDVT_RET_NONE
= 0,
143 GSHAREDVT_RET_IREG
= 1,
144 GSHAREDVT_RET_IREGS
= 2,
145 GSHAREDVT_RET_I1
= 3,
146 GSHAREDVT_RET_U1
= 4,
147 GSHAREDVT_RET_I2
= 5,
148 GSHAREDVT_RET_U2
= 6,
149 GSHAREDVT_RET_VFP_R4
= 7,
150 GSHAREDVT_RET_VFP_R8
= 8
151 } GSharedVtRetMarshal
;
154 /* Method address to call */
156 /* The trampoline reads this, so keep the size explicit */
158 /* If ret_marshal != NONE, this is the reg of the vret arg, else -1 */
160 /* The stack slot where the return value will be stored */
162 int stack_usage
, map_count
;
163 /* If not -1, then make a virtual call using this vtable offset */
165 /* If 1, make an indirect call to the address in the rgctx reg */
167 /* Whenever this is a in or an out call */
169 /* Whenever this call uses fp registers */
171 gpointer caller_cinfo
, callee_cinfo
;
172 /* Maps stack slots/registers in the caller to the stack slots/registers in the callee */
173 /* A negative value means a register, i.e. -1=r0, -2=r1 etc. */
174 int map
[MONO_ZERO_LEN_ARRAY
];
180 /* Passed/returned in an ireg */
182 /* Passed/returned in a pair of iregs */
184 /* Passed on the stack */
186 /* First word in r3, second word on the stack */
188 /* FP value passed in either an ireg or a vfp reg */
190 /* Struct passed/returned in gregs */
193 RegTypeStructByAddrOnStack
,
194 /* gsharedvt argument passed by addr in greg */
195 RegTypeGSharedVtInReg
,
196 /* gsharedvt argument passed by addr on stack */
197 RegTypeGSharedVtOnStack
,
203 guint16 vtsize
; /* in param area */
206 /* RegTypeHFA/RegTypeStructByVal */
210 /* RegTypeStructByVal */
211 gint32 struct_size
, align
;
212 guint8 size
: 4; /* 1, 2, 4, 8, or regs used by RegTypeStructByVal */
218 /* The index of the vret arg in the argument list for RegTypeStructByAddr */
226 #define FP_PARAM_REGS 8
229 /* General registers */
230 mgreg_t gregs
[PARAM_REGS
];
231 /* Floating registers */
232 float fregs
[FP_PARAM_REGS
* 2];
233 /* Stack usage, used for passing params on stack */
238 /* Structure used by the sequence points in AOTed code */
240 gpointer ss_trigger_page
;
241 gpointer bp_trigger_page
;
242 gpointer ss_tramp_addr
;
243 guint8
* bp_addrs
[MONO_ZERO_LEN_ARRAY
];
247 double fpregs
[FP_PARAM_REGS
];
252 /* This should come last as the structure is dynamically extended */
253 mgreg_t regs
[PARAM_REGS
];
256 void arm_patch (guchar
*code
, const guchar
*target
);
257 guint8
* mono_arm_emit_load_imm (guint8
*code
, int dreg
, guint32 val
);
258 int mono_arm_is_rotated_imm8 (guint32 val
, gint
*rot_amount
);
261 mono_arm_throw_exception_by_token (guint32 type_token
, mgreg_t pc
, mgreg_t sp
, mgreg_t
*int_regs
, gdouble
*fp_regs
);
264 mono_arm_start_gsharedvt_call (GSharedVtCallInfo
*info
, gpointer
*caller
, gpointer
*callee
, gpointer mrgctx_reg
, double *caller_fregs
, double *callee_fregs
);
267 MONO_ARM_FPU_NONE
= 0,
268 MONO_ARM_FPU_VFP
= 1,
269 MONO_ARM_FPU_VFP_HARD
= 2
272 /* keep the size of the structure a multiple of 8 */
275 * If the second lowest bit is set to 1, then this is a MonoLMFExt structure, and
276 * the other fields are not valid.
278 gpointer previous_lmf
;
280 /* This is only set in trampoline LMF frames */
285 /* Currently only used in trampolines on armhf to hold d0-d15. We don't really
286 * need to put d0-d7 in the LMF, but it simplifies the trampoline code.
289 /* all but sp and pc: matches the PUSH instruction layout in the trampolines
290 * 0-4 should be considered undefined (execpt in the magic tramp)
296 typedef struct MonoCompileArch
{
297 gpointer seq_point_info_var
, ss_trigger_page_var
;
298 gpointer seq_point_ss_method_var
;
299 gpointer seq_point_bp_method_var
;
300 gpointer vret_addr_loc
;
301 gboolean omit_fp
, omit_fp_computed
;
303 gpointer
*vfp_scratch_slots
[2];
304 int atomic_tmp_offset
;
309 #define MONO_ARCH_EMULATE_FCONV_TO_I8 1
310 #define MONO_ARCH_EMULATE_LCONV_TO_R8 1
311 #define MONO_ARCH_EMULATE_LCONV_TO_R4 1
312 #define MONO_ARCH_EMULATE_LCONV_TO_R8_UN 1
313 #define MONO_ARCH_EMULATE_FREM 1
314 #define MONO_ARCH_EMULATE_DIV 1
315 #define MONO_ARCH_EMULATE_CONV_R8_UN 1
316 #define MONO_ARCH_EMULATE_MUL_OVF 1
318 #define ARM_FIRST_ARG_REG 0
319 #define ARM_LAST_ARG_REG 3
321 #define MONO_ARCH_USE_SIGACTION 1
323 #if defined(HOST_WATCHOS)
324 #undef MONO_ARCH_USE_SIGACTION
327 #define MONO_ARCH_NEED_DIV_CHECK 1
329 #define MONO_ARCH_HAVE_GENERALIZED_IMT_TRAMPOLINE 1
331 #define MONO_ARCH_HAVE_FULL_AOT_TRAMPOLINES 1
332 #define MONO_ARCH_HAVE_DECOMPOSE_LONG_OPTS 1
334 #define MONO_ARCH_INTERPRETER_SUPPORTED 1
335 #define MONO_ARCH_AOT_SUPPORTED 1
336 #define MONO_ARCH_LLVM_SUPPORTED 1
338 #define MONO_ARCH_GSHARED_SUPPORTED 1
339 #define MONO_ARCH_DYN_CALL_SUPPORTED 1
340 #define MONO_ARCH_DYN_CALL_PARAM_AREA 0
342 #define MONO_ARCH_HAVE_OP_TAILCALL_MEMBASE 1
343 #define MONO_ARCH_HAVE_OP_TAILCALL_REG 1
345 #if !(defined(TARGET_ANDROID) && defined(MONO_CROSS_COMPILE))
346 #define MONO_ARCH_SOFT_DEBUG_SUPPORTED 1
349 #define MONO_ARCH_HAVE_EXCEPTIONS_INIT 1
350 #define MONO_ARCH_HAVE_GET_TRAMPOLINES 1
351 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1
352 #define MONO_ARCH_HAVE_SIGCTX_TO_MONOCTX 1
353 #define MONO_ARCH_GC_MAPS_SUPPORTED 1
354 #define MONO_ARCH_HAVE_SETUP_ASYNC_CALLBACK 1
355 #define MONO_ARCH_HAVE_CONTEXT_SET_INT_REG 1
356 #define MONO_ARCH_HAVE_SETUP_RESUME_FROM_SIGNAL_HANDLER_CTX 1
357 #define MONO_ARCH_GSHAREDVT_SUPPORTED 1
358 #define MONO_ARCH_HAVE_GENERAL_RGCTX_LAZY_FETCH_TRAMPOLINE 1
359 #define MONO_ARCH_HAVE_OPCODE_NEEDS_EMULATION 1
360 #define MONO_ARCH_HAVE_OBJC_GET_SELECTOR 1
361 #define MONO_ARCH_HAVE_SDB_TRAMPOLINES 1
362 #define MONO_ARCH_HAVE_PATCH_CODE_NEW 1
363 #define MONO_ARCH_HAVE_OP_GENERIC_CLASS_INIT 1
364 #define MONO_ARCH_FLOAT32_SUPPORTED 1
366 #define MONO_ARCH_HAVE_INTERP_ENTRY_TRAMPOLINE 1
367 #define MONO_ARCH_HAVE_FTNPTR_ARG_TRAMPOLINE 1
368 #define MONO_ARCH_HAVE_INTERP_PINVOKE_TRAMP 1
370 #if defined(TARGET_WATCHOS) || (defined(__linux__) && !defined(TARGET_ANDROID))
371 #define MONO_ARCH_DISABLE_HW_TRAPS 1
372 #define MONO_ARCH_HAVE_UNWIND_BACKTRACE 1
375 /* ARM doesn't have too many registers, so we have to use a callee saved one */
376 #define MONO_ARCH_RGCTX_REG ARMREG_V5
377 #define MONO_ARCH_IMT_REG MONO_ARCH_RGCTX_REG
378 /* First argument reg */
379 #define MONO_ARCH_VTABLE_REG ARMREG_R0
381 // Does the ABI have a volatile non-parameter register, so tailcall
382 // can pass context to generics or interfaces?
383 #define MONO_ARCH_HAVE_VOLATILE_NON_PARAM_REGISTER 0
385 #define MONO_CONTEXT_SET_LLVM_EXC_REG(ctx, exc) do { (ctx)->regs [0] = (gsize)exc; } while (0)
387 #define MONO_INIT_CONTEXT_FROM_FUNC(ctx,func) do { \
388 MONO_CONTEXT_SET_BP ((ctx), __builtin_frame_address (0)); \
389 MONO_CONTEXT_SET_SP ((ctx), __builtin_frame_address (0)); \
390 MONO_CONTEXT_SET_IP ((ctx), (func)); \
393 #define MONO_ARCH_INIT_TOP_LMF_ENTRY(lmf)
396 mono_arm_throw_exception (MonoObject
*exc
, mgreg_t pc
, mgreg_t sp
, mgreg_t
*int_regs
, gdouble
*fp_regs
);
399 mono_arm_throw_exception_by_token (guint32 type_token
, mgreg_t pc
, mgreg_t sp
, mgreg_t
*int_regs
, gdouble
*fp_regs
);
402 mono_arm_resume_unwind (guint32 dummy1
, mgreg_t pc
, mgreg_t sp
, mgreg_t
*int_regs
, gdouble
*fp_regs
);
405 mono_arm_thumb_supported (void);
408 mono_arm_eabi_supported (void);
411 mono_arm_i8_align (void);
414 mono_arm_get_exception_trampolines (gboolean aot
);
417 mono_arm_get_thumb_plt_entry (guint8
*code
);
420 mono_arm_patchable_b (guint8
*code
, int cond
);
423 mono_arm_patchable_bl (guint8
*code
, int cond
);
426 mono_arm_is_hard_float (void);
429 mono_arm_unaligned_stack (MonoMethod
*method
);
431 /* MonoJumpInfo **ji */
433 mono_arm_emit_aotconst (gpointer ji
, guint8
*code
, guint8
*buf
, int dreg
, int patch_type
, gconstpointer data
);
436 mono_arch_get_call_info (MonoMemPool
*mp
, MonoMethodSignature
*sig
);
438 #endif /* __MONO_MINI_ARM_H__ */