| blob | b9093c31c754baffd2002b29da8504fee3c4ca14 |
1 /*
2 * mini-amd64.c: AMD64 backend for the Mono code generator
3 *
4 * Based on mini-x86.c.
5 *
6 * Authors:
7 * Paolo Molaro (lupus@ximian.com)
8 * Dietmar Maurer (dietmar@ximian.com)
9 * Patrik Torstensson
10 * Zoltan Varga (vargaz@gmail.com)
11 * Johan Lorensson (lateralusx.github@gmail.com)
12 *
13 * (C) 2003 Ximian, Inc.
14 * Copyright 2003-2011 Novell, Inc (http://www.novell.com)
15 * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
16 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
17 */
19 #include <string.h>
20 #include <math.h>
21 #ifdef HAVE_UNISTD_H
22 #include <unistd.h>
23 #endif
25 #include <mono/metadata/abi-details.h>
26 #include <mono/metadata/appdomain.h>
27 #include <mono/metadata/debug-helpers.h>
28 #include <mono/metadata/threads.h>
29 #include <mono/metadata/profiler-private.h>
30 #include <mono/metadata/mono-debug.h>
31 #include <mono/metadata/gc-internals.h>
32 #include <mono/utils/mono-math.h>
33 #include <mono/utils/mono-mmap.h>
34 #include <mono/utils/mono-memory-model.h>
35 #include <mono/utils/mono-tls.h>
36 #include <mono/utils/mono-hwcap.h>
37 #include <mono/utils/mono-threads.h>
46 #ifdef MONO_XEN_OPT
48 #else
49 #define optimize_for_xen 0
50 #endif
52 #define ALIGN_TO(val,align) ((((guint64)val) + ((align) - 1)) & ~((align) - 1))
54 #define IS_IMM32(val) ((((guint64)val) >> 32) == 0)
56 #define IS_REX(inst) (((inst) >= 0x40) && ((inst) <= 0x4f))
58 #ifdef TARGET_WIN32
59 /* Under windows, the calling convention is never stdcall */
60 #define CALLCONV_IS_STDCALL(call_conv) (FALSE)
61 #else
62 #define CALLCONV_IS_STDCALL(call_conv) ((call_conv) == MONO_CALL_STDCALL)
63 #endif
65 /* This mutex protects architecture specific caches */
66 #define mono_mini_arch_lock() mono_os_mutex_lock (&mini_arch_mutex)
67 #define mono_mini_arch_unlock() mono_os_mutex_unlock (&mini_arch_mutex)
70 /* The single step trampoline */
73 /* The breakpoint trampoline */
76 /* Offset between fp and the first argument in the callee */
77 #define ARGS_OFFSET 16
78 #define GP_SCRATCH_REG AMD64_R11
80 /*
81 * AMD64 register usage:
82 * - callee saved registers are used for global register allocation
83 * - %r11 is used for materializing 64 bit constants in opcodes
84 * - the rest is used for local allocation
85 */
87 /*
88 * Floating point comparison results:
89 * ZF PF CF
90 * A > B 0 0 0
91 * A < B 0 0 1
92 * A = B 1 0 0
93 * A > B 0 0 0
94 * UNORDERED 1 1 1
95 */
99 {
117 }
119 }
124 };
129 };
133 {
136 else
138 }
142 {
145 else
147 }
149 static gboolean
151 {
152 #if 0
154 #else
156 #endif
157 }
161 {
162 /* Skip REX */
167 }
171 {
176 }
178 static void
180 {
183 /* Skip REX */
187 }
190 /* amd64_set_reg_template */
192 }
193 else if ((code [0] == 0x8b) && rex && x86_modrm_mod (code [1]) == 0 && x86_modrm_rm (code [1]) == 5) {
194 /* mov 0(%rip), %dreg */
196 }
198 /* call *<OFFSET>(%rip) */
200 }
202 /* call <DISP> */
206 }
207 else
209 }
211 void
213 {
215 }
217 #define DEBUG(a) if (cfg->verbose_level > 1) a
221 {
227 /* Since the same stack slot size is used for all arg */
228 /* types, it needs to be big enough to hold them all */
230 }
235 }
236 }
240 {
246 /* Since the same stack slot size is used for both float */
247 /* types, it needs to be big enough to hold them both */
249 }
251 /* A double register */
254 else
258 }
259 }
262 ARG_CLASS_NO_CLASS,
263 ARG_CLASS_MEMORY,
264 ARG_CLASS_INTEGER,
265 ARG_CLASS_SSE
268 static ArgumentClass
270 {
297 #ifdef TARGET_WIN32
299 #else
301 #endif
311 }
312 /* fall through */
320 }
322 }
325 }
327 /* Merge */
329 ;
336 else
340 }
347 /*
348 * collect_field_info_nested:
349 *
350 * Collect field info from KLASS recursively into FIELDS.
351 */
352 static void
353 collect_field_info_nested (MonoClass *klass, GArray *fields_array, int offset, gboolean pinvoke, gboolean unicode)
354 {
363 collect_field_info_nested (mono_class_from_mono_type (info->fields [i].field->type), fields_array, info->fields [i].offset, pinvoke, unicode);
365 guint32 align;
366 StructFieldInfo f;
374 /* This can happen with .pack directives eg. 'fixed' arrays */
376 /* Replicate the last field to fill out the remaining place, since the code in add_valuetype () needs type information */
381 }
385 }
388 }
389 }
390 }
392 gpointer iter;
400 collect_field_info_nested (mono_class_from_mono_type (field->type), fields_array, field->offset - sizeof (MonoObject), pinvoke, unicode);
403 StructFieldInfo f;
410 }
411 }
412 }
413 }
415 #ifdef TARGET_WIN32
417 /* Windows x64 ABI can pass/return value types in register of size 1,2,4,8 bytes. */
418 #define MONO_WIN64_VALUE_TYPE_FITS_REG(arg_size) (arg_size <= SIZEOF_REGISTER && (arg_size == 1 || arg_size == 2 || arg_size == 4 || arg_size == 8))
420 static gboolean
421 allocate_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, AMD64_Reg_No int_regs [], int int_reg_count, AMD64_XMM_Reg_No float_regs [], int float_reg_count, guint32 *current_int_reg, guint32 *current_float_reg)
422 {
425 assert (arg_info != NULL && int_regs != NULL && float_regs != NULL && current_int_reg != NULL && current_float_reg != NULL);
435 /* Pass parameter in integer register. */
441 /* Pass parameter in float register. */
442 arg_info->pair_storage [0] = (arg_size <= sizeof (gfloat)) ? ArgInFloatSSEReg : ArgInDoubleSSEReg;
446 }
451 }
454 }
457 allocate_parameter_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
458 {
459 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, param_regs, PARAM_REGS, float_param_regs, FLOAT_PARAM_REGS, current_int_reg, current_float_reg);
460 }
463 allocate_return_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
464 {
465 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, return_regs, RETURN_REGS, float_return_regs, FLOAT_RETURN_REGS, current_int_reg, current_float_reg);
466 }
468 static void
469 allocate_storage_for_valuetype_win64 (ArgInfo *arg_info, MonoType *type, gboolean is_return, ArgumentClass arg_class,
471 {
472 /* Windows x64 value type ABI.
473 *
474 * Parameters: https://msdn.microsoft.com/en-us/library/zthk2dkh.aspx
475 *
476 * Integer/Float types smaller than or equals to 8 bytes or porperly sized struct/union (1,2,4,8)
477 * Try pass in register using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8), if no more registers, pass on stack using ArgOnStack as storage and size of parameter(1,2,4,8).
478 * Integer/Float types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
479 * Try to pass pointer in register using ArgValuetypeAddrInIReg, if no more registers, pass pointer on stack using ArgValuetypeAddrOnStack as storage and parameter size of register (8 bytes).
480 *
481 * Return values: https://msdn.microsoft.com/en-us/library/7572ztz4.aspx.
482 *
483 * Integers/Float types smaller than or equal to 8 bytes
484 * Return in corresponding register RAX/XMM0 using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8).
485 * Properly sized struct/unions (1,2,4,8)
486 * Return in register RAX using ArgValuetypeInReg as storage and size of parameter(1,2,4,8).
487 * Types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
488 * Return pointer to allocated stack space (allocated by caller) using ArgValuetypeAddrInIReg as storage and parameter size.
489 */
491 assert (arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
495 /* Parameter cases. */
499 /* First, try to use registers for parameter. If type is struct it can only be passed by value in integer register. */
501 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
502 /* No more registers, fallback passing parameter on stack as value. */
503 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
505 /* Passing value directly on stack, so use size of value. */
511 }
513 /* Fallback to stack, try to pass address to parameter in register. Always use integer register to represent stack address. */
515 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
516 /* No more registers, fallback passing address to parameter on stack. */
517 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
519 /* Passing an address to value on stack, so use size of register as argument size. */
525 }
526 }
528 /* Return value cases. */
532 /* Return value fits into return registers. If type is struct it can only be returned by value in integer register. */
534 allocate_return_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
536 /* Only RAX/XMM0 should be used to return valuetype. */
537 assert ((arg_info->pair_regs[0] == AMD64_RAX && arg_info->pair_regs[1] == ArgNone) || (arg_info->pair_regs[0] == AMD64_XMM0 && arg_info->pair_regs[1] == ArgNone));
539 /* Return value doesn't fit into return register, return address to allocated stack space (allocated by caller and passed as input). */
541 allocate_return_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
543 /* Only RAX should be used to return valuetype address. */
549 }
550 }
551 }
553 static void
554 get_valuetype_size_win64 (MonoClass *klass, gboolean pinvoke, ArgInfo *arg_info, MonoType *type, ArgumentClass *arg_class, guint32 *arg_size)
555 {
559 assert (klass != NULL && arg_info != NULL && type != NULL && arg_class != NULL && arg_size != NULL);
562 /* Calculate argument class type and size of marshalled type. */
566 /* Calculate argument class type and size of managed type. */
568 }
570 /* Windows ABI only handle value types on stack or passed in integer register (if it fits register size). */
574 /* Value type has a size that doesn't seem to fit register according to ABI. Try to used full stack size of type. */
576 }
578 /*
579 * Standard C and C++ doesn't allow empty structs, empty structs will always have a size of 1 byte.
580 * GCC have an extension to allow empty structs, https://gcc.gnu.org/onlinedocs/gcc/Empty-Structures.html.
581 * This cause a little dilemma since runtime build using none GCC compiler will not be compatible with
582 * GCC build C libraries and the other way around. On platforms where empty structs has size of 1 byte
583 * it must be represented in call and cannot be dropped.
584 */
589 }
592 }
594 static void
597 {
600 ArgumentClass arg_class;
602 assert (signature != NULL && arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
607 /* Only drop value type if its not an empty struct as input that must be represented in call */
608 if ((arg_size == 0 && !arg_info->pass_empty_struct) || (arg_size == 0 && arg_info->pass_empty_struct && is_return)) {
612 /* Alocate storage for value type. */
613 allocate_storage_for_valuetype_win64 (arg_info, type, is_return, arg_class, arg_size, current_int_reg, current_float_reg, stack_size);
614 }
615 }
619 static void
621 gboolean is_return,
623 {
624 #ifdef TARGET_WIN32
626 #else
628 /* Keep track of the size used in each quad so we can */
629 /* use the right size when copying args/return vars. */
642 /* We pass and return vtypes of size 8 in a register */
645 }
647 /* If this struct can't be split up naturally into 8-byte */
648 /* chunks (registers), pass it on the stack. */
655 }
656 /*
657 * Collect field information recursively to be able to
658 * handle nested structures.
659 */
669 }
670 }
676 }
679 /* Allways pass in memory */
688 }
692 else
701 /* Always pass in 1 or 2 integer registers */
704 /* Only the simplest cases are supported */
708 }
710 /*
711 * Implement the algorithm from section 3.2.3 of the X86_64 ABI.
712 * The X87 and SSEUP stuff is left out since there are no such types in
713 * the CLR.
714 */
719 }
730 }
735 ArgumentClass class1;
739 else
743 /* Unaligned field */
744 NOT_IMPLEMENTED;
745 }
747 /* Skip fields in other quad */
753 /* How far into this quad this data extends.*/
754 /* (8 is size of quad) */
758 }
759 /* Empty structs have a nonzero size, causing this assert to be hit */
763 }
764 }
768 /* Post merger cleanup */
772 /* Allocate registers */
773 {
779 while (quadsize [1] != 0 && quadsize [1] != 1 && quadsize [1] != 2 && quadsize [1] != 4 && quadsize [1] != 8)
798 else
801 }
812 }
820 }
821 }
825 /* Revert possible register assignments */
832 else
838 }
839 }
841 }
843 /*
844 * get_call_info:
845 *
846 * Obtain information about a call according to the calling convention.
847 * For AMD64 System V, see the "System V ABI, x86-64 Architecture Processor Supplement
848 * Draft Version 0.23" document for more information.
849 * For AMD64 Windows, see "Overview of x64 Calling Conventions",
850 * https://msdn.microsoft.com/en-us/library/ms235286.aspx
851 */
854 {
864 else
873 #ifdef TARGET_WIN32
874 /* Reserve space where the callee can save the argument registers */
876 #endif
878 /* return value */
917 }
921 }
922 /* fall through */
930 }
940 }
943 /*
944 * To simplify get_this_arg_reg () and LLVM integration, emit the vret arg after
945 * the first argument, allowing 'this' to be always passed in the first arg reg.
946 * Also do this if the first argument is a reference type, since virtual calls
947 * are sometimes made using calli without sig->hasthis set, like in the delegate
948 * invoke wrappers.
949 */
951 if ((ret_storage == ArgValuetypeAddrInIReg || ret_storage == ArgGsharedvtVariableInReg) && !is_pinvoke && (sig->hasthis || (sig->param_count > 0 && MONO_TYPE_IS_REFERENCE (mini_get_underlying_type (sig->params [0]))))) {
957 }
962 /* this */
969 }
970 }
976 /* Emit the signature cookie just before the implicit arguments */
978 }
984 #ifdef TARGET_WIN32
985 /* The float param registers and other param registers must be the same index on Windows x64.*/
990 #endif
993 /* We allways pass the sig cookie on the stack for simplicity */
994 /*
995 * Prevent implicit arguments + the sig cookie from being passed
996 * in registers.
997 */
1001 /* Emit the signature cookie just before the implicit arguments */
1003 }
1034 }
1036 /* gsharedvt arguments are passed by ref */
1040 else
1043 }
1044 /* fall through */
1062 /* gsharedvt arguments are passed by ref */
1067 else
1072 }
1073 }
1075 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
1079 /* Emit the signature cookie just before the implicit arguments */
1081 }
1087 }
1089 /*
1090 * mono_arch_get_argument_info:
1091 * @csig: a method signature
1092 * @param_count: the number of parameters to consider
1093 * @arg_info: an array to store the result infos
1094 *
1095 * Gathers information on parameters such as size, alignment and
1096 * padding. arg_info should be large enought to hold param_count + 1 entries.
1097 *
1098 * Returns the size of the argument area on the stack.
1099 */
1100 int
1101 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
1102 {
1107 /* The arguments are saved to a stack area in mono_arch_instrument_prolog */
1110 }
1114 /* FIXME: */
1116 }
1121 }
1123 gboolean
1124 mono_arch_tail_call_supported (MonoCompile *cfg, MonoMethodSignature *caller_sig, MonoMethodSignature *callee_sig)
1125 {
1127 gboolean res;
1135 /* An address on the callee's stack is passed as the first argument */
1142 }
1144 /*
1145 * Initialize the cpu to execute managed code.
1146 */
1147 void
1149 {
1150 #ifndef _MSC_VER
1151 guint16 fpcw;
1153 /* spec compliance requires running with double precision */
1159 #else
1160 /* TODO: This is crashing on Win64 right now.
1161 * _control87 (_PC_53, MCW_PC);
1162 */
1163 #endif
1164 }
1166 /*
1167 * Initialize architecture specific code.
1168 */
1169 void
1171 {
1175 mono_aot_register_jit_icall ("mono_amd64_throw_corlib_exception", mono_amd64_throw_corlib_exception);
1178 mono_aot_register_jit_icall ("mono_amd64_handler_block_trampoline_helper", mono_amd64_handler_block_trampoline_helper);
1180 #if defined(MONO_ARCH_GSHAREDVT_SUPPORTED)
1181 mono_aot_register_jit_icall ("mono_amd64_start_gsharedvt_call", mono_amd64_start_gsharedvt_call);
1182 #endif
1186 }
1188 /*
1189 * Cleanup architecture specific code.
1190 */
1191 void
1193 {
1195 }
1197 /*
1198 * This function returns the optimizations supported on this cpu.
1199 */
1200 guint32
1202 {
1212 else
1216 }
1218 #ifdef TARGET_WIN32
1219 /* The current SIMD doesn't support the argument used by a LD_ADDR to be of type OP_VTARG_ADDR. */
1220 /* This will now be used for value types > 8 or of size 3,5,6,7 as dictated by windows x64 value type ABI. */
1221 /* Since OP_VTARG_ADDR needs to be resolved in mono_spill_global_vars and the SIMD implementation optimize */
1222 /* away the LD_ADDR in load_simd_vreg, that will cause an error in mono_spill_global_vars since incorrect opcode */
1223 /* will now have a reference to an argument that won't be fully decomposed. */
1225 #endif
1228 }
1230 /*
1231 * This function test for all SSE functions supported.
1232 *
1233 * Returns a bitmask corresponding to all supported versions.
1234 *
1235 */
1236 guint32
1238 {
1263 }
1265 #ifndef DISABLE_JIT
1267 GList *
1269 {
1277 /* unused vars */
1289 }
1290 }
1295 }
1297 /**
1298 * mono_arch_compute_omit_fp:
1299 *
1300 * Determine whenever the frame pointer can be eliminated.
1301 */
1302 static void
1304 {
1321 /*
1322 * FIXME: Remove some of the restrictions.
1323 */
1332 /*
1333 if (cfg->method->save_lmf)
1334 cfg->arch.omit_fp = FALSE;
1335 */
1350 if (ainfo->storage == ArgOnStack || ainfo->storage == ArgValuetypeAddrInIReg || ainfo->storage == ArgValuetypeAddrOnStack) {
1351 /*
1352 * The stack offset can only be determined when the frame
1353 * size is known.
1354 */
1356 }
1357 }
1365 }
1366 }
1368 GList *
1370 {
1378 /* We use the callee saved registers for global allocation */
1384 #ifdef TARGET_WIN32
1387 #endif
1390 }
1392 GList*
1394 {
1398 /* All XMM registers */
1403 }
1405 GList*
1407 {
1430 }
1433 }
1435 GList*
1437 {
1448 }
1451 }
1453 /*
1454 * mono_arch_regalloc_cost:
1455 *
1456 * Return the cost, in number of memory references, of the action of
1457 * allocating the variable VMV into a register during global register
1458 * allocation.
1459 */
1460 guint32
1462 {
1466 /* The register is already saved */
1467 /* substract 1 for the invisible store in the prolog */
1469 else
1470 /* push+pop */
1472 }
1474 /*
1475 * mono_arch_fill_argument_info:
1476 *
1477 * Populate cfg->args, cfg->ret and cfg->vret_addr with information about the arguments
1478 * of the method.
1479 */
1480 void
1482 {
1494 /*
1495 * Contrary to mono_arch_allocate_vars (), the information should describe
1496 * where the arguments are at the beginning of the method, not where they can be
1497 * accessed during the execution of the method. The later makes no sense for the
1498 * global register allocator, since a variable can be in more than one location.
1499 */
1516 }
1536 /* Dummy */
1541 }
1542 }
1543 }
1545 void
1547 {
1563 /*
1564 * We use the ABI calling conventions for managed code as well.
1565 * Exception: valuetypes are only sometimes passed or returned in registers.
1566 */
1568 /*
1569 * The stack looks like this:
1570 * <incoming arguments passed on the stack>
1571 * <return value>
1572 * <lmf/caller saved registers>
1573 * <locals>
1574 * <spill area>
1575 * <localloc area> -> grows dynamically
1576 * <params area>
1577 */
1584 /* Locals are allocated backwards from %fp */
1587 }
1591 /* Save all callee-saved registers normally (except RBP, if not already used), and restore them when unwinding through an LMF */
1594 }
1598 /* Reserve space for callee saved registers */
1602 }
1617 /* The register is volatile */
1626 }
1630 }
1633 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
1642 }
1646 }
1647 }
1649 /* Allocate locals */
1650 offsets = mono_allocate_stack_slots (cfg, cfg->arch.omit_fp ? FALSE: TRUE, &locals_stack_size, &locals_stack_align);
1653 mono_cfg_set_exception_invalid_program (cfg, g_strdup_printf ("Method %s stack is too big.", mname));
1656 }
1661 }
1668 }
1677 else
1679 //printf ("allocated local %d to ", i); mono_print_tree_nl (ins);
1680 }
1681 }
1688 }
1696 /* FIXME: Allocate volatile arguments to registers */
1700 /*
1701 * Under AMD64, all registers used to pass arguments to functions
1702 * are volatile across calls.
1703 * FIXME: Optimize this.
1704 */
1705 if ((ainfo->storage == ArgInIReg) || (ainfo->storage == ArgInFloatSSEReg) || (ainfo->storage == ArgInDoubleSSEReg) || (ainfo->storage == ArgValuetypeInReg) || (ainfo->storage == ArgGSharedVtInReg))
1718 }
1733 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
1742 }
1746 }
1752 }
1754 NOT_IMPLEMENTED;
1755 }
1757 if (!inreg && (ainfo->storage != ArgOnStack) && (ainfo->storage != ArgValuetypeAddrInIReg) && (ainfo->storage != ArgValuetypeAddrOnStack) && (ainfo->storage != ArgGSharedVtOnStack)) {
1760 /* These arguments are saved to the stack in the prolog */
1764 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (mgreg_t) : sizeof (mgreg_t);
1765 // Arguments are yet supported by the stack map creation code
1766 //cfg->locals_max_stack_offset = MAX (cfg->locals_max_stack_offset, offset);
1768 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (mgreg_t) : sizeof (mgreg_t);
1770 //cfg->locals_min_stack_offset = MIN (cfg->locals_min_stack_offset, offset);
1771 }
1772 }
1773 }
1774 }
1777 }
1779 void
1781 {
1796 if (cinfo->ret.storage == ArgValuetypeAddrInIReg || cinfo->ret.storage == ArgGsharedvtVariableInReg) {
1801 }
1802 }
1811 }
1819 }
1826 #if !defined(TARGET_WIN32)
1829 #endif
1830 }
1831 }
1833 static void
1834 add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, ArgStorage storage, int reg, MonoInst *tree)
1835 {
1865 }
1866 }
1868 static int
1870 {
1873 #if defined(__mono_ilp32__)
1875 #else
1877 #endif
1884 }
1887 }
1889 static void
1891 {
1896 NOT_IMPLEMENTED;
1900 /*
1901 * mono_ArgIterator_Setup assumes the signature cookie is
1902 * passed first and all the arguments which were before it are
1903 * passed on the stack after the signature. So compensate by
1904 * passing a different signature.
1905 */
1909 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1914 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORE_MEMBASE_REG, AMD64_RSP, cinfo->sig_cookie.offset, sig_reg);
1915 }
1917 #ifdef ENABLE_LLVM
1920 {
1932 }
1933 }
1935 LLVMCallInfo*
1937 {
1950 linfo = mono_mempool_alloc0 (cfg->mempool, sizeof (LLVMCallInfo) + (sizeof (LLVMArgInfo) * n));
1952 /*
1953 * LLVM always uses the native ABI while we use our own ABI, the
1954 * only difference is the handling of vtypes:
1955 * - we only pass/receive them in registers in some cases, and only
1956 * in 1 or 2 integer registers.
1957 */
1971 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
1972 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
1976 }
1982 }
1985 /* Vtype returned using a hidden argument */
1992 }
1999 else
2016 else
2021 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2022 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2026 }
2030 linfo->args [i].pair_storage [j] = arg_storage_to_llvm_arg_storage (cfg, ainfo->pair_storage [j]);
2040 }
2041 }
2044 }
2045 #endif
2047 void
2049 {
2065 /* We shouldn't be called in the llvm case */
2068 }
2070 /*
2071 * Emit all arguments which are passed on the stack to prevent register
2072 * allocation problems.
2073 */
2082 else
2086 //XXX what about ArgGSharedVtOnStack here?
2093 else
2097 }
2102 }
2103 }
2104 }
2106 /*
2107 * Emit all parameters passed in registers in non-reverse order for better readability
2108 * and to help the optimization in emit_prolog ().
2109 */
2117 }
2128 else
2134 /* Already done */
2147 /* Already emitted above */
2149 //FIXME what about ArgGSharedVtOnStack ?
2155 }
2157 guint32 align;
2158 guint32 size;
2163 /*
2164 * Other backends use mono_type_stack_size (), but that
2165 * aligns the size to 8, which is larger than the size of
2166 * the source, leading to reads of invalid memory if the
2167 * source is at the end of address space.
2168 */
2170 }
2173 /* Avoid asserts in emit_memcpy () */
2174 mono_cfg_set_exception_invalid_program (cfg, g_strdup_printf ("Passing an argument of size '%d'.", size));
2175 /* Continue normally */
2176 }
2188 }
2190 }
2193 }
2196 /* Emit the signature cookie just before the implicit arguments */
2198 }
2200 /* Handle the case where there are no implicit arguments */
2207 /*
2208 * Tell the JIT to use a more efficient calling convention: call using
2209 * OP_CALL, compute the result location after the call, and save the
2210 * result there.
2211 */
2213 /*
2214 * Nullify the instruction computing the vret addr to enable
2215 * future optimizations.
2216 */
2221 NOT_IMPLEMENTED;
2222 /*
2223 * The valuetype is in RAX:RDX after the call, need to be copied to
2224 * the stack. Push the address here, so the call instruction can
2225 * access it.
2226 */
2228 cfg->arch.vret_addr_loc = mono_compile_create_var (cfg, &mono_defaults.int_class->byval_arg, OP_LOCAL);
2229 /* Prevent it from being register allocated or optimized away */
2231 }
2233 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ((MonoInst*)cfg->arch.vret_addr_loc)->dreg, call->vret_var->dreg);
2234 }
2246 }
2249 }
2254 }
2257 }
2259 void
2261 {
2277 //Pass empty struct value as 0 on platforms representing empty structs as 1 byte.
2279 }
2295 }
2296 }
2301 }
2303 }
2308 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
2331 }
2333 }
2335 /* Pass by addr */
2350 // FIXME: Code growth
2352 }
2357 }
2358 }
2359 }
2361 void
2363 {
2369 else
2375 }
2378 }
2382 #define EMIT_COND_BRANCH(ins,cond,sign) \
2383 if (ins->inst_true_bb->native_offset) { \
2384 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
2385 } else { \
2386 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
2387 if ((cfg->opt & MONO_OPT_BRANCH) && \
2388 x86_is_imm8 (ins->inst_true_bb->max_offset - offset)) \
2389 x86_branch8 (code, cond, 0, sign); \
2390 else \
2391 x86_branch32 (code, cond, 0, sign); \
2392 }
2399 static gboolean
2401 {
2414 }
2430 }
2431 }
2434 }
2436 /*
2437 * mono_arch_dyn_call_prepare:
2438 *
2439 * Return a pointer to an arch-specific structure which contains information
2440 * needed by mono_arch_get_dyn_call_args (). Return NULL if OP_DYN_CALL is not
2441 * supported for SIG.
2442 * This function is equivalent to ffi_prep_cif in libffi.
2443 */
2444 MonoDynCallInfo*
2446 {
2455 }
2458 // FIXME: Preprocess the info to speed up get_dyn_call_args ().
2463 }
2465 /*
2466 * mono_arch_dyn_call_free:
2467 *
2468 * Free a MonoDynCallInfo structure.
2469 */
2470 void
2472 {
2477 }
2479 #define PTR_TO_GREG(ptr) (mgreg_t)(ptr)
2480 #define GREG_TO_PTR(greg) (gpointer)(greg)
2482 /*
2483 * mono_arch_get_start_dyn_call:
2484 *
2485 * Convert the arguments ARGS to a format which can be passed to OP_DYN_CALL, and
2486 * store the result into BUF.
2487 * ARGS should be an array of pointers pointing to the arguments.
2488 * RET should point to a memory buffer large enought to hold the result of the
2489 * call.
2490 * This function should be as fast as possible, any work which does not depend
2491 * on the actual values of the arguments should be done in
2492 * mono_arch_dyn_call_prepare ().
2493 * start_dyn_call + OP_DYN_CALL + finish_dyn_call is equivalent to ffi_call in
2494 * libffi.
2495 */
2496 void
2497 mono_arch_start_dyn_call (MonoDynCallInfo *info, gpointer **args, guint8 *ret, guint8 *buf, int buf_len)
2498 {
2512 }
2528 }
2530 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg)
2543 }
2547 greg ++;
2549 }
2560 #if !defined(__mono_ilp32__)
2563 #endif
2566 #if defined(__mono_ilp32__)
2571 #endif
2597 }
2606 } else if (t->type == MONO_TYPE_GENERICINST && mono_class_is_nullable (mono_class_from_mono_type (t))) {
2616 /* The argument pointed to by arg is either a boxed vtype or null */
2620 /* Fall though */
2623 /* Fall through */
2624 }
2643 }
2644 }
2653 }
2655 }
2658 }
2659 }
2660 }
2662 /*
2663 * mono_arch_finish_dyn_call:
2664 *
2665 * Store the result of a dyn call into the return value buffer passed to
2666 * start_dyn_call ().
2667 * This function should be as fast as possible, any work which does not depend
2668 * on the actual values of the arguments should be done in
2669 * mono_arch_dyn_call_prepare ().
2670 */
2671 void
2673 {
2731 /* Fall through */
2732 }
2734 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg) {
2735 /* Nothing to do */
2754 }
2755 }
2756 }
2760 }
2761 }
2763 /* emit an exception if condition is fail */
2764 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
2765 do { \
2766 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
2767 if (tins == NULL) { \
2768 mono_add_patch_info (cfg, code - cfg->native_code, \
2769 MONO_PATCH_INFO_EXC, exc_name); \
2770 x86_branch32 (code, cond, 0, signed); \
2771 } else { \
2772 EMIT_COND_BRANCH (tins, cond, signed); \
2773 } \
2774 } while (0);
2776 #define EMIT_FPCOMPARE(code) do { \
2777 amd64_fcompp (code); \
2778 amd64_fnstsw (code); \
2779 } while (0);
2781 #define EMIT_SSE2_FPFUNC(code, op, dreg, sreg1) do { \
2782 amd64_movsd_membase_reg (code, AMD64_RSP, -8, (sreg1)); \
2783 amd64_fld_membase (code, AMD64_RSP, -8, TRUE); \
2784 amd64_ ##op (code); \
2785 amd64_fst_membase (code, AMD64_RSP, -8, TRUE, TRUE); \
2786 amd64_movsd_reg_membase (code, (dreg), AMD64_RSP, -8); \
2787 } while (0);
2790 emit_call_body (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data)
2791 {
2794 /*
2795 * FIXME: Add support for thunks
2796 */
2797 {
2800 /*
2801 * Indirect calls are expensive so try to make a near call if possible.
2802 * The caller memory is allocated by the code manager so it is
2803 * guaranteed to be at a 32 bit offset.
2804 */
2807 /* The target is in memory allocated using the code manager */
2812 /* The callee might be an AOT method */
2815 /* The target is in malloc-ed memory */
2817 }
2820 /*
2821 * The call might go directly to a native function without
2822 * the wrapper.
2823 */
2829 }
2830 }
2831 }
2844 /*
2845 * This is not really an optimization, but required because the
2846 * generic class init trampolines use R11 to pass the vtable.
2847 */
2849 }
2854 /* No wrapper */
2857 }
2859 /* See the comment in mono_codegen () */
2860 if ((info->name [0] != 'v') || (strstr (info->name, "ves_array_new_va_") == NULL && strstr (info->name, "ves_array_element_address_") == NULL))
2862 }
2863 }
2867 }
2868 }
2869 }
2872 /* These methods are allocated using malloc */
2875 #ifdef MONO_ARCH_NOMAP32BIT
2877 #endif
2878 /* The 64bit XEN kernel does not honour the MAP_32BIT flag. (#522894) */
2885 }
2888 /*
2889 * Align the call displacement to an address divisible by 4 so it does
2890 * not span cache lines. This is required for code patching to work on SMP
2891 * systems.
2892 */
2896 }
2899 }
2904 }
2905 }
2908 }
2911 emit_call (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data, gboolean win64_adjust_stack)
2912 {
2913 #ifdef TARGET_WIN32
2916 #endif
2918 #ifdef TARGET_WIN32
2921 #endif
2924 }
2928 {
2936 }
2939 }
2941 #ifndef DISABLE_JIT
2943 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB) || ((opcode) == OP_ISBB_IMM)))
2945 /*
2946 * mono_arch_peephole_pass_1:
2947 *
2948 * Perform peephole opts which should/can be performed before local regalloc
2949 */
2950 void
2952 {
2963 /*
2964 * X86_LEA is like ADD, but doesn't have the
2965 * sreg1==dreg restriction. inst_imm > 0 is needed since LEA sign-extends
2966 * its operand to 64 bit.
2967 */
2970 }
2977 /*
2978 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
2979 * the latter has length 2-3 instead of 6 (reverse constant
2980 * propagation). These instruction sequences are very common
2981 * in the initlocals bblock.
2982 */
2984 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
2987 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG)) {
2988 /* Continue */
2989 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
2991 /* Continue */
2993 /* Continue */
2996 }
2997 }
2998 }
3002 /* OP_COMPARE_IMM (reg, 0)
3003 * -->
3004 * OP_AMD64_TEST_NULL (reg)
3005 */
3014 /*
3015 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3016 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
3017 * -->
3018 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3019 * OP_COMPARE_IMM reg, imm
3020 *
3021 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
3022 */
3029 /* check if we can remove cmp reg,0 with test null */
3032 }
3035 }
3038 }
3039 }
3041 void
3043 {
3051 /* reg = 0 -> XOR (reg, reg) */
3052 /* XOR sets cflags on x86, so we cant do it always */
3057 /* Fall through */
3060 }
3061 }
3063 /*
3064 * Use IXOR to avoid a rex prefix if possible. The cpu will sign extend the
3065 * 0 result into 64 bits.
3066 */
3069 }
3070 /* Fall through */
3075 /*
3076 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3077 * the latter has length 2-3 instead of 6 (reverse constant
3078 * propagation). These instruction sequences are very common
3079 * in the initlocals bblock.
3080 */
3082 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3085 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_REG) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG) || (ins2->opcode == OP_LIVERANGE_START) || (ins2->opcode == OP_GC_LIVENESS_DEF) || (ins2->opcode == OP_GC_LIVENESS_USE)) {
3086 /* Continue */
3087 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3089 /* Continue */
3091 /* Continue */
3094 }
3095 }
3096 }
3106 }
3109 }
3110 }
3112 #define NEW_INS(cfg,ins,dest,op) do { \
3113 MONO_INST_NEW ((cfg), (dest), (op)); \
3114 (dest)->cil_code = (ins)->cil_code; \
3115 mono_bblock_insert_before_ins (bb, ins, (dest)); \
3116 } while (0)
3118 /*
3119 * mono_arch_lowering_pass:
3120 *
3121 * Converts complex opcodes into simpler ones so that each IR instruction
3122 * corresponds to one machine instruction.
3123 */
3124 void
3126 {
3129 /*
3130 * FIXME: Need to add more instructions, but the current machine
3131 * description can't model some parts of the composite instructions like
3132 * cdq.
3133 */
3153 }
3155 #ifndef __mono_ilp32__
3157 #endif
3159 /* Don't generate memindex opcodes (to simplify */
3160 /* read sandboxing) */
3167 }
3169 #ifndef __mono_ilp32__
3171 #endif
3179 }
3181 #ifdef MONO_ARCH_SIMD_INTRINSICS
3202 }
3204 #endif
3207 }
3208 }
3211 }
3213 static const int
3214 branch_cc_table [] = {
3218 };
3220 /* Maps CMP_... constants to X86_CC_... constants */
3221 static const int
3222 cc_table [] = {
3225 };
3227 static const int
3228 cc_signed_table [] = {
3231 };
3233 /*#include "cprop.c"*/
3236 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int sreg, int size, gboolean is_signed)
3237 {
3240 else
3248 }
3252 {
3256 #if defined(TARGET_WIN32)
3258 #elif defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
3261 #endif
3266 /*
3267 * Under Windows:
3268 * If requested stack size is larger than one page,
3269 * perform stack-touch operation
3270 */
3271 /*
3272 * Generate stack probe code.
3273 * Under Windows, it is necessary to allocate one page at a time,
3274 * "touching" stack after each successful sub-allocation. This is
3275 * because of the way stack growth is implemented - there is a
3276 * guard page before the lowest stack page that is currently commited.
3277 * Stack normally grows sequentially so OS traps access to the
3278 * guard page and commits more pages when needed.
3279 */
3300 }
3301 else
3309 }
3313 }
3317 }
3337 }
3339 }
3343 {
3345 guint32 quad;
3347 /* Move return value to the target register */
3348 /* FIXME: do this in the local reg allocator */
3364 }
3368 }
3370 }
3387 /* Load the destination address */
3389 amd64_mov_reg_membase (code, AMD64_RCX, loc->inst_basereg, loc->inst_offset, sizeof(gpointer));
3394 amd64_mov_membase_reg (code, AMD64_RCX, (quad * sizeof(mgreg_t)), cinfo->ret.pair_regs [quad], sizeof(mgreg_t));
3405 NOT_IMPLEMENTED;
3406 }
3407 }
3408 }
3410 }
3413 }
3417 #ifdef __APPLE__
3419 #endif
3421 gboolean
3423 {
3424 #ifdef TARGET_MACH
3431 #if MONO_HAVE_FAST_TLS
3434 /*
3435 * We're looking for these two instructions:
3436 *
3437 * mov %gs:[offset](,%rdi,8),%rax
3438 * retq
3439 */
3452 /*
3453 * Apple now loads a different version of pthread_getspecific when launched from Xcode
3454 * For that version we're looking for these instructions:
3455 *
3456 * pushq %rbp
3457 * movq %rsp, %rbp
3458 * mov %gs:[offset](,%rdi,8),%rax
3459 * popq %rbp
3460 * retq
3461 */
3479 }
3480 #endif
3485 #elif defined(TARGET_ANDROID)
3487 #else
3489 #endif
3490 }
3492 int
3494 {
3495 #ifdef TARGET_OSX
3497 #else
3500 #endif
3501 }
3503 /*
3504 * mono_amd64_emit_tls_get:
3505 * @code: buffer to store code to
3506 * @dreg: hard register where to place the result
3507 * @tls_offset: offset info
3508 *
3509 * mono_amd64_emit_tls_get emits in @code the native code that puts in
3510 * the dreg register the item in the thread local storage identified
3511 * by tls_offset.
3512 *
3513 * Returns: a pointer to the end of the stored code
3514 */
3515 guint8*
3517 {
3518 #ifdef TARGET_WIN32
3526 /* Load TEB->TlsExpansionSlots */
3534 }
3535 #elif defined(__APPLE__)
3538 #else
3546 }
3547 #endif
3549 }
3551 #ifdef TARGET_WIN32
3553 #define MAX_TEB_TLS_SLOTS 64
3554 #define TEB_TLS_SLOTS_OFFSET 0x1480
3555 #define TEB_TLS_EXPANSION_SLOTS_OFFSET 0x1780
3559 {
3565 //Use temporary register for offset calculation?
3571 }
3573 //TEB TLS slot array only contains MAX_TEB_TLS_SLOTS items, if more is used the expansion slots must be addressed.
3578 //TLS slot array, _TEB.TlsSlots, is at offset TEB_TLS_SLOTS_OFFSET and index is offset * 8 in Windows 64-bit _TEB structure.
3582 //TEB pointer is stored in GS segment register on Windows x64. TLS slot is located at calculated offset from that pointer.
3591 //TLS expansion slots, _TEB.TlsExpansionSlots, is at offset TEB_TLS_EXPANSION_SLOTS_OFFSET in Windows 64-bit _TEB structure.
3595 //Check for NULL in _TEB.TlsExpansionSlots.
3600 //TLS expansion slots are at index offset into the expansion array.
3601 //Calculate for the MAX_TEB_TLS_SLOTS offsets, since the interessting offset is offset_reg - MAX_TEB_TLS_SLOTS.
3614 }
3616 #endif
3620 {
3621 /* offset_reg contains a value translated by mono_arch_translate_tls_offset () */
3622 #ifdef TARGET_OSX
3627 #elif defined(__linux__)
3631 /* Use a temporary reg by saving it to the redzone */
3636 }
3642 #elif defined(TARGET_WIN32)
3644 #else
3646 #endif
3648 }
3652 {
3653 #ifdef TARGET_WIN32
3655 #elif defined(__APPLE__)
3658 #else
3662 #endif
3664 }
3668 {
3669 /* offset_reg contains a value translated by mono_arch_translate_tls_offset () */
3670 #ifdef TARGET_WIN32
3672 #elif defined(__APPLE__)
3675 #else
3678 #endif
3680 }
3682 /*
3683 * mono_arch_translate_tls_offset:
3684 *
3685 * Translate the TLS offset OFFSET computed by MONO_THREAD_VAR_OFFSET () into a format usable by OP_TLS_GET_REG/OP_TLS_SET_REG.
3686 */
3687 int
3689 {
3690 #ifdef __APPLE__
3692 #else
3694 #endif
3695 }
3697 /*
3698 * emit_setup_lmf:
3699 *
3700 * Emit code to initialize an LMF structure at LMF_OFFSET.
3701 */
3704 {
3705 /*
3706 * The ip field is not set, the exception handling code will obtain it from the stack location pointed to by the sp field.
3707 */
3708 /*
3709 * sp is saved right before calls but we need to save it here too so
3710 * async stack walks would work.
3711 */
3712 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
3713 /* Save rbp */
3714 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), AMD64_RBP, 8);
3716 mono_emit_unwind_op_offset (cfg, code, AMD64_RBP, - (cfa_offset - (lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp))));
3718 /* These can't contain refs */
3719 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, previous_lmf), SLOT_NOREF);
3720 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rip), SLOT_NOREF);
3721 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), SLOT_NOREF);
3722 /* These are handled automatically by the stack marking code */
3723 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), SLOT_NOREF);
3726 }
3728 #ifdef TARGET_WIN32
3730 #define TEB_LAST_ERROR_OFFSET 0x068
3734 {
3735 /* Threads last error value is located in TEB_LAST_ERROR_OFFSET. */
3740 }
3742 #else
3746 {
3748 }
3750 #endif
3752 /* benchmark and set based on cpu */
3753 #define LOOP_ALIGNMENT 8
3754 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
3756 #ifndef DISABLE_JIT
3757 void
3759 {
3762 guint offset;
3766 /* Fix max_offset estimate for each successor bb */
3773 }
3774 }
3778 /* set alignment depending on cpu */
3781 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
3785 }
3786 }
3797 /* this is not thread save, but good enough */
3799 }
3805 if (mono_break_at_bb_method && mono_method_desc_full_match (mono_break_at_bb_method, cfg->method) && bb->block_num == mono_break_at_bb_bb_num)
3813 #define EXTRA_CODE_SPACE (16)
3820 }
3850 /* In AMD64 NaCl, pointers are 4 bytes, */
3851 /* so STORE_* != STOREI8_*. Likewise below. */
3853 amd64_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, sizeof(gpointer));
3862 /* In NaCl, this could be a PCONST type, which could */
3863 /* mean a pointer type was copied directly into the */
3864 /* lower 32-bits of inst_imm, so for InvalidPtr==-1 */
3865 /* the value would be 0x00000000FFFFFFFF which is */
3866 /* not proper for an imm32 unless you cast it. */
3868 amd64_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, (gint32)ins->inst_imm, sizeof(gpointer));
3875 #ifdef __mono_ilp32__
3876 /* In ILP32, pointers are 4 bytes, so separate these */
3877 /* cases, use literal 8 below where we really want 8 */
3881 #endif
3883 // FIXME: Decompose this earlier
3889 }
3896 // FIXME: Decompose this earlier
3902 }
3909 /* For NaCl, pointers are 4 bytes, so separate these */
3910 /* cases, use literal 8 below where we really want 8 */
3916 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, sizeof(gpointer));
3919 /* Use literal 8 instead of sizeof pointer or */
3920 /* register, we really want 8 for this opcode */
3931 /* The cpu zero extends the result into 64 bits */
3932 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE, 4);
3938 /* The cpu zero extends the result into 64 bits */
3939 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE, 4);
3966 /* Clean out the upper word */
3977 #if defined(__mono_ilp32__)
3978 /* Comparison of pointer immediates should be 4 bytes to avoid sign-extend problems */
3982 #endif
4014 /* FIXME: Make a 64 version too */
4015 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4019 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4023 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4027 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4031 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4034 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4037 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4040 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4046 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4065 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4068 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4071 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4075 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4078 amd64_alu_membase8_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4104 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4107 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4110 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4116 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4121 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4125 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4129 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4133 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4137 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4166 /* Load ss_tramp_var */
4167 /* This is equal to &ss_trampoline */
4169 /* Load the trampoline address */
4171 /* Call it if it is non-null */
4177 }
4179 /*
4180 * This is the address which is saved in seq points,
4181 */
4186 guint32 val;
4190 /* Load info var */
4193 /* Load the info->bp_addrs [offset], which is either NULL or the address of the breakpoint trampoline */
4198 /* Call the trampoline */
4205 /*
4206 * Emit a test+branch against a constant, the constant will be overwritten
4207 * by mono_arch_set_breakpoint () to cause the test to fail.
4208 */
4216 /* Load bp_tramp_var */
4217 /* This is equal to &bp_trampoline */
4219 /* Call the trampoline */
4222 }
4223 /*
4224 * Add an additional nop so skipping the bp doesn't cause the ip to point
4225 * to another IL offset.
4226 */
4229 }
4282 /* MOV r1, r2 */
4283 /* ADD r1, r1 */
4289 /* LEA r1, [r2 + r2*2] */
4293 /* LEA r1, [r2 + r2*4] */
4297 /* LEA r1, [r2 + r2*2] */
4298 /* ADD r1, r1 */
4303 /* LEA r1, [r2 + r2*8] */
4307 /* LEA r1, [r2 + r2*4] */
4308 /* ADD r1, r1 */
4313 /* LEA r1, [r2 + r2*2] */
4314 /* SHL r1, 2 */
4319 /* LEA r1, [r2 + r2*4] */
4320 /* LEA r1, [r1 + r1*4] */
4325 /* LEA r1, [r2 + r2*4] */
4326 /* SHL r1, 2 */
4327 /* LEA r1, [r1 + r1*4] */
4335 }
4337 }
4340 /* Regalloc magic makes the div/rem cases the same */
4348 }
4359 }
4370 }
4381 }
4514 /* the mul operation and the exception check should most likely be split */
4517 /*g_assert (ins->sreg2 == X86_EAX);
4518 g_assert (ins->dreg == X86_EAX);*/
4524 /* no need to save since we're going to store to it anyway */
4528 }
4531 }
4536 }
4540 }
4542 /* save before the check since pop and mov don't change the flags */
4551 }
4578 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
4602 /* This needs to operate on 64 bit values */
4603 amd64_cmov_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, ins->sreg2);
4617 else
4638 }
4640 }
4645 }
4652 /* Restore callee saved registers */
4658 }
4663 // FIXME:
4665 NOT_IMPLEMENTED;
4667 /* Copy arguments on the stack to our argument area */
4671 }
4674 }
4680 else
4686 }
4688 /* ensure ins->sreg1 is not NULL */
4695 }
4704 /*
4705 * The AMD64 ABI forces callers to know about varargs.
4706 */
4709 else if ((cfg->method->wrapper_type == MONO_WRAPPER_MANAGED_TO_NATIVE) && (cfg->method->klass->image != mono_defaults.corlib)) {
4710 /*
4711 * Since the unmanaged calling convention doesn't contain a
4712 * 'vararg' entry, we have to treat every pinvoke call as a
4713 * potential vararg call.
4714 */
4719 nregs ++;
4722 else
4724 }
4728 else
4746 }
4748 /*
4749 * The AMD64 ABI forces callers to know about varargs.
4750 */
4755 }
4757 } else if ((cfg->method->wrapper_type == MONO_WRAPPER_MANAGED_TO_NATIVE) && (cfg->method->klass->image != mono_defaults.corlib)) {
4758 /*
4759 * Since the unmanaged calling convention doesn't contain a
4760 * 'vararg' entry, we have to treat every pinvoke call as a
4761 * potential vararg call.
4762 */
4767 nregs ++;
4771 }
4774 else
4776 }
4804 /* r11 = args buffer filled by mono_arch_get_dyn_call_args () */
4806 /* r10 = ftn */
4809 /* Save args buffer */
4812 /* Set fp arg regs */
4813 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, has_fp), sizeof (mgreg_t));
4818 amd64_sse_movsd_reg_membase (code, i, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + (i * sizeof (double)));
4821 /* Set stack args */
4823 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + ((PARAM_REGS + i) * sizeof(mgreg_t)), sizeof(mgreg_t));
4825 }
4827 /* Set argument registers */
4831 /* Make the call */
4837 /* Save result */
4840 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs), AMD64_XMM0);
4841 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + sizeof (double), AMD64_XMM1);
4843 }
4846 amd64_mov_membase_reg (code, lmf_var->inst_basereg, lmf_var->inst_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
4848 }
4873 else
4884 }
4899 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_generic_class_init", FALSE);
4905 }
4908 amd64_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
4917 /* keep alignment */
4945 }
4949 }
4953 }
4961 }
4969 }
4971 /* Align stack */
4976 /* Restore stack alignment */
4980 /* Even though we're saving RSP, use sizeof */
4981 /* gpointer because spvar is of type IntPtr */
4982 /* see: mono_create_spvar_for_region */
4984 amd64_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, AMD64_RSP, sizeof(gpointer));
4989 amd64_alu_reg_imm (code, X86_SUB, AMD64_RSP, ALIGN_TO (cfg->param_area, MONO_ARCH_FRAME_ALIGNMENT));
4990 }
4992 }
4995 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
4998 }
5001 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5002 /* The local allocator will put the result into RAX */
5005 }
5014 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
5015 //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
5016 //break;
5024 else
5026 }
5052 amd64_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
5075 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], (const char *)ins->inst_p1);
5092 /* floating point opcodes */
5098 }
5102 }
5104 }
5111 else
5113 }
5119 }
5121 }
5132 /* This requires a double->single conversion */
5134 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
5135 }
5143 }
5151 }
5162 }
5173 }
5234 /* Based on gcc code */
5238 /* Positive case */
5243 /* Negative case */
5244 /* Save to the red zone */
5254 /* Restore */
5259 }
5284 }
5317 }
5332 }
5358 }
5411 /*
5412 * The two arguments are swapped because the fbranch instructions
5413 * depend on this for the non-sse case to work.
5414 */
5418 /*
5419 * FIXME: Get rid of this.
5420 * The two arguments are swapped because the fbranch instructions
5421 * depend on this for the non-sse case to work.
5422 */
5427 /* zeroing the register at the start results in
5428 * shorter and faster code (we can also remove the widening op)
5429 */
5448 }
5450 }
5453 /* zeroing the register at the start results in
5454 * shorter and faster code (we can also remove the widening op)
5455 */
5470 }
5472 }
5482 }
5485 /* zeroing the register at the start results in
5486 * shorter and faster code (we can also remove the widening op)
5487 */
5499 }
5501 }
5511 }
5545 }
5561 }
5563 }
5589 }
5611 }
5613 }
5620 }
5622 /* Branch if C013 != 100 */
5623 /* branch if !ZF or (PF|CF) */
5640 /* skip branch if C1=1 */
5643 /* branch if (C0 | C3) = 1 */
5649 }
5652 /* Branch if C013 == 100 or 001 */
5655 /* skip branch if C1=1 */
5658 /* branch if (C0 | C3) = 1 */
5662 }
5664 /* Branch if C013 == 000 */
5668 /* Branch if C013=000 or 100 */
5671 /* skip branch if C1=1 */
5674 /* branch if C0=0 */
5678 }
5680 /* Branch if C013 != 001 */
5685 /* Transfer value to the fp stack */
5703 }
5710 }
5714 }
5719 }
5731 /* dreg contains the old value, add with sreg2 value */
5738 }
5743 /* LOCK prefix is implied. */
5748 }
5751 guint32 size;
5755 else
5758 /*
5759 * See http://msdn.microsoft.com/en-us/magazine/cc302329.aspx for
5760 * an explanation of how this works.
5761 */
5772 }
5776 }
5780 }
5784 }
5788 }
5792 }
5796 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, ins->opcode == OP_ATOMIC_LOAD_U4 ? 4 : 8);
5798 }
5803 }
5807 }
5835 }
5842 }
5845 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
5850 }
5861 }
5867 gpointer card_table_mask;
5874 /*If either point to the stack we can simply avoid the WB. This happens due to
5875 * optimizations revealing a stack store that was not visible when op_cardtable was emited.
5876 */
5880 /*
5881 * We need one register we can clobber, we choose EDX and make sreg1
5882 * fixed EAX to work around limitations in the local register allocator.
5883 * sreg2 might get allocated to EDX, but that is not a problem since
5884 * we use it before clobbering EDX.
5885 */
5888 /*
5889 * This is the code we produce:
5890 *
5891 * edx = value
5892 * edx >>= nursery_shift
5893 * cmp edx, (nursery_start >> nursery_shift)
5894 * jne done
5895 * edx = ptr
5896 * edx >>= card_table_shift
5897 * edx += cardtable
5898 * [edx] = 1
5899 * done:
5900 */
5907 /*
5908 * The value we need to compare against is 64 bits, so we need
5909 * another spare register. We use RBX, which we save and
5910 * restore.
5911 */
5918 }
5920 }
5926 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GC_CARD_TABLE_ADDR, card_table);
5934 }
5935 #ifdef MONO_ARCH_SIMD_INTRINSICS
5936 /* TODO: Some of these IR opcodes are marked as no clobber when they indeed do. */
6326 /*TODO: This is appart of the sse spec but not added
6327 case OP_PSARQ:
6328 amd64_sse_psraq_reg_imm (code, ins->dreg, ins->inst_imm);
6329 break;
6330 case OP_PSARQ_REG:
6331 amd64_sse_psraq_reg_reg (code, ins->dreg, ins->sreg2);
6332 break;
6333 */
6378 }
6389 /*amd64_movd_reg_xreg_size (code, ins->dreg, ins->sreg1, 4);
6390 if (ins->inst_c0)
6391 amd64_shift_reg_imm_size (code, X86_SHR, ins->dreg, 16, 4);*/
6398 else
6408 /*sreg1 is the extracted ireg (scratch)
6409 /sreg2 is the to be inserted ireg (scratch)
6410 /dreg is the xreg to receive the value*/
6412 /*clear the bits from the extracted word*/
6414 /*shift the value to insert if needed*/
6417 /*join them together*/
6430 else
6439 else
6446 else
6454 else
6462 else
6466 }
6471 else
6495 /*FIXME the peephole pass should have killed this*/
6529 }
6551 }
6558 #endif
6561 printf ("R%d START=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6564 }
6567 printf ("R%d END=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6570 }
6578 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_threads_state_poll", FALSE);
6581 }
6598 }
6604 }
6605 }
6608 }
6612 void
6614 {
6615 /* The signature doesn't matter */
6616 mono_register_jit_icall (mono_amd64_throw_exception, "mono_amd64_throw_exception", mono_create_icall_signature ("void"), TRUE);
6617 }
6619 void
6620 mono_arch_patch_code_new (MonoCompile *cfg, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gpointer target)
6621 {
6624 /*
6625 * Debug code to help track down problems where the target of a near call is
6626 * is not valid.
6627 */
6643 }
6644 }
6645 }
6648 }
6650 #ifndef DISABLE_JIT
6652 static int
6654 {
6669 }
6671 /*
6672 * This macro is used for testing whenever the unwinder works correctly at every point
6673 * where an async exception can happen.
6674 */
6675 /* This will generate a SIGSEGV at the given point in the code */
6676 #define async_exc_point(code) do { \
6677 if (mono_inject_async_exc_method && mono_method_desc_full_match (mono_inject_async_exc_method, cfg->method)) { \
6678 if (cfg->arch.async_point_count == mono_inject_async_exc_pos) \
6679 amd64_mov_reg_mem (code, AMD64_RAX, 0, 4); \
6680 cfg->arch.async_point_count ++; \
6681 } \
6682 } while (0)
6684 guint8 *
6686 {
6705 /* Amount of stack space allocated by register saving code */
6708 /* Offset between RSP and the CFA */
6711 /*
6712 * The prolog consists of the following parts:
6713 * FP present:
6714 * - push rbp, mov rbp, rsp
6715 * - save callee saved regs using pushes
6716 * - allocate frame
6717 * - save rgctx if needed
6718 * - save lmf if needed
6719 * FP not present:
6720 * - allocate frame
6721 * - save rgctx if needed
6722 * - save lmf if needed
6723 * - save callee saved regs using moves
6724 */
6726 // CFA = sp + 8
6729 // IP saved at CFA - 8
6740 #ifdef TARGET_WIN32
6741 mono_arch_unwindinfo_add_push_nonvol (&cfg->arch.unwindinfo, cfg->native_code, code, AMD64_RBP);
6742 #endif
6743 /* These are handled automatically by the stack marking code */
6749 #ifdef TARGET_WIN32
6751 #endif
6752 }
6754 /* The param area is always at offset 0 from sp */
6755 /* This needs to be allocated here, since it has to come after the spill area */
6758 // FIXME:
6761 }
6764 /*
6765 * On enter, the stack is misaligned by the pushing of the return
6766 * address. It is either made aligned by the pushing of %rbp, or by
6767 * this.
6768 */
6772 /* Mark the padding slot as NOREF */
6774 }
6778 /* Mark the padding slot as NOREF */
6780 }
6783 }
6787 /* Allocate stack frame */
6789 /* See mono_emit_stack_alloc */
6790 #if defined(TARGET_WIN32) || defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
6792 /*FIXME handle unbounded code expansion, we should use a loop in case of more than X interactions*/
6793 guint32 required_code_size = ((remaining_size / 0x1000) + 1) * 11; /*11 is the max size of amd64_alu_reg_imm + amd64_test_membase_reg*/
6801 }
6808 }
6810 #ifdef TARGET_WIN32
6813 #endif
6817 }
6824 }
6825 #ifdef TARGET_WIN32
6827 mono_arch_unwindinfo_add_alloc_stack (&cfg->arch.unwindinfo, cfg->native_code, code, remaining_size);
6828 #endif
6829 }
6830 #else
6836 }
6837 #endif
6838 }
6840 /* Stack alignment check */
6841 #if 0
6842 {
6852 }
6853 #endif
6856 /* Fill the stack frame with a dummy value to force deterministic behavior */
6858 /* Save registers to the red zone */
6872 }
6874 /* Save LMF */
6878 /* Save callee saved registers */
6881 /* Save caller saved registers after sp is adjusted */
6882 /* The registers are saved at the bottom of the frame */
6883 /* FIXME: Optimize this so the regs are saved at the end of the frame in increasing order */
6885 /* The registers are saved just below the saved rbp */
6887 }
6895 /* These are handled automatically by the stack marking code */
6899 // FIXME: GC
6900 }
6904 }
6905 }
6907 /* store runtime generic context */
6912 amd64_mov_membase_reg (code, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, sizeof(gpointer));
6914 mono_add_var_location (cfg, cfg->rgctx_var, TRUE, MONO_ARCH_RGCTX_REG, 0, 0, code - cfg->native_code);
6915 mono_add_var_location (cfg, cfg->rgctx_var, FALSE, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, code - cfg->native_code, 0);
6916 }
6918 /* compute max_length in order to use short forward jumps */
6927 /* max alignment for loops */
6933 }
6935 /* Take prolog and epilog instrumentation into account */
6940 }
6941 }
6949 /* Save volatile arguments to the stack */
6951 amd64_mov_membase_reg (code, cfg->vret_addr->inst_basereg, cfg->vret_addr->inst_offset, cinfo->ret.reg, 8);
6952 }
6954 /* Keep this in sync with emit_load_volatile_arguments */
6961 /* Unused arguments */
6964 /* Save volatile arguments to the stack */
6970 /* FIXME: I1 etc */
6971 /*
6972 if (stack_offset & 0x1)
6973 size = 1;
6974 else if (stack_offset & 0x2)
6975 size = 2;
6976 else if (stack_offset & 0x4)
6977 size = 4;
6978 else
6979 size = 8;
6980 */
6983 /*
6984 * Save the original location of 'this',
6985 * get_generic_info_from_stack_frame () needs this to properly look up
6986 * the argument value during the handling of async exceptions.
6987 */
6990 mono_add_var_location (cfg, ins, FALSE, ins->inst_basereg, ins->inst_offset, code - cfg->native_code, 0);
6991 }
6993 }
7004 amd64_mov_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad], sizeof(mgreg_t));
7007 amd64_movss_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad]);
7010 amd64_movsd_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad]);
7016 }
7017 }
7021 amd64_mov_membase_reg (code, ins->inst_left->inst_basereg, ins->inst_left->inst_offset, ainfo->pair_regs [0], sizeof (gpointer));
7030 }
7032 /* Argument allocated to (non-volatile) register */
7042 }
7047 }
7048 }
7049 }
7057 }
7062 /*
7063 * Optimize the common case of the first bblock making a call with the same
7064 * arguments as the method. This works because the arguments are still in their
7065 * original argument registers.
7066 * FIXME: Generalize this
7067 */
7077 }
7090 if (((next->opcode == OP_LOAD_MEMBASE) || (next->opcode == OP_LOADI4_MEMBASE)) && next->inst_basereg == ins->inst_basereg && next->inst_offset == ins->inst_offset) {
7097 /* Only continue if the instruction doesn't change argument regs */
7100 }
7101 }
7103 }
7106 }
7108 /* Argument allocated to (non-volatile) register */
7114 }
7118 }
7119 }
7123 //next = mono_inst_list_next (&next->node, &first_bb->ins_list);
7126 }
7127 }
7128 }
7133 /* Initialize seq_point_info_var */
7135 /* Initialize the variable from a GOT slot */
7136 /* Same as OP_AOTCONST */
7137 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_SEQ_POINT_INFO, cfg->method);
7141 }
7144 /* Initialize ss_tramp_var */
7149 amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, MONO_STRUCT_OFFSET (SeqPointInfo, ss_tramp_addr), 8);
7152 /* Initialize ss_tramp_var */
7159 /* Initialize bp_tramp_var */
7165 }
7166 }
7173 }
7175 void
7177 {
7192 }
7197 /* Mark the start of the epilog */
7200 /* Save the uwind state which is needed by the out-of-line code */
7206 /* the code restoring the registers must be kept in sync with OP_TAILCALL */
7209 /* check if we need to restore protection of the stack after a stack overflow */
7213 /* we load the value in a separate instruction: this mechanism may be
7214 * used later as a safer way to do thread interruption
7215 */
7216 amd64_mov_reg_membase (code, AMD64_RCX, AMD64_RCX, MONO_STRUCT_OFFSET (MonoJitTlsData, restore_stack_prot), 8);
7220 /* note that the call trampoline will preserve eax/edx */
7224 /* FIXME: maybe save the jit tls in the prolog */
7225 }
7227 amd64_mov_reg_membase (code, AMD64_RBP, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), 8);
7228 }
7229 }
7231 /* Restore callee saved regs */
7234 /* Restore only used_int_regs, not arch.saved_iregs */
7235 #if defined(MONO_SUPPORT_TASKLETS)
7237 #else
7239 #endif
7244 }
7246 }
7247 }
7249 /* Load returned vtypes into registers if needed */
7258 amd64_mov_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_size [quad]);
7261 amd64_movss_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)));
7264 amd64_movsd_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)));
7270 }
7271 }
7272 }
7277 }
7281 }
7286 /* Restore the unwind state to be the same as before the epilog */
7292 }
7294 void
7296 {
7304 /* Compute needed space */
7314 }
7320 }
7324 /* add code to raise exceptions */
7331 guint32 throw_ip;
7338 //x86_breakpoint (code);
7339 /* Find a throw sequence for the same exception class */
7347 }
7356 }
7361 code = emit_call_body (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_arch_throw_corlib_exception");
7369 nthrows ++;
7370 }
7371 }
7373 }
7375 /* do nothing */
7377 }
7379 }
7381 /* Handle relocations with RIP relative addressing */
7390 guint32 target_pos;
7392 /* The SSE opcodes require a 16 byte alignment */
7399 }
7403 }
7411 }
7417 }
7424 /*loading is faster against aligned addresses.*/
7430 /*alu_op [rex] modr/m imm32 - 7 or 8 bytes */
7433 else
7441 }
7444 }
7453 ;
7455 }
7456 }
7458 }
7464 }
7470 {
7476 /* Keep this in sync with mono_arch_get_argument_info */
7479 /* Allocate a new area on the stack and save arguments there */
7496 }
7497 }
7498 }
7509 }
7512 SAVE_NONE,
7513 SAVE_STRUCT,
7514 SAVE_EAX,
7515 SAVE_EAX_EDX,
7516 SAVE_XMM
7517 };
7520 mono_arch_instrument_epilog_full (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments, gboolean preserve_argument_registers)
7521 {
7530 /* special case string .ctor icall */
7533 else
7548 }
7549 /* Fall through */
7556 }
7558 /* Save the result and copy it into the proper argument register */
7562 /* Align stack */
7568 /* FIXME: */
7575 /* Align stack */
7577 /*
7578 * The result is already in the proper argument register so no copying
7579 * needed.
7580 */
7586 }
7588 /* Set %al since this is a varargs call */
7591 else
7597 }
7606 }
7608 /* Restore result */
7615 /* FIXME: */
7626 }
7629 }
7631 void
7633 {
7634 /* Not needed */
7635 }
7637 void
7639 {
7640 }
7642 gboolean
7644 {
7646 }
7648 /*
7649 * Determine whenever the trap whose info is in SIGINFO is caused by
7650 * integer overflow.
7651 */
7652 gboolean
7654 {
7655 MonoContext ctx;
7658 gint64 value;
7666 rip ++;
7667 }
7668 else
7671 if ((rip [0] == 0xf7) && (x86_modrm_mod (rip [1]) == 0x3) && (x86_modrm_reg (rip [1]) == 0x7)) {
7672 /* idiv REG */
7679 }
7682 }
7684 guint32
7686 {
7688 }
7690 /**
7691 * mono_breakpoint_clean_code:
7692 *
7693 * Copy @size bytes from @code - @offset to the buffer @buf. If the debugger inserted software
7694 * breakpoints in the original code, they are removed in the copy.
7695 *
7696 * Returns TRUE if no sw breakpoint was present.
7697 */
7698 gboolean
7699 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
7700 {
7701 /*
7702 * If method_start is non-NULL we need to perform bound checks, since we access memory
7703 * at code - offset we could go before the start of the method and end up in a different
7704 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
7705 * instead.
7706 */
7713 }
7715 }
7717 int
7719 {
7721 }
7723 gpointer
7725 {
7727 }
7729 #define MAX_ARCH_DELEGATE_PARAMS 10
7731 static gpointer
7733 {
7743 /* Replace the this argument with the target */
7745 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7755 /* We have to shift the arguments left */
7758 #ifdef TARGET_WIN32
7761 else
7763 #else
7765 #endif
7766 }
7769 }
7771 }
7776 *info = mono_tramp_info_create ("delegate_invoke_impl_has_target", start, code - start, NULL, unwind_ops);
7781 }
7787 else
7792 }
7793 mono_profiler_code_buffer_new (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL);
7796 }
7798 #define MAX_VIRTUAL_DELEGATE_OFFSET 32
7800 static gpointer
7802 {
7815 /* Replace the this argument with the target */
7817 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7820 /* Load the IMT reg */
7821 amd64_mov_reg_membase (code, MONO_ARCH_IMT_REG, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, method), 8);
7822 }
7824 /* Load the vtable */
7825 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_ARG_REG1, MONO_STRUCT_OFFSET (MonoObject, vtable), 8);
7827 mono_profiler_code_buffer_new (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL);
7834 }
7836 /*
7837 * mono_arch_get_delegate_invoke_impls:
7838 *
7839 * Return a list of MonoTrampInfo structures for the delegate invoke impl
7840 * trampolines.
7841 */
7842 GSList*
7844 {
7855 }
7860 }
7867 }
7870 }
7872 gpointer
7874 {
7881 /* FIXME: Support more cases */
7897 }
7922 }
7927 }
7930 }
7932 gpointer
7933 mono_arch_get_delegate_virtual_invoke_impl (MonoMethodSignature *sig, MonoMethod *method, int offset, gboolean load_imt_reg)
7934 {
7936 gpointer code;
7942 }
7944 void
7946 {
7947 #if !defined(HOST_WIN32) && defined(MONO_XEN_OPT)
7949 #endif
7950 }
7952 void
7954 {
7955 }
7957 #define CMP_SIZE (6 + 1)
7958 #define CMP_REG_REG_SIZE (4 + 1)
7959 #define BR_SMALL_SIZE 2
7960 #define BR_LARGE_SIZE 6
7961 #define MOV_REG_IMM_SIZE 10
7962 #define MOV_REG_IMM_32BIT_SIZE 6
7963 #define JUMP_REG_SIZE (2 + 1)
7965 static int
7967 {
7972 }
7974 /*
7975 * LOCKING: called with the domain lock held
7976 */
7977 gpointer
7978 mono_arch_build_imt_trampoline (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
7979 gpointer fail_tramp)
7980 {
7994 else
7996 }
8002 else
8004 }
8013 else
8016 /* with assert below:
8017 * item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
8018 */
8019 }
8020 }
8024 else
8028 }
8030 }
8033 else
8048 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8052 }
8053 }
8060 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8062 }
8069 }
8071 /* enable the commented code to assert on wrong method */
8072 #if 0
8074 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8078 }
8081 /* See the comment below about R10 */
8082 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8087 #else
8088 /* We're using R10 (MONO_ARCH_IMT_SCRATCH_REG) here because R11 (MONO_ARCH_IMT_REG)
8089 needs to be preserved. R10 needs
8090 to be preserved for calls which
8091 require a runtime generic context,
8092 but interface calls don't. */
8093 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8095 #endif
8096 }
8099 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof (gpointer));
8103 }
8107 else
8109 }
8111 }
8112 /* patch the branches to get to the target items */
8118 }
8119 }
8120 }
8126 mono_profiler_code_buffer_new (start, code - start, MONO_PROFILER_CODE_BUFFER_IMT_TRAMPOLINE, NULL);
8128 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
8131 }
8133 MonoMethod*
8135 {
8137 }
8139 MonoVTable*
8141 {
8143 }
8145 GSList*
8147 {
8154 }
8156 #ifndef DISABLE_JIT
8158 MonoInst*
8159 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
8160 {
8173 }
8181 }
8203 }
8204 }
8213 }
8215 #if 0
8216 /* OP_FREM is not IEEE compatible */
8221 }
8222 #endif
8223 }
8226 }
8227 #endif
8229 gboolean
8231 {
8233 }
8235 mgreg_t
8237 {
8239 }
8241 void
8243 {
8245 }
8247 gpointer
8248 mono_arch_install_handler_block_guard (MonoJitInfo *ji, MonoJitExceptionInfo *clause, MonoContext *ctx, gpointer new_value)
8249 {
8253 /*Load the spvar*/
8264 }
8266 /*
8267 * mono_arch_emit_load_aotconst:
8268 *
8269 * Emit code to load the contents of the GOT slot identified by TRAMP_TYPE and
8270 * TARGET from the mscorlib GOT in full-aot code.
8271 * On AMD64, the result is placed into R11.
8272 */
8273 guint8*
8274 mono_arch_emit_load_aotconst (guint8 *start, guint8 *code, MonoJumpInfo **ji, MonoJumpInfoType tramp_type, gconstpointer target)
8275 {
8280 }
8282 /*
8283 * mono_arch_get_trampolines:
8284 *
8285 * Return a list of MonoTrampInfo structures describing arch specific trampolines
8286 * for AOT.
8287 */
8288 GSList *
8290 {
8292 }
8294 /* Soft Debug support */
8295 #ifdef MONO_ARCH_SOFT_DEBUG_SUPPORTED
8297 /*
8298 * mono_arch_set_breakpoint:
8299 *
8300 * Set a breakpoint at the native code corresponding to JI at NATIVE_OFFSET.
8301 * The location should contain code emitted by OP_SEQ_POINT.
8302 */
8303 void
8305 {
8310 SeqPointInfo *info = (SeqPointInfo *)mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8315 /* ip points to a mov r11, 0 */
8319 }
8320 }
8322 /*
8323 * mono_arch_clear_breakpoint:
8324 *
8325 * Clear the breakpoint at IP.
8326 */
8327 void
8329 {
8334 SeqPointInfo *info = (SeqPointInfo *)mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8339 }
8340 }
8342 gboolean
8344 {
8345 /* We use soft breakpoints on amd64 */
8347 }
8349 /*
8350 * mono_arch_skip_breakpoint:
8351 *
8352 * Modify CTX so the ip is placed after the breakpoint instruction, so when
8353 * we resume, the instruction is not executed again.
8354 */
8355 void
8357 {
8359 }
8361 /*
8362 * mono_arch_start_single_stepping:
8363 *
8364 * Start single stepping.
8365 */
8366 void
8368 {
8370 }
8372 /*
8373 * mono_arch_stop_single_stepping:
8374 *
8375 * Stop single stepping.
8376 */
8377 void
8379 {
8381 }
8383 /*
8384 * mono_arch_is_single_step_event:
8385 *
8386 * Return whenever the machine state in SIGCTX corresponds to a single
8387 * step event.
8388 */
8389 gboolean
8391 {
8392 /* We use soft breakpoints on amd64 */
8394 }
8396 /*
8397 * mono_arch_skip_single_step:
8398 *
8399 * Modify CTX so the ip is placed after the single step trigger instruction,
8400 * we resume, the instruction is not executed again.
8401 */
8402 void
8404 {
8406 }
8408 /*
8409 * mono_arch_create_seq_point_info:
8410 *
8411 * Return a pointer to a data structure which is used by the sequence
8412 * point implementation in AOTed code.
8413 */
8414 gpointer
8416 {
8420 // FIXME: Add a free function
8424 code);
8431 // FIXME: Optimize the size
8432 info = (SeqPointInfo *)g_malloc0 (sizeof (SeqPointInfo) + (ji->code_size * sizeof (gpointer)));
8440 }
8443 }
8445 void
8447 {
8449 /* Mark that this is a MonoLMFExt */
8452 }
8454 #endif
8456 gboolean
8458 {
8489 }
8490 }
8492 CallInfo*
8494 {
8496 }