| blob | 1ad38235798612ecc88e944cb331c348e57ab0fc |
1 /**
2 * \file
3 * AMD64 backend for the Mono code generator
4 *
5 * Based on mini-x86.c.
6 *
7 * Authors:
8 * Paolo Molaro (lupus@ximian.com)
9 * Dietmar Maurer (dietmar@ximian.com)
10 * Patrik Torstensson
11 * Zoltan Varga (vargaz@gmail.com)
12 * Johan Lorensson (lateralusx.github@gmail.com)
13 *
14 * (C) 2003 Ximian, Inc.
15 * Copyright 2003-2011 Novell, Inc (http://www.novell.com)
16 * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
17 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
18 */
20 #include <string.h>
21 #include <math.h>
22 #include <assert.h>
23 #ifdef HAVE_UNISTD_H
24 #include <unistd.h>
25 #endif
27 #include <mono/metadata/abi-details.h>
28 #include <mono/metadata/appdomain.h>
29 #include <mono/metadata/debug-helpers.h>
30 #include <mono/metadata/threads.h>
31 #include <mono/metadata/profiler-private.h>
32 #include <mono/metadata/mono-debug.h>
33 #include <mono/metadata/gc-internals.h>
34 #include <mono/utils/mono-math.h>
35 #include <mono/utils/mono-mmap.h>
36 #include <mono/utils/mono-memory-model.h>
37 #include <mono/utils/mono-tls.h>
38 #include <mono/utils/mono-hwcap.h>
39 #include <mono/utils/mono-threads.h>
40 #include <mono/utils/unlocked.h>
53 #ifdef MONO_XEN_OPT
55 #else
56 #define optimize_for_xen 0
57 #endif
59 #define IS_IMM32(val) ((((guint64)val) >> 32) == 0)
61 #define IS_REX(inst) (((inst) >= 0x40) && ((inst) <= 0x4f))
63 #ifdef TARGET_WIN32
64 /* Under windows, the calling convention is never stdcall */
65 #define CALLCONV_IS_STDCALL(call_conv) (FALSE)
66 #else
67 #define CALLCONV_IS_STDCALL(call_conv) ((call_conv) == MONO_CALL_STDCALL)
68 #endif
70 /* This mutex protects architecture specific caches */
71 #define mono_mini_arch_lock() mono_os_mutex_lock (&mini_arch_mutex)
72 #define mono_mini_arch_unlock() mono_os_mutex_unlock (&mini_arch_mutex)
75 /* The single step trampoline */
78 /* The breakpoint trampoline */
81 /* Offset between fp and the first argument in the callee */
82 #define ARGS_OFFSET 16
83 #define GP_SCRATCH_REG AMD64_R11
85 /*
86 * AMD64 register usage:
87 * - callee saved registers are used for global register allocation
88 * - %r11 is used for materializing 64 bit constants in opcodes
89 * - the rest is used for local allocation
90 */
92 /*
93 * Floating point comparison results:
94 * ZF PF CF
95 * A > B 0 0 0
96 * A < B 0 0 1
97 * A = B 1 0 0
98 * A > B 0 0 0
99 * UNORDERED 1 1 1
100 */
104 {
122 }
124 }
129 };
134 };
138 {
141 else
143 }
147 {
150 else
152 }
154 static gboolean
156 {
157 #if 0
159 #else
161 #endif
162 }
166 {
167 /* Skip REX */
172 }
176 {
181 }
183 static void
185 {
186 // NOTE: Sometimes code has just been generated, is not running yet,
187 // and has no alignment requirements. Sometimes it could be running while we patch it,
188 // and there are alignment requirements.
189 // FIXME Assert alignment.
193 /* Skip REX */
197 }
200 /* amd64_set_reg_template */
202 }
203 else if ((code [0] == 0x8b) && rex && x86_modrm_mod (code [1]) == 0 && x86_modrm_rm (code [1]) == 5) {
204 /* mov 0(%rip), %dreg */
206 }
208 /* call or jmp *<OFFSET>(%rip) */
210 }
212 /* call or jmp <DISP> */
216 }
217 else
219 }
221 void
223 {
225 }
227 #define DEBUG(a) if (cfg->verbose_level > 1) a
231 {
237 /* Since the same stack slot size is used for all arg */
238 /* types, it needs to be big enough to hold them all */
240 }
245 }
246 }
250 {
256 /* Since the same stack slot size is used for both float */
257 /* types, it needs to be big enough to hold them both */
259 }
261 /* A double register */
264 else
268 }
269 }
272 ARG_CLASS_NO_CLASS,
273 ARG_CLASS_MEMORY,
274 ARG_CLASS_INTEGER,
275 ARG_CLASS_SSE
278 static ArgumentClass
280 {
303 #ifdef TARGET_WIN32
305 #else
307 #endif
317 }
318 /* fall through */
326 }
328 }
331 }
333 /* Merge */
335 ;
342 else
346 }
353 /*
354 * collect_field_info_nested:
355 *
356 * Collect field info from KLASS recursively into FIELDS.
357 */
358 static void
359 collect_field_info_nested (MonoClass *klass, GArray *fields_array, int offset, gboolean pinvoke, gboolean unicode)
360 {
369 collect_field_info_nested (mono_class_from_mono_type (info->fields [i].field->type), fields_array, info->fields [i].offset, pinvoke, unicode);
371 guint32 align;
372 StructFieldInfo f;
380 /* This can happen with .pack directives eg. 'fixed' arrays */
382 /* Replicate the last field to fill out the remaining place, since the code in add_valuetype () needs type information */
387 }
391 }
394 }
395 }
396 }
398 gpointer iter;
406 collect_field_info_nested (mono_class_from_mono_type (field->type), fields_array, field->offset - sizeof (MonoObject), pinvoke, unicode);
409 StructFieldInfo f;
416 }
417 }
418 }
419 }
421 #ifdef TARGET_WIN32
423 /* Windows x64 ABI can pass/return value types in register of size 1,2,4,8 bytes. */
424 #define MONO_WIN64_VALUE_TYPE_FITS_REG(arg_size) (arg_size <= SIZEOF_REGISTER && (arg_size == 1 || arg_size == 2 || arg_size == 4 || arg_size == 8))
426 static gboolean
427 allocate_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, AMD64_Reg_No int_regs [], int int_reg_count, AMD64_XMM_Reg_No float_regs [], int float_reg_count, guint32 *current_int_reg, guint32 *current_float_reg)
428 {
431 assert (arg_info != NULL && int_regs != NULL && float_regs != NULL && current_int_reg != NULL && current_float_reg != NULL);
441 /* Pass parameter in integer register. */
447 /* Pass parameter in float register. */
448 arg_info->pair_storage [0] = (arg_size <= sizeof (gfloat)) ? ArgInFloatSSEReg : ArgInDoubleSSEReg;
452 }
457 }
460 }
463 allocate_parameter_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
464 {
465 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, param_regs, PARAM_REGS, float_param_regs, FLOAT_PARAM_REGS, current_int_reg, current_float_reg);
466 }
469 allocate_return_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
470 {
471 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, return_regs, RETURN_REGS, float_return_regs, FLOAT_RETURN_REGS, current_int_reg, current_float_reg);
472 }
474 static void
475 allocate_storage_for_valuetype_win64 (ArgInfo *arg_info, MonoType *type, gboolean is_return, ArgumentClass arg_class,
477 {
478 /* Windows x64 value type ABI.
479 *
480 * Parameters: https://msdn.microsoft.com/en-us/library/zthk2dkh.aspx
481 *
482 * Integer/Float types smaller than or equals to 8 bytes or porperly sized struct/union (1,2,4,8)
483 * Try pass in register using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8), if no more registers, pass on stack using ArgOnStack as storage and size of parameter(1,2,4,8).
484 * Integer/Float types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
485 * Try to pass pointer in register using ArgValuetypeAddrInIReg, if no more registers, pass pointer on stack using ArgValuetypeAddrOnStack as storage and parameter size of register (8 bytes).
486 *
487 * Return values: https://msdn.microsoft.com/en-us/library/7572ztz4.aspx.
488 *
489 * Integers/Float types smaller than or equal to 8 bytes
490 * Return in corresponding register RAX/XMM0 using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8).
491 * Properly sized struct/unions (1,2,4,8)
492 * Return in register RAX using ArgValuetypeInReg as storage and size of parameter(1,2,4,8).
493 * Types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
494 * Return pointer to allocated stack space (allocated by caller) using ArgValuetypeAddrInIReg as storage and parameter size.
495 */
497 assert (arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
501 /* Parameter cases. */
505 /* First, try to use registers for parameter. If type is struct it can only be passed by value in integer register. */
507 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
508 /* No more registers, fallback passing parameter on stack as value. */
509 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
511 /* Passing value directly on stack, so use size of value. */
517 }
519 /* Fallback to stack, try to pass address to parameter in register. Always use integer register to represent stack address. */
521 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
522 /* No more registers, fallback passing address to parameter on stack. */
523 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
525 /* Passing an address to value on stack, so use size of register as argument size. */
531 }
532 }
534 /* Return value cases. */
538 /* Return value fits into return registers. If type is struct it can only be returned by value in integer register. */
540 allocate_return_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
542 /* Only RAX/XMM0 should be used to return valuetype. */
543 assert ((arg_info->pair_regs[0] == AMD64_RAX && arg_info->pair_regs[1] == ArgNone) || (arg_info->pair_regs[0] == AMD64_XMM0 && arg_info->pair_regs[1] == ArgNone));
545 /* Return value doesn't fit into return register, return address to allocated stack space (allocated by caller and passed as input). */
547 allocate_return_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
549 /* Only RAX should be used to return valuetype address. */
555 }
556 }
557 }
559 static void
560 get_valuetype_size_win64 (MonoClass *klass, gboolean pinvoke, ArgInfo *arg_info, MonoType *type, ArgumentClass *arg_class, guint32 *arg_size)
561 {
565 assert (klass != NULL && arg_info != NULL && type != NULL && arg_class != NULL && arg_size != NULL);
568 /* Calculate argument class type and size of marshalled type. */
572 /* Calculate argument class type and size of managed type. */
574 }
576 /* Windows ABI only handle value types on stack or passed in integer register (if it fits register size). */
580 /* Value type has a size that doesn't seem to fit register according to ABI. Try to used full stack size of type. */
582 }
584 /*
585 * Standard C and C++ doesn't allow empty structs, empty structs will always have a size of 1 byte.
586 * GCC have an extension to allow empty structs, https://gcc.gnu.org/onlinedocs/gcc/Empty-Structures.html.
587 * This cause a little dilemma since runtime build using none GCC compiler will not be compatible with
588 * GCC build C libraries and the other way around. On platforms where empty structs has size of 1 byte
589 * it must be represented in call and cannot be dropped.
590 */
595 }
598 }
600 static void
603 {
606 ArgumentClass arg_class;
608 assert (signature != NULL && arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
613 /* Only drop value type if its not an empty struct as input that must be represented in call */
614 if ((arg_size == 0 && !arg_info->pass_empty_struct) || (arg_info->pass_empty_struct && is_return)) {
618 /* Alocate storage for value type. */
619 allocate_storage_for_valuetype_win64 (arg_info, type, is_return, arg_class, arg_size, current_int_reg, current_float_reg, stack_size);
620 }
621 }
625 static void
627 gboolean is_return,
629 {
630 #ifdef TARGET_WIN32
632 #else
634 /* Keep track of the size used in each quad so we can */
635 /* use the right size when copying args/return vars. */
648 /* We pass and return vtypes of size 8 in a register */
651 }
653 /* If this struct can't be split up naturally into 8-byte */
654 /* chunks (registers), pass it on the stack. */
661 }
662 /*
663 * Collect field information recursively to be able to
664 * handle nested structures.
665 */
675 }
676 }
682 }
685 /* Allways pass in memory */
694 }
698 else
707 /* Always pass in 1 or 2 integer registers */
710 /* Only the simplest cases are supported */
714 }
716 /*
717 * Implement the algorithm from section 3.2.3 of the X86_64 ABI.
718 * The X87 and SSEUP stuff is left out since there are no such types in
719 * the CLR.
720 */
725 }
736 }
741 ArgumentClass class1;
745 else
749 /* Unaligned field */
750 NOT_IMPLEMENTED;
751 }
753 /* Skip fields in other quad */
759 /* How far into this quad this data extends.*/
760 /* (8 is size of quad) */
764 }
765 /* Empty structs have a nonzero size, causing this assert to be hit */
769 }
770 }
774 /* Post merger cleanup */
778 /* Allocate registers */
779 {
785 while (quadsize [1] != 0 && quadsize [1] != 1 && quadsize [1] != 2 && quadsize [1] != 4 && quadsize [1] != 8)
804 else
807 }
818 }
826 }
827 }
831 /* Revert possible register assignments */
838 else
844 }
845 }
847 }
849 /*
850 * get_call_info:
851 *
852 * Obtain information about a call according to the calling convention.
853 * For AMD64 System V, see the "System V ABI, x86-64 Architecture Processor Supplement
854 * Draft Version 0.23" document for more information.
855 * For AMD64 Windows, see "Overview of x64 Calling Conventions",
856 * https://msdn.microsoft.com/en-us/library/ms235286.aspx
857 */
860 {
870 else
879 #ifdef TARGET_WIN32
880 /* Reserve space where the callee can save the argument registers */
882 #endif
884 /* return value */
919 }
923 }
924 /* fall through */
932 }
942 }
945 /*
946 * To simplify get_this_arg_reg () and LLVM integration, emit the vret arg after
947 * the first argument, allowing 'this' to be always passed in the first arg reg.
948 * Also do this if the first argument is a reference type, since virtual calls
949 * are sometimes made using calli without sig->hasthis set, like in the delegate
950 * invoke wrappers.
951 */
953 if ((ret_storage == ArgValuetypeAddrInIReg || ret_storage == ArgGsharedvtVariableInReg) && !is_pinvoke && (sig->hasthis || (sig->param_count > 0 && MONO_TYPE_IS_REFERENCE (mini_get_underlying_type (sig->params [0]))))) {
959 }
964 /* this */
971 }
972 }
978 /* Emit the signature cookie just before the implicit arguments */
980 }
986 #ifdef TARGET_WIN32
987 /* The float param registers and other param registers must be the same index on Windows x64.*/
992 #endif
995 /* We allways pass the sig cookie on the stack for simplicity */
996 /*
997 * Prevent implicit arguments + the sig cookie from being passed
998 * in registers.
999 */
1003 /* Emit the signature cookie just before the implicit arguments */
1005 }
1035 }
1037 /* gsharedvt arguments are passed by ref */
1041 else
1044 }
1045 /* fall through */
1063 /* gsharedvt arguments are passed by ref */
1068 else
1073 }
1074 }
1076 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
1080 /* Emit the signature cookie just before the implicit arguments */
1082 }
1088 }
1090 void
1091 mono_arch_set_native_call_context_args (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1092 {
1104 gpointer ret_storage = interp_cb->frame_arg_to_storage ((MonoInterpFrameHandle)frame, sig, -1);
1106 }
1107 }
1111 gpointer storage;
1118 }
1123 }
1127 }
1131 }
1134 }
1137 /* Split up the value type into the reg pairs */
1151 }
1153 }
1154 }
1155 }
1158 }
1160 void
1161 mono_arch_get_native_call_context_ret (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1162 {
1166 /* No return value */
1172 /* The return values were stored directly at address passed in reg */
1177 gpointer storage;
1184 }
1189 }
1193 /* Reconstruct the value type */
1207 }
1208 storage_tmp++;
1209 }
1211 }
1214 }
1216 done:
1218 }
1220 /*
1221 * mono_arch_get_argument_info:
1222 * @csig: a method signature
1223 * @param_count: the number of parameters to consider
1224 * @arg_info: an array to store the result infos
1225 *
1226 * Gathers information on parameters such as size, alignment and
1227 * padding. arg_info should be large enought to hold param_count + 1 entries.
1228 *
1229 * Returns the size of the argument area on the stack.
1230 */
1231 int
1232 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
1233 {
1238 /* The arguments are saved to a stack area in mono_arch_instrument_prolog */
1241 }
1245 /* FIXME: */
1247 }
1252 }
1256 static gboolean
1258 {
1262 }
1264 #define IS_SUPPORTED_TAILCALL(x) (is_supported_tailcall_helper((x), #x))
1266 gboolean
1267 mono_arch_tailcall_supported (MonoCompile *cfg, MonoMethodSignature *caller_sig, MonoMethodSignature *callee_sig)
1268 {
1274 // Limit stack_usage to 1G. Assume 32bit limits when we move parameters.
1278 // valuetype parameters are address of local
1284 }
1290 }
1292 /*
1293 * Initialize the cpu to execute managed code.
1294 */
1295 void
1297 {
1298 #ifndef _MSC_VER
1299 guint16 fpcw;
1301 /* spec compliance requires running with double precision */
1307 #else
1308 /* TODO: This is crashing on Win64 right now.
1309 * _control87 (_PC_53, MCW_PC);
1310 */
1311 #endif
1312 }
1314 /*
1315 * Initialize architecture specific code.
1316 */
1317 void
1319 {
1323 mono_aot_register_jit_icall ("mono_amd64_throw_corlib_exception", mono_amd64_throw_corlib_exception);
1326 #if defined(MONO_ARCH_GSHAREDVT_SUPPORTED)
1327 mono_aot_register_jit_icall ("mono_amd64_start_gsharedvt_call", mono_amd64_start_gsharedvt_call);
1328 #endif
1332 }
1334 /*
1335 * Cleanup architecture specific code.
1336 */
1337 void
1339 {
1341 }
1343 /*
1344 * This function returns the optimizations supported on this cpu.
1345 */
1346 guint32
1348 {
1358 else
1362 }
1364 #ifdef TARGET_WIN32
1365 /* The current SIMD doesn't support the argument used by a LD_ADDR to be of type OP_VTARG_ADDR. */
1366 /* This will now be used for value types > 8 or of size 3,5,6,7 as dictated by windows x64 value type ABI. */
1367 /* Since OP_VTARG_ADDR needs to be resolved in mono_spill_global_vars and the SIMD implementation optimize */
1368 /* away the LD_ADDR in load_simd_vreg, that will cause an error in mono_spill_global_vars since incorrect opcode */
1369 /* will now have a reference to an argument that won't be fully decomposed. */
1371 #endif
1374 }
1376 /*
1377 * This function test for all SSE functions supported.
1378 *
1379 * Returns a bitmask corresponding to all supported versions.
1380 *
1381 */
1382 guint32
1384 {
1409 }
1411 #ifndef DISABLE_JIT
1413 GList *
1415 {
1423 /* unused vars */
1435 }
1436 }
1441 }
1443 /**
1444 * mono_arch_compute_omit_fp:
1445 * Determine whether the frame pointer can be eliminated.
1446 */
1447 static void
1449 {
1466 /*
1467 * FIXME: Remove some of the restrictions.
1468 */
1477 /*
1478 if (cfg->method->save_lmf)
1479 cfg->arch.omit_fp = FALSE;
1480 */
1494 if (ainfo->storage == ArgOnStack || ainfo->storage == ArgValuetypeAddrInIReg || ainfo->storage == ArgValuetypeAddrOnStack) {
1495 /*
1496 * The stack offset can only be determined when the frame
1497 * size is known.
1498 */
1500 }
1501 }
1509 }
1510 }
1512 GList *
1514 {
1522 /* We use the callee saved registers for global allocation */
1528 #ifdef TARGET_WIN32
1531 #endif
1534 }
1536 /*
1537 * mono_arch_regalloc_cost:
1538 *
1539 * Return the cost, in number of memory references, of the action of
1540 * allocating the variable VMV into a register during global register
1541 * allocation.
1542 */
1543 guint32
1545 {
1549 /* The register is already saved */
1550 /* substract 1 for the invisible store in the prolog */
1552 else
1553 /* push+pop */
1555 }
1557 /*
1558 * mono_arch_fill_argument_info:
1559 *
1560 * Populate cfg->args, cfg->ret and cfg->vret_addr with information about the arguments
1561 * of the method.
1562 */
1563 void
1565 {
1577 /*
1578 * Contrary to mono_arch_allocate_vars (), the information should describe
1579 * where the arguments are at the beginning of the method, not where they can be
1580 * accessed during the execution of the method. The later makes no sense for the
1581 * global register allocator, since a variable can be in more than one location.
1582 */
1599 }
1619 /* Dummy */
1624 }
1625 }
1626 }
1628 void
1630 {
1646 /*
1647 * We use the ABI calling conventions for managed code as well.
1648 * Exception: valuetypes are only sometimes passed or returned in registers.
1649 */
1651 /*
1652 * The stack looks like this:
1653 * <incoming arguments passed on the stack>
1654 * <return value>
1655 * <lmf/caller saved registers>
1656 * <locals>
1657 * <spill area>
1658 * <localloc area> -> grows dynamically
1659 * <params area>
1660 */
1667 /* Locals are allocated backwards from %fp */
1670 }
1674 /* Save all callee-saved registers normally (except RBP, if not already used), and restore them when unwinding through an LMF */
1677 }
1681 /* Reserve space for callee saved registers */
1685 }
1700 /* The register is volatile */
1709 }
1713 }
1716 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
1725 }
1729 }
1730 }
1732 /* Allocate locals */
1733 offsets = mono_allocate_stack_slots (cfg, cfg->arch.omit_fp ? FALSE: TRUE, &locals_stack_size, &locals_stack_align);
1737 }
1744 }
1753 else
1755 //printf ("allocated local %d to ", i); mono_print_tree_nl (ins);
1756 }
1757 }
1764 }
1772 /* FIXME: Allocate volatile arguments to registers */
1776 /*
1777 * Under AMD64, all registers used to pass arguments to functions
1778 * are volatile across calls.
1779 * FIXME: Optimize this.
1780 */
1781 if ((ainfo->storage == ArgInIReg) || (ainfo->storage == ArgInFloatSSEReg) || (ainfo->storage == ArgInDoubleSSEReg) || (ainfo->storage == ArgValuetypeInReg) || (ainfo->storage == ArgGSharedVtInReg))
1794 }
1809 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
1818 }
1822 }
1828 }
1830 NOT_IMPLEMENTED;
1831 }
1833 if (!inreg && (ainfo->storage != ArgOnStack) && (ainfo->storage != ArgValuetypeAddrInIReg) && (ainfo->storage != ArgValuetypeAddrOnStack) && (ainfo->storage != ArgGSharedVtOnStack)) {
1836 /* These arguments are saved to the stack in the prolog */
1840 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (mgreg_t) : sizeof (mgreg_t);
1841 // Arguments are yet supported by the stack map creation code
1842 //cfg->locals_max_stack_offset = MAX (cfg->locals_max_stack_offset, offset);
1844 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (mgreg_t) : sizeof (mgreg_t);
1846 //cfg->locals_min_stack_offset = MIN (cfg->locals_min_stack_offset, offset);
1847 }
1848 }
1849 }
1850 }
1853 }
1855 void
1857 {
1872 if (cinfo->ret.storage == ArgValuetypeAddrInIReg || cinfo->ret.storage == ArgGsharedvtVariableInReg) {
1877 }
1878 }
1887 }
1895 }
1902 }
1903 }
1905 static void
1906 add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, ArgStorage storage, int reg, MonoInst *tree)
1907 {
1937 }
1938 }
1940 static int
1942 {
1945 #if defined(__mono_ilp32__)
1947 #else
1949 #endif
1956 }
1959 }
1961 static void
1963 {
1968 NOT_IMPLEMENTED;
1972 /*
1973 * mono_ArgIterator_Setup assumes the signature cookie is
1974 * passed first and all the arguments which were before it are
1975 * passed on the stack after the signature. So compensate by
1976 * passing a different signature.
1977 */
1978 tmp_sig = mono_metadata_signature_dup_full (m_class_get_image (cfg->method->klass), call->signature);
1981 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1986 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORE_MEMBASE_REG, AMD64_RSP, cinfo->sig_cookie.offset, sig_reg);
1987 }
1989 #ifdef ENABLE_LLVM
1992 {
2004 }
2005 }
2007 LLVMCallInfo*
2009 {
2022 linfo = mono_mempool_alloc0 (cfg->mempool, sizeof (LLVMCallInfo) + (sizeof (LLVMArgInfo) * n));
2024 /*
2025 * LLVM always uses the native ABI while we use our own ABI, the
2026 * only difference is the handling of vtypes:
2027 * - we only pass/receive them in registers in some cases, and only
2028 * in 1 or 2 integer registers.
2029 */
2043 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2044 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2048 }
2054 }
2057 /* Vtype returned using a hidden argument */
2064 }
2071 else
2088 else
2093 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2094 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2098 }
2102 linfo->args [i].pair_storage [j] = arg_storage_to_llvm_arg_storage (cfg, ainfo->pair_storage [j]);
2112 }
2113 }
2116 }
2117 #endif
2119 void
2121 {
2137 /* We shouldn't be called in the llvm case */
2140 }
2142 /*
2143 * Emit all arguments which are passed on the stack to prevent register
2144 * allocation problems.
2145 */
2154 else
2158 //XXX what about ArgGSharedVtOnStack here?
2159 // FIXME tailcall is not always yet initialized.
2166 else
2170 }
2175 }
2176 }
2177 }
2179 /*
2180 * Emit all parameters passed in registers in non-reverse order for better readability
2181 * and to help the optimization in emit_prolog ().
2182 */
2190 }
2201 else
2207 /* Already done */
2219 // FIXME tailcall is not always yet initialized.
2221 /* Already emitted above */
2223 //FIXME what about ArgGSharedVtOnStack ?
2224 // FIXME tailcall is not always yet initialized.
2230 }
2232 guint32 align;
2233 guint32 size;
2238 /*
2239 * Other backends use mono_type_stack_size (), but that
2240 * aligns the size to 8, which is larger than the size of
2241 * the source, leading to reads of invalid memory if the
2242 * source is at the end of address space.
2243 */
2245 }
2248 /* Avoid asserts in emit_memcpy () */
2249 mono_cfg_set_exception_invalid_program (cfg, g_strdup_printf ("Passing an argument of size '%d'.", size));
2250 /* Continue normally */
2251 }
2263 }
2265 }
2268 }
2271 /* Emit the signature cookie just before the implicit arguments */
2273 }
2275 /* Handle the case where there are no implicit arguments */
2282 /*
2283 * Tell the JIT to use a more efficient calling convention: call using
2284 * OP_CALL, compute the result location after the call, and save the
2285 * result there.
2286 */
2288 /*
2289 * Nullify the instruction computing the vret addr to enable
2290 * future optimizations.
2291 */
2296 NOT_IMPLEMENTED;
2297 /*
2298 * The valuetype is in RAX:RDX after the call, need to be copied to
2299 * the stack. Push the address here, so the call instruction can
2300 * access it.
2301 */
2304 /* Prevent it from being register allocated or optimized away */
2306 }
2308 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ((MonoInst*)cfg->arch.vret_addr_loc)->dreg, call->vret_var->dreg);
2309 }
2321 }
2324 }
2329 }
2332 }
2334 void
2336 {
2352 //Pass empty struct value as 0 on platforms representing empty structs as 1 byte.
2354 }
2370 }
2371 }
2376 }
2378 }
2383 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
2407 }
2409 }
2411 /* Pass by addr */
2426 // FIXME: Code growth
2428 }
2432 EMIT_NEW_GC_PARAM_SLOT_LIVENESS_DEF (cfg, def, ainfo->offset, m_class_get_byval_arg (ins->klass));
2433 }
2434 }
2435 }
2437 void
2439 {
2445 else
2451 }
2454 }
2458 #define EMIT_COND_BRANCH(ins,cond,sign) \
2459 if (ins->inst_true_bb->native_offset) { \
2460 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
2461 } else { \
2462 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
2463 if ((cfg->opt & MONO_OPT_BRANCH) && \
2464 x86_is_imm8 (ins->inst_true_bb->max_offset - offset)) \
2465 x86_branch8 (code, cond, 0, sign); \
2466 else \
2467 x86_branch32 (code, cond, 0, sign); \
2468 }
2476 static gboolean
2478 {
2491 }
2504 }
2505 }
2508 }
2510 /*
2511 * mono_arch_dyn_call_prepare:
2512 *
2513 * Return a pointer to an arch-specific structure which contains information
2514 * needed by mono_arch_get_dyn_call_args (). Return NULL if OP_DYN_CALL is not
2515 * supported for SIG.
2516 * This function is equivalent to ffi_prep_cif in libffi.
2517 */
2518 MonoDynCallInfo*
2520 {
2530 }
2533 // FIXME: Preprocess the info to speed up get_dyn_call_args ().
2546 }
2547 }
2548 /* Align to 16 bytes */
2553 }
2555 /*
2556 * mono_arch_dyn_call_free:
2557 *
2558 * Free a MonoDynCallInfo structure.
2559 */
2560 void
2562 {
2567 }
2569 int
2571 {
2574 /* Extend the 'regs' field dynamically */
2576 }
2578 #define PTR_TO_GREG(ptr) (mgreg_t)(ptr)
2579 #define GREG_TO_PTR(greg) (gpointer)(greg)
2581 /*
2582 * mono_arch_get_start_dyn_call:
2583 *
2584 * Convert the arguments ARGS to a format which can be passed to OP_DYN_CALL, and
2585 * store the result into BUF.
2586 * ARGS should be an array of pointers pointing to the arguments.
2587 * RET should point to a memory buffer large enought to hold the result of the
2588 * call.
2589 * This function should be as fast as possible, any work which does not depend
2590 * on the actual values of the arguments should be done in
2591 * mono_arch_dyn_call_prepare ().
2592 * start_dyn_call + OP_DYN_CALL + finish_dyn_call is equivalent to ffi_call in
2593 * libffi.
2594 */
2595 void
2597 {
2611 }
2626 }
2628 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg)
2641 }
2645 greg ++;
2647 }
2654 #if !defined(__mono_ilp32__)
2657 #endif
2660 #if defined(__mono_ilp32__)
2665 #endif
2691 }
2700 } else if (t->type == MONO_TYPE_GENERICINST && mono_class_is_nullable (mono_class_from_mono_type (t))) {
2710 /* The argument pointed to by arg is either a boxed vtype or null */
2714 /* Fall though */
2717 /* Fall through */
2718 }
2737 }
2738 }
2747 }
2749 }
2752 }
2753 }
2754 }
2756 /*
2757 * mono_arch_finish_dyn_call:
2758 *
2759 * Store the result of a dyn call into the return value buffer passed to
2760 * start_dyn_call ().
2761 * This function should be as fast as possible, any work which does not depend
2762 * on the actual values of the arguments should be done in
2763 * mono_arch_dyn_call_prepare ().
2764 */
2765 void
2767 {
2821 /* Fall through */
2822 }
2824 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg) {
2825 /* Nothing to do */
2844 }
2845 }
2846 }
2850 }
2851 }
2853 /* emit an exception if condition is fail */
2854 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
2855 do { \
2856 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
2857 if (tins == NULL) { \
2858 mono_add_patch_info (cfg, code - cfg->native_code, \
2859 MONO_PATCH_INFO_EXC, exc_name); \
2860 x86_branch32 (code, cond, 0, signed); \
2861 } else { \
2862 EMIT_COND_BRANCH (tins, cond, signed); \
2863 } \
2864 } while (0);
2866 #define EMIT_FPCOMPARE(code) do { \
2867 amd64_fcompp (code); \
2868 amd64_fnstsw (code); \
2869 } while (0);
2871 #define EMIT_SSE2_FPFUNC(code, op, dreg, sreg1) do { \
2872 amd64_movsd_membase_reg (code, AMD64_RSP, -8, (sreg1)); \
2873 amd64_fld_membase (code, AMD64_RSP, -8, TRUE); \
2874 amd64_ ##op (code); \
2875 amd64_fst_membase (code, AMD64_RSP, -8, TRUE, TRUE); \
2876 amd64_movsd_reg_membase (code, (dreg), AMD64_RSP, -8); \
2877 } while (0);
2880 emit_call_body (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data)
2881 {
2884 /*
2885 * FIXME: Add support for thunks
2886 */
2887 {
2890 /*
2891 * Indirect calls are expensive so try to make a near call if possible.
2892 * The caller memory is allocated by the code manager so it is
2893 * guaranteed to be at a 32 bit offset.
2894 */
2897 /* The target is in memory allocated using the code manager */
2902 /* The callee might be an AOT method */
2905 /* The target is in malloc-ed memory */
2907 }
2910 /*
2911 * The call might go directly to a native function without
2912 * the wrapper.
2913 */
2919 }
2920 }
2921 }
2934 /*
2935 * This is not really an optimization, but required because the
2936 * generic class init trampolines use R11 to pass the vtable.
2937 */
2939 }
2944 /* No wrapper */
2947 }
2949 /* See the comment in mono_codegen () */
2950 if ((info->name [0] != 'v') || (strstr (info->name, "ves_array_new_va_") == NULL && strstr (info->name, "ves_array_element_address_") == NULL))
2952 }
2953 }
2957 }
2958 }
2959 }
2962 /* These methods are allocated using malloc */
2965 #ifdef MONO_ARCH_NOMAP32BIT
2967 #endif
2968 /* The 64bit XEN kernel does not honour the MAP_32BIT flag. (#522894) */
2975 }
2978 /*
2979 * Align the call displacement to an address divisible by 4 so it does
2980 * not span cache lines. This is required for code patching to work on SMP
2981 * systems.
2982 */
2986 }
2989 }
2995 }
2999 }
3000 }
3005 }
3008 emit_call (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data, gboolean win64_adjust_stack)
3009 {
3010 #ifdef TARGET_WIN32
3013 #endif
3015 #ifdef TARGET_WIN32
3018 #endif
3023 }
3027 {
3035 }
3038 }
3040 #ifndef DISABLE_JIT
3042 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB) || ((opcode) == OP_ISBB_IMM)))
3044 /*
3045 * mono_arch_peephole_pass_1:
3046 *
3047 * Perform peephole opts which should/can be performed before local regalloc
3048 */
3049 void
3051 {
3062 /*
3063 * X86_LEA is like ADD, but doesn't have the
3064 * sreg1==dreg restriction. inst_imm > 0 is needed since LEA sign-extends
3065 * its operand to 64 bit.
3066 */
3069 }
3076 /*
3077 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3078 * the latter has length 2-3 instead of 6 (reverse constant
3079 * propagation). These instruction sequences are very common
3080 * in the initlocals bblock.
3081 */
3083 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3086 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG)) {
3087 /* Continue */
3088 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3090 /* Continue */
3092 /* Continue */
3095 }
3096 }
3097 }
3101 /* OP_COMPARE_IMM (reg, 0)
3102 * -->
3103 * OP_AMD64_TEST_NULL (reg)
3104 */
3113 /*
3114 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3115 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
3116 * -->
3117 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3118 * OP_COMPARE_IMM reg, imm
3119 *
3120 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
3121 */
3128 /* check if we can remove cmp reg,0 with test null */
3131 }
3134 }
3137 }
3138 }
3140 void
3142 {
3150 /* reg = 0 -> XOR (reg, reg) */
3151 /* XOR sets cflags on x86, so we cant do it always */
3156 /* Fall through */
3159 }
3160 }
3162 /*
3163 * Use IXOR to avoid a rex prefix if possible. The cpu will sign extend the
3164 * 0 result into 64 bits.
3165 */
3168 }
3169 /* Fall through */
3174 /*
3175 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3176 * the latter has length 2-3 instead of 6 (reverse constant
3177 * propagation). These instruction sequences are very common
3178 * in the initlocals bblock.
3179 */
3181 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3184 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_REG) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG) || (ins2->opcode == OP_LIVERANGE_START) || (ins2->opcode == OP_GC_LIVENESS_DEF) || (ins2->opcode == OP_GC_LIVENESS_USE)) {
3185 /* Continue */
3186 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3188 /* Continue */
3190 /* Continue */
3193 }
3194 }
3195 }
3205 }
3208 }
3209 }
3211 #define NEW_INS(cfg,ins,dest,op) do { \
3212 MONO_INST_NEW ((cfg), (dest), (op)); \
3213 (dest)->cil_code = (ins)->cil_code; \
3214 mono_bblock_insert_before_ins (bb, ins, (dest)); \
3215 } while (0)
3217 /*
3218 * mono_arch_lowering_pass:
3219 *
3220 * Converts complex opcodes into simpler ones so that each IR instruction
3221 * corresponds to one machine instruction.
3222 */
3223 void
3225 {
3228 /*
3229 * FIXME: Need to add more instructions, but the current machine
3230 * description can't model some parts of the composite instructions like
3231 * cdq.
3232 */
3252 }
3254 #ifndef __mono_ilp32__
3256 #endif
3258 /* Don't generate memindex opcodes (to simplify */
3259 /* read sandboxing) */
3266 }
3268 #ifndef __mono_ilp32__
3270 #endif
3278 }
3280 #ifdef MONO_ARCH_SIMD_INTRINSICS
3301 }
3303 #endif
3306 }
3307 }
3310 }
3312 static const int
3313 branch_cc_table [] = {
3317 };
3319 /* Maps CMP_... constants to X86_CC_... constants */
3320 static const int
3321 cc_table [] = {
3324 };
3326 static const int
3327 cc_signed_table [] = {
3330 };
3332 /*#include "cprop.c"*/
3335 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int sreg, int size, gboolean is_signed)
3336 {
3339 else
3347 }
3351 {
3355 #if defined(TARGET_WIN32)
3357 #elif defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
3360 #endif
3365 /*
3366 * Under Windows:
3367 * If requested stack size is larger than one page,
3368 * perform stack-touch operation
3369 */
3370 /*
3371 * Generate stack probe code.
3372 * Under Windows, it is necessary to allocate one page at a time,
3373 * "touching" stack after each successful sub-allocation. This is
3374 * because of the way stack growth is implemented - there is a
3375 * guard page before the lowest stack page that is currently commited.
3376 * Stack normally grows sequentially so OS traps access to the
3377 * guard page and commits more pages when needed.
3378 */
3399 }
3400 else
3408 }
3412 }
3416 }
3436 }
3438 }
3442 {
3444 guint32 quad;
3446 /* Move return value to the target register */
3447 /* FIXME: do this in the local reg allocator */
3463 }
3467 }
3469 }
3486 /* Load the destination address */
3488 amd64_mov_reg_membase (code, AMD64_RCX, loc->inst_basereg, loc->inst_offset, sizeof(gpointer));
3493 amd64_mov_membase_reg (code, AMD64_RCX, (quad * sizeof(mgreg_t)), cinfo->ret.pair_regs [quad], sizeof(mgreg_t));
3504 NOT_IMPLEMENTED;
3505 }
3506 }
3507 }
3509 }
3512 }
3516 #ifdef TARGET_MACH
3518 #endif
3520 gboolean
3522 {
3523 #ifdef TARGET_MACH
3536 /*
3537 * We're looking for these two instructions:
3538 *
3539 * mov %gs:[offset](,%rdi,8),%rax
3540 * retq
3541 */
3554 /*
3555 * Apple now loads a different version of pthread_getspecific when launched from Xcode
3556 * For that version we're looking for these instructions:
3557 *
3558 * pushq %rbp
3559 * movq %rsp, %rbp
3560 * mov %gs:[offset](,%rdi,8),%rax
3561 * popq %rbp
3562 * retq
3563 */
3581 }
3585 #elif defined(TARGET_ANDROID)
3587 #else
3591 #endif
3592 }
3594 int
3596 {
3597 #ifdef TARGET_OSX
3599 #else
3602 #endif
3603 }
3605 /*
3606 * \param code buffer to store code to
3607 * \param dreg hard register where to place the result
3608 * \param tls_offset offset info
3609 * \return a pointer to the end of the stored code
3610 *
3611 * mono_amd64_emit_tls_get emits in \p code the native code that puts in
3612 * the dreg register the item in the thread local storage identified
3613 * by tls_offset.
3614 */
3617 {
3618 #ifdef TARGET_WIN32
3626 /* Load TEB->TlsExpansionSlots */
3634 }
3635 #elif defined(TARGET_MACH)
3638 #else
3646 }
3647 #endif
3649 }
3653 {
3654 #ifdef TARGET_WIN32
3656 #elif defined(TARGET_MACH)
3659 #else
3663 #endif
3665 }
3667 /*
3668 * emit_setup_lmf:
3669 *
3670 * Emit code to initialize an LMF structure at LMF_OFFSET.
3671 */
3674 {
3675 /*
3676 * The ip field is not set, the exception handling code will obtain it from the stack location pointed to by the sp field.
3677 */
3678 /*
3679 * sp is saved right before calls but we need to save it here too so
3680 * async stack walks would work.
3681 */
3682 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
3683 /* Save rbp */
3684 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), AMD64_RBP, 8);
3686 mono_emit_unwind_op_offset (cfg, code, AMD64_RBP, - (cfa_offset - (lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp))));
3688 /* These can't contain refs */
3689 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, previous_lmf), SLOT_NOREF);
3690 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), SLOT_NOREF);
3691 /* These are handled automatically by the stack marking code */
3692 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), SLOT_NOREF);
3695 }
3697 #ifdef TARGET_WIN32
3699 #define TEB_LAST_ERROR_OFFSET 0x068
3703 {
3704 /* Threads last error value is located in TEB_LAST_ERROR_OFFSET. */
3709 }
3711 #else
3715 {
3717 }
3719 #endif
3721 /* benchmark and set based on cpu */
3722 #define LOOP_ALIGNMENT 8
3723 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
3725 #ifndef DISABLE_JIT
3729 {
3730 #ifndef TARGET_WIN32
3733 else
3735 #endif
3737 }
3740 amd64_handle_varargs_call (MonoCompile *cfg, guint8 *code, MonoCallInst *call, gboolean free_rax)
3741 {
3742 #ifdef TARGET_WIN32
3744 #else
3745 /*
3746 * The AMD64 ABI forces callers to know about varargs.
3747 */
3750 // deliberatly nothing -- but nreg = 0 and do not return
3751 } else if (cfg->method->wrapper_type == MONO_WRAPPER_MANAGED_TO_NATIVE && m_class_get_image (cfg->method->klass) != mono_defaults.corlib) {
3752 /*
3753 * Since the unmanaged calling convention doesn't contain a
3754 * 'vararg' entry, we have to treat every pinvoke call as a
3755 * potential vararg call.
3756 */
3761 }
3766 }
3768 #endif
3769 }
3771 void
3773 {
3778 /* Fix max_offset estimate for each successor bb */
3785 }
3786 }
3790 /* set alignment depending on cpu */
3793 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
3797 }
3798 }
3807 if (mono_break_at_bb_method && mono_method_desc_full_match (mono_break_at_bb_method, cfg->method) && bb->block_num == mono_break_at_bb_bb_num)
3844 /* In AMD64 NaCl, pointers are 4 bytes, */
3845 /* so STORE_* != STOREI8_*. Likewise below. */
3847 amd64_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, sizeof(gpointer));
3856 /* In NaCl, this could be a PCONST type, which could */
3857 /* mean a pointer type was copied directly into the */
3858 /* lower 32-bits of inst_imm, so for InvalidPtr==-1 */
3859 /* the value would be 0x00000000FFFFFFFF which is */
3860 /* not proper for an imm32 unless you cast it. */
3862 amd64_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, (gint32)ins->inst_imm, sizeof(gpointer));
3869 #ifdef __mono_ilp32__
3870 /* In ILP32, pointers are 4 bytes, so separate these */
3871 /* cases, use literal 8 below where we really want 8 */
3875 #endif
3877 // FIXME: Decompose this earlier
3883 }
3890 // FIXME: Decompose this earlier
3896 }
3903 /* For NaCl, pointers are 4 bytes, so separate these */
3904 /* cases, use literal 8 below where we really want 8 */
3910 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, sizeof(gpointer));
3913 /* Use literal 8 instead of sizeof pointer or */
3914 /* register, we really want 8 for this opcode */
3925 /* The cpu zero extends the result into 64 bits */
3926 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE, 4);
3932 /* The cpu zero extends the result into 64 bits */
3933 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE, 4);
3960 /* Clean out the upper word */
3971 #if defined(__mono_ilp32__)
3972 /* Comparison of pointer immediates should be 4 bytes to avoid sign-extend problems */
3976 #endif
4008 /* FIXME: Make a 64 version too */
4009 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4013 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4017 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4021 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4025 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4028 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4031 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4034 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4040 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4059 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4062 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4065 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4069 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4072 amd64_alu_membase8_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4098 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4101 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4104 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4110 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4115 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4119 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4123 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4127 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4131 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4161 /* Load ss_tramp_var */
4162 /* This is equal to &ss_trampoline */
4164 /* Load the trampoline address */
4166 /* Call it if it is non-null */
4172 }
4174 /*
4175 * This is the address which is saved in seq points,
4176 */
4181 guint32 val;
4185 /* Load info var */
4188 /* Load the info->bp_addrs [offset], which is either NULL or the address of the breakpoint trampoline */
4193 /* Call the trampoline */
4200 /*
4201 * Emit a test+branch against a constant, the constant will be overwritten
4202 * by mono_arch_set_breakpoint () to cause the test to fail.
4203 */
4211 /* Load bp_tramp_var */
4212 /* This is equal to &bp_trampoline */
4214 /* Call the trampoline */
4217 }
4218 /*
4219 * Add an additional nop so skipping the bp doesn't cause the ip to point
4220 * to another IL offset.
4221 */
4224 }
4277 /* MOV r1, r2 */
4278 /* ADD r1, r1 */
4284 /* LEA r1, [r2 + r2*2] */
4288 /* LEA r1, [r2 + r2*4] */
4292 /* LEA r1, [r2 + r2*2] */
4293 /* ADD r1, r1 */
4298 /* LEA r1, [r2 + r2*8] */
4302 /* LEA r1, [r2 + r2*4] */
4303 /* ADD r1, r1 */
4308 /* LEA r1, [r2 + r2*2] */
4309 /* SHL r1, 2 */
4314 /* LEA r1, [r2 + r2*4] */
4315 /* LEA r1, [r1 + r1*4] */
4320 /* LEA r1, [r2 + r2*4] */
4321 /* SHL r1, 2 */
4322 /* LEA r1, [r1 + r1*4] */
4330 }
4332 }
4335 /* Regalloc magic makes the div/rem cases the same */
4343 }
4354 }
4365 }
4376 }
4509 /* the mul operation and the exception check should most likely be split */
4512 /*g_assert (ins->sreg2 == X86_EAX);
4513 g_assert (ins->dreg == X86_EAX);*/
4519 /* no need to save since we're going to store to it anyway */
4523 }
4526 }
4531 }
4535 }
4537 /* save before the check since pop and mov don't change the flags */
4546 }
4573 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
4597 /* This needs to operate on 64 bit values */
4598 amd64_cmov_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, ins->sreg2);
4612 else
4633 }
4635 }
4640 }
4643 // This opcode helps compute sizes, i.e.
4644 // of the subsequent OP_TAILCALL, but contributes no code.
4662 // FIXME hardcoding RAX here is not ideal.
4678 // FIXME Patch data instead of code.
4684 }
4685 }
4687 /* Restore callee saved registers */
4693 }
4698 // FIXME:
4700 NOT_IMPLEMENTED;
4703 /* Copy arguments on the stack to our argument area */
4704 // FIXME use rep mov for constant code size, before nonvolatiles
4705 // restored, first saving rsi, rdi into volatiles
4709 }
4711 #ifdef TARGET_WIN32
4715 #else
4717 #endif
4718 }
4720 #ifdef TARGET_WIN32
4721 // Redundant REX byte indicates a tailcall to the native unwinder. It means nothing to the processor.
4722 // https://github.com/dotnet/coreclr/blob/966dabb5bb3c4bf1ea885e1e8dc6528e8c64dc4f/src/unwinder/amd64/unwinder_amd64.cpp#L1394
4723 // FIXME This should be jmp rip+32 for AOT direct to same assembly.
4724 // FIXME This should be jmp [rip+32] for AOT direct to not-same assembly (through data).
4725 // FIXME This should be jmp [rip+32] for JIT direct -- patch data instead of code.
4726 // This is only close to ideal for tailcall_membase, and even then it should
4727 // have a more dynamic register allocation.
4730 #else
4731 // NT does not have varargs rax use, and NT ABI does not have red zone.
4732 // Use red-zone mov/jmp instead of push/ret to preserve call/ret speculation stack.
4733 // FIXME Just like NT the direct cases are are not ideal.
4737 #endif
4741 }
4743 /* ensure ins->sreg1 is not NULL */
4750 }
4763 else
4781 }
4811 /* r11 = args buffer filled by mono_arch_get_dyn_call_args () */
4813 /* r10 = ftn */
4816 /* Save args buffer */
4819 /* Set fp arg regs */
4820 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, has_fp), sizeof (mgreg_t));
4825 amd64_sse_movsd_reg_membase (code, i, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + (i * sizeof (double)));
4828 /* Allocate param area */
4829 /* This doesn't need to be freed since OP_DYN_CALL is never called in a loop */
4830 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, nstack_args), 8);
4833 /* Set stack args */
4834 /* rax/rcx/rdx/r8/r9 is scratch */
4839 amd64_mov_reg_membase (code, limit_reg, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, nstack_args), 8);
4841 amd64_lea_membase (code, src_reg, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + ((PARAM_REGS) * sizeof(mgreg_t)));
4857 /* Set argument registers */
4859 amd64_mov_reg_membase (code, param_regs [i], AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + (i * sizeof(mgreg_t)), sizeof(mgreg_t));
4861 /* Make the call */
4867 /* Save result */
4870 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs), AMD64_XMM0);
4871 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + sizeof (double), AMD64_XMM1);
4873 }
4876 amd64_mov_membase_reg (code, lmf_var->inst_basereg, lmf_var->inst_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
4878 }
4903 else
4914 }
4920 amd64_test_membase_imm_size (code, ins->sreg1, MONO_STRUCT_OFFSET (MonoVTable, initialized), 1, 1);
4924 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_generic_class_init", FALSE);
4930 }
4933 amd64_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
4942 /* keep alignment */
4970 }
4974 }
4978 }
4986 }
4994 }
4996 /* Align stack */
5000 /*
5001 * ins->inst_eh_blocks and bb->clause_holes are part of same GList.
5002 * Holes from bb->clause_holes will be added separately for the entire
5003 * basic block. Add only the rest of them.
5004 */
5007 /* Restore stack alignment */
5011 /* Even though we're saving RSP, use sizeof */
5012 /* gpointer because spvar is of type IntPtr */
5013 /* see: mono_create_spvar_for_region */
5015 amd64_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, AMD64_RSP, sizeof(gpointer));
5020 amd64_alu_reg_imm (code, X86_SUB, AMD64_RSP, ALIGN_TO (cfg->param_area, MONO_ARCH_FRAME_ALIGNMENT));
5021 }
5023 }
5026 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5029 }
5032 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5033 /* The local allocator will put the result into RAX */
5036 }
5045 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
5046 //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
5047 //break;
5055 else
5057 }
5083 amd64_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
5106 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], (const char *)ins->inst_p1);
5123 /* floating point opcodes */
5129 }
5133 }
5135 }
5142 else
5144 }
5150 }
5152 }
5163 /* This requires a double->single conversion */
5165 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
5166 }
5174 }
5182 }
5193 }
5204 }
5266 /* Based on gcc code */
5270 /* Positive case */
5275 /* Negative case */
5276 /* Save to the red zone */
5286 /* Restore */
5291 }
5316 }
5349 }
5364 }
5390 }
5443 /*
5444 * The two arguments are swapped because the fbranch instructions
5445 * depend on this for the non-sse case to work.
5446 */
5450 /*
5451 * FIXME: Get rid of this.
5452 * The two arguments are swapped because the fbranch instructions
5453 * depend on this for the non-sse case to work.
5454 */
5459 /* zeroing the register at the start results in
5460 * shorter and faster code (we can also remove the widening op)
5461 */
5480 }
5482 }
5485 /* zeroing the register at the start results in
5486 * shorter and faster code (we can also remove the widening op)
5487 */
5502 }
5504 }
5514 }
5517 /* zeroing the register at the start results in
5518 * shorter and faster code (we can also remove the widening op)
5519 */
5531 }
5533 }
5543 }
5577 }
5602 }
5609 }
5611 }
5637 }
5659 }
5661 }
5668 }
5670 /* Branch if C013 != 100 */
5671 /* branch if !ZF or (PF|CF) */
5688 /* skip branch if C1=1 */
5691 /* branch if (C0 | C3) = 1 */
5697 }
5700 /* Branch if C013 == 100 or 001 */
5703 /* skip branch if C1=1 */
5706 /* branch if (C0 | C3) = 1 */
5710 }
5712 /* Branch if C013 == 000 */
5716 /* Branch if C013=000 or 100 */
5719 /* skip branch if C1=1 */
5722 /* branch if C0=0 */
5726 }
5728 /* Branch if C013 != 001 */
5733 /* Transfer value to the fp stack */
5751 }
5755 }
5760 }
5772 /* dreg contains the old value, add with sreg2 value */
5779 }
5784 /* LOCK prefix is implied. */
5789 }
5792 guint32 size;
5796 else
5799 /*
5800 * See http://msdn.microsoft.com/en-us/magazine/cc302329.aspx for
5801 * an explanation of how this works.
5802 */
5813 }
5817 }
5821 }
5825 }
5829 }
5833 }
5837 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, ins->opcode == OP_ATOMIC_LOAD_U4 ? 4 : 8);
5839 }
5846 }
5848 }
5852 }
5880 }
5887 }
5893 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
5894 }
5899 }
5910 }
5916 gpointer card_table_mask;
5923 /*If either point to the stack we can simply avoid the WB. This happens due to
5924 * optimizations revealing a stack store that was not visible when op_cardtable was emited.
5925 */
5929 /*
5930 * We need one register we can clobber, we choose EDX and make sreg1
5931 * fixed EAX to work around limitations in the local register allocator.
5932 * sreg2 might get allocated to EDX, but that is not a problem since
5933 * we use it before clobbering EDX.
5934 */
5937 /*
5938 * This is the code we produce:
5939 *
5940 * edx = value
5941 * edx >>= nursery_shift
5942 * cmp edx, (nursery_start >> nursery_shift)
5943 * jne done
5944 * edx = ptr
5945 * edx >>= card_table_shift
5946 * edx += cardtable
5947 * [edx] = 1
5948 * done:
5949 */
5956 /*
5957 * The value we need to compare against is 64 bits, so we need
5958 * another spare register. We use RBX, which we save and
5959 * restore.
5960 */
5967 }
5969 }
5975 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GC_CARD_TABLE_ADDR, card_table);
5983 }
5984 #ifdef MONO_ARCH_SIMD_INTRINSICS
5985 /* TODO: Some of these IR opcodes are marked as no clobber when they indeed do. */
6375 /*TODO: This is appart of the sse spec but not added
6376 case OP_PSARQ:
6377 amd64_sse_psraq_reg_imm (code, ins->dreg, ins->inst_imm);
6378 break;
6379 case OP_PSARQ_REG:
6380 amd64_sse_psraq_reg_reg (code, ins->dreg, ins->sreg2);
6381 break;
6382 */
6427 }
6438 /*amd64_movd_reg_xreg_size (code, ins->dreg, ins->sreg1, 4);
6439 if (ins->inst_c0)
6440 amd64_shift_reg_imm_size (code, X86_SHR, ins->dreg, 16, 4);*/
6447 else
6457 /*sreg1 is the extracted ireg (scratch)
6458 /sreg2 is the to be inserted ireg (scratch)
6459 /dreg is the xreg to receive the value*/
6461 /*clear the bits from the extracted word*/
6463 /*shift the value to insert if needed*/
6466 /*join them together*/
6479 else
6488 else
6495 else
6503 else
6511 else
6515 }
6520 else
6544 /*FIXME the peephole pass should have killed this*/
6579 }
6601 }
6608 #endif
6611 printf ("R%d START=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6614 }
6617 printf ("R%d END=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6620 }
6628 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_threads_state_poll", FALSE);
6631 }
6648 amd64_mov_membase_reg (code, ins->sreg1, MONO_STRUCT_OFFSET (MonoContext, gregs) + i * sizeof (mgreg_t), i, sizeof (mgreg_t));
6653 }
6659 }
6660 }
6663 }
6667 void
6669 {
6670 /* The signature doesn't matter */
6671 mono_register_jit_icall (mono_amd64_throw_exception, "mono_amd64_throw_exception", mono_create_icall_signature ("void"), TRUE);
6673 #if defined(TARGET_WIN32) || defined(HOST_WIN32)
6674 #if _MSC_VER
6677 #else
6680 #endif
6681 #endif
6682 }
6684 void
6685 mono_arch_patch_code_new (MonoCompile *cfg, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gpointer target)
6686 {
6689 /*
6690 * Debug code to help track down problems where the target of a near call is
6691 * is not valid.
6692 */
6708 }
6709 }
6710 }
6713 }
6715 #ifndef DISABLE_JIT
6717 static int
6719 {
6731 }
6733 /*
6734 * This macro is used for testing whenever the unwinder works correctly at every point
6735 * where an async exception can happen.
6736 */
6737 /* This will generate a SIGSEGV at the given point in the code */
6738 #define async_exc_point(code) do { \
6739 if (mono_inject_async_exc_method && mono_method_desc_full_match (mono_inject_async_exc_method, cfg->method)) { \
6740 if (cfg->arch.async_point_count == mono_inject_async_exc_pos) \
6741 amd64_mov_reg_mem (code, AMD64_RAX, 0, 4); \
6742 cfg->arch.async_point_count ++; \
6743 } \
6744 } while (0)
6746 #ifdef TARGET_WIN32
6748 emit_prolog_setup_sp_win64 (MonoCompile *cfg, guint8 *code, int alloc_size, int *cfa_offset_input)
6749 {
6752 /* Allocate windows stack frame using stack probing method */
6758 }
6765 }
6767 // NOTE, in a standard win64 prolog the alloc unwind info is always emitted, but since mono
6768 // uses a frame pointer with negative offsets and a standard win64 prolog assumes positive offsets, we can't
6769 // emit sp alloc unwind metadata since the native OS unwinder will incorrectly restore sp. Excluding the alloc
6770 // metadata on the other hand won't give the OS the information so it can just restore the frame pointer to sp and
6771 // that will retrieve the expected results.
6774 }
6779 }
6782 guint8 *
6784 {
6803 /* Amount of stack space allocated by register saving code */
6806 /* Offset between RSP and the CFA */
6809 /*
6810 * The prolog consists of the following parts:
6811 * FP present:
6812 * - push rbp
6813 * - mov rbp, rsp
6814 * - save callee saved regs using moves
6815 * - allocate frame
6816 * - save rgctx if needed
6817 * - save lmf if needed
6818 * FP not present:
6819 * - allocate frame
6820 * - save rgctx if needed
6821 * - save lmf if needed
6822 * - save callee saved regs using moves
6823 */
6825 // CFA = sp + 8
6828 // IP saved at CFA - 8
6839 /* These are handled automatically by the stack marking code */
6846 }
6848 /* The param area is always at offset 0 from sp */
6849 /* This needs to be allocated here, since it has to come after the spill area */
6852 // FIXME:
6855 }
6858 /*
6859 * On enter, the stack is misaligned by the pushing of the return
6860 * address. It is either made aligned by the pushing of %rbp, or by
6861 * this.
6862 */
6866 /* Mark the padding slot as NOREF */
6868 }
6872 /* Mark the padding slot as NOREF */
6874 }
6877 }
6883 /* Allocate stack frame */
6884 #ifdef TARGET_WIN32
6886 #else
6888 /* See mono_emit_stack_alloc */
6889 #if defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
6892 /* Use a loop for large sizes */
6906 }
6910 }
6912 guint32 required_code_size = ((remaining_size / 0x1000) + 1) * 11; /*11 is the max size of amd64_alu_reg_imm + amd64_test_membase_reg*/
6920 }
6925 }
6932 }
6933 }
6934 #else
6940 }
6941 #endif
6942 }
6943 #endif
6945 /* Stack alignment check */
6946 #if 0
6947 {
6957 }
6958 #endif
6961 /* Fill the stack frame with a dummy value to force deterministic behavior */
6963 /* Save registers to the red zone */
6977 }
6979 /* Save LMF */
6983 /* Save callee saved registers */
6986 /* Save caller saved registers after sp is adjusted */
6987 /* The registers are saved at the bottom of the frame */
6988 /* FIXME: Optimize this so the regs are saved at the end of the frame in increasing order */
6990 /* The registers are saved just below the saved rbp */
6992 }
7000 /* These are handled automatically by the stack marking code */
7004 // FIXME: GC
7005 }
7009 }
7010 }
7012 /* store runtime generic context */
7017 amd64_mov_membase_reg (code, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, sizeof(gpointer));
7019 mono_add_var_location (cfg, cfg->rgctx_var, TRUE, MONO_ARCH_RGCTX_REG, 0, 0, code - cfg->native_code);
7020 mono_add_var_location (cfg, cfg->rgctx_var, FALSE, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, code - cfg->native_code, 0);
7021 }
7023 /* compute max_length in order to use short forward jumps */
7030 /* max alignment for loops */
7036 }
7038 /* Take prolog and epilog instrumentation into account */
7043 }
7044 }
7052 /* Save volatile arguments to the stack */
7054 amd64_mov_membase_reg (code, cfg->vret_addr->inst_basereg, cfg->vret_addr->inst_offset, cinfo->ret.reg, 8);
7055 }
7057 /* Keep this in sync with emit_load_volatile_arguments */
7064 /* Unused arguments */
7067 /* Save volatile arguments to the stack */
7073 /* FIXME: I1 etc */
7074 /*
7075 if (stack_offset & 0x1)
7076 size = 1;
7077 else if (stack_offset & 0x2)
7078 size = 2;
7079 else if (stack_offset & 0x4)
7080 size = 4;
7081 else
7082 size = 8;
7083 */
7086 /*
7087 * Save the original location of 'this',
7088 * get_generic_info_from_stack_frame () needs this to properly look up
7089 * the argument value during the handling of async exceptions.
7090 */
7093 mono_add_var_location (cfg, ins, FALSE, ins->inst_basereg, ins->inst_offset, code - cfg->native_code, 0);
7094 }
7096 }
7107 amd64_mov_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad], sizeof(mgreg_t));
7110 amd64_movss_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad]);
7113 amd64_movsd_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad]);
7119 }
7120 }
7124 amd64_mov_membase_reg (code, ins->inst_left->inst_basereg, ins->inst_left->inst_offset, ainfo->pair_regs [0], sizeof (gpointer));
7133 }
7135 /* Argument allocated to (non-volatile) register */
7145 }
7150 }
7151 }
7152 }
7160 }
7162 /*
7163 * Optimize the common case of the first bblock making a call with the same
7164 * arguments as the method. This works because the arguments are still in their
7165 * original argument registers.
7166 * FIXME: Generalize this
7167 */
7177 }
7190 if (((next->opcode == OP_LOAD_MEMBASE) || (next->opcode == OP_LOADI4_MEMBASE)) && next->inst_basereg == ins->inst_basereg && next->inst_offset == ins->inst_offset) {
7197 /* Only continue if the instruction doesn't change argument regs */
7200 }
7201 }
7203 }
7206 }
7208 /* Argument allocated to (non-volatile) register */
7214 }
7218 }
7219 }
7223 //next = mono_inst_list_next (&next->node, &first_bb->ins_list);
7226 }
7227 }
7228 }
7233 /* Initialize seq_point_info_var */
7235 /* Initialize the variable from a GOT slot */
7236 /* Same as OP_AOTCONST */
7237 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_SEQ_POINT_INFO, cfg->method);
7241 }
7244 /* Initialize ss_tramp_var */
7249 amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, MONO_STRUCT_OFFSET (SeqPointInfo, ss_tramp_addr), 8);
7252 /* Initialize ss_tramp_var */
7259 /* Initialize bp_tramp_var */
7265 }
7266 }
7271 }
7273 void
7275 {
7290 /* Mark the start of the epilog */
7293 /* Save the uwind state which is needed by the out-of-line code */
7299 /* the code restoring the registers must be kept in sync with OP_TAILCALL */
7303 amd64_mov_reg_membase (code, AMD64_RBP, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), 8);
7305 /*
7306 * emit_setup_lmf () marks RBP as saved, we have to mark it as same value here before clearing up the stack
7307 * since its stack slot will become invalid.
7308 */
7310 }
7312 /* Restore callee saved regs */
7315 /* Restore only used_int_regs, not arch.saved_iregs */
7316 #if defined(MONO_SUPPORT_TASKLETS)
7318 #else
7320 #endif
7325 }
7327 }
7328 }
7330 /* Load returned vtypes into registers if needed */
7339 amd64_mov_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_size [quad]);
7342 amd64_movss_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)));
7345 amd64_movsd_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)));
7351 }
7352 }
7353 }
7358 }
7360 #ifdef TARGET_WIN32
7364 #else
7367 #endif
7368 }
7373 /* Restore the unwind state to be the same as before the epilog */
7377 }
7379 void
7381 {
7389 /* Compute needed space */
7399 }
7403 /* add code to raise exceptions */
7410 guint32 throw_ip;
7417 //x86_breakpoint (code);
7418 /* Find a throw sequence for the same exception class */
7426 }
7435 }
7436 amd64_mov_reg_imm (code, AMD64_ARG_REG1, m_class_get_type_token (exc_class) - MONO_TOKEN_TYPE_DEF);
7440 code = emit_call_body (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_arch_throw_corlib_exception");
7448 nthrows ++;
7449 }
7450 }
7452 }
7454 /* do nothing */
7456 }
7458 }
7460 /* Handle relocations with RIP relative addressing */
7469 guint32 target_pos;
7471 /* The SSE opcodes require a 16 byte alignment */
7478 }
7482 }
7490 }
7496 }
7503 /*loading is faster against aligned addresses.*/
7509 /*alu_op [rex] modr/m imm32 - 7 or 8 bytes */
7512 else
7520 }
7523 }
7532 ;
7534 }
7535 }
7537 }
7540 }
7546 {
7552 /* Keep this in sync with mono_arch_get_argument_info */
7555 /* Allocate a new area on the stack and save arguments there */
7574 }
7575 }
7576 }
7589 }
7592 SAVE_NONE,
7593 SAVE_STRUCT,
7594 SAVE_EAX,
7595 SAVE_EAX_EDX,
7596 SAVE_XMM
7597 };
7601 {
7609 /* special case string .ctor icall */
7612 else
7627 }
7628 /* Fall through */
7635 }
7637 /* Save the result and copy it into the proper argument register */
7641 /* Align stack */
7647 /* FIXME: */
7654 /* Align stack */
7656 /*
7657 * The result is already in the proper argument register so no copying
7658 * needed.
7659 */
7665 }
7667 /* Set %al since this is a varargs call */
7673 /* Restore result */
7680 /* FIXME: */
7691 }
7696 }
7698 MONO_NEVER_INLINE
7699 void
7701 {
7702 /* call/ret required (or likely other control transfer) */
7703 }
7705 void
7707 {
7708 }
7710 gboolean
7712 {
7714 }
7716 /*
7717 * Determine whenever the trap whose info is in SIGINFO is caused by
7718 * integer overflow.
7719 */
7720 gboolean
7722 {
7723 MonoContext ctx;
7726 gint64 value;
7734 rip ++;
7735 }
7736 else
7739 if ((rip [0] == 0xf7) && (x86_modrm_mod (rip [1]) == 0x3) && (x86_modrm_reg (rip [1]) == 0x7)) {
7740 /* idiv REG */
7747 }
7750 }
7752 guint32
7754 {
7756 }
7758 /**
7759 * \return TRUE if no sw breakpoint was present.
7760 *
7761 * Copy \p size bytes from \p code - \p offset to the buffer \p buf. If the debugger inserted software
7762 * breakpoints in the original code, they are removed in the copy.
7763 */
7764 gboolean
7765 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
7766 {
7767 /*
7768 * If method_start is non-NULL we need to perform bound checks, since we access memory
7769 * at code - offset we could go before the start of the method and end up in a different
7770 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
7771 * instead.
7772 */
7779 }
7781 }
7783 int
7785 {
7787 }
7789 gpointer
7791 {
7793 }
7795 #define MAX_ARCH_DELEGATE_PARAMS 10
7797 static gpointer
7799 {
7807 start = code = (guint8 *)mono_global_codeman_reserve (64 + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7809 /* Replace the this argument with the target */
7811 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7815 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
7817 start = code = (guint8 *)mono_global_codeman_reserve (64 + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7822 /* We have to shift the arguments left */
7825 #ifdef TARGET_WIN32
7828 else
7830 #else
7832 #endif
7833 }
7836 }
7838 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
7839 }
7844 *info = mono_tramp_info_create ("delegate_invoke_impl_has_target", start, code - start, NULL, unwind_ops);
7849 }
7855 else
7860 }
7861 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL));
7864 }
7866 #define MAX_VIRTUAL_DELEGATE_OFFSET 32
7868 static gpointer
7870 {
7879 start = code = (guint8 *)mono_global_codeman_reserve (size + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7883 /* Replace the this argument with the target */
7885 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7888 /* Load the IMT reg */
7889 amd64_mov_reg_membase (code, MONO_ARCH_IMT_REG, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, method), 8);
7890 }
7892 /* Load the vtable */
7893 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_ARG_REG1, MONO_STRUCT_OFFSET (MonoObject, vtable), 8);
7895 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL));
7902 }
7904 /*
7905 * mono_arch_get_delegate_invoke_impls:
7906 *
7907 * Return a list of MonoTrampInfo structures for the delegate invoke impl
7908 * trampolines.
7909 */
7910 GSList*
7912 {
7923 }
7928 }
7935 }
7938 }
7940 gpointer
7942 {
7949 /* FIXME: Support more cases */
7965 }
7990 }
7995 }
7998 }
8000 gpointer
8001 mono_arch_get_delegate_virtual_invoke_impl (MonoMethodSignature *sig, MonoMethod *method, int offset, gboolean load_imt_reg)
8002 {
8004 gpointer code;
8010 }
8012 void
8014 {
8015 #if !defined(HOST_WIN32) && defined(MONO_XEN_OPT)
8017 #endif
8018 }
8020 void
8022 {
8023 }
8025 #define CMP_SIZE (6 + 1)
8026 #define CMP_REG_REG_SIZE (4 + 1)
8027 #define BR_SMALL_SIZE 2
8028 #define BR_LARGE_SIZE 6
8029 #define MOV_REG_IMM_SIZE 10
8030 #define MOV_REG_IMM_32BIT_SIZE 6
8031 #define JUMP_REG_SIZE (2 + 1)
8033 static int
8035 {
8040 }
8042 /*
8043 * LOCKING: called with the domain lock held
8044 */
8045 gpointer
8046 mono_arch_build_imt_trampoline (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
8047 gpointer fail_tramp)
8048 {
8062 else
8064 }
8070 else
8072 }
8081 else
8084 /* with assert below:
8085 * item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
8086 */
8087 }
8088 }
8092 else
8096 }
8098 }
8100 code = (guint8 *)mono_method_alloc_generic_virtual_trampoline (domain, size + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
8101 else
8116 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8120 }
8121 }
8128 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8130 }
8137 }
8139 /* enable the commented code to assert on wrong method */
8140 #if 0
8142 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8146 }
8149 /* See the comment below about R10 */
8150 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8155 #else
8156 /* We're using R10 (MONO_ARCH_IMT_SCRATCH_REG) here because R11 (MONO_ARCH_IMT_REG)
8157 needs to be preserved. R10 needs
8158 to be preserved for calls which
8159 require a runtime generic context,
8160 but interface calls don't. */
8161 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8163 #endif
8164 }
8167 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof (gpointer));
8171 }
8175 else
8177 }
8179 }
8180 /* patch the branches to get to the target items */
8186 }
8187 }
8188 }
8193 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
8195 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_IMT_TRAMPOLINE, NULL));
8197 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
8200 }
8202 MonoMethod*
8204 {
8206 }
8208 MonoVTable*
8210 {
8212 }
8214 GSList*
8216 {
8223 }
8225 #ifndef DISABLE_JIT
8227 MonoInst*
8228 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
8229 {
8242 }
8250 }
8272 }
8273 }
8282 }
8284 #if 0
8285 /* OP_FREM is not IEEE compatible */
8290 }
8291 #endif
8292 }
8295 }
8296 #endif
8298 mgreg_t
8300 {
8302 }
8304 void
8306 {
8308 }
8310 /*
8311 * mono_arch_emit_load_aotconst:
8312 *
8313 * Emit code to load the contents of the GOT slot identified by TRAMP_TYPE and
8314 * TARGET from the mscorlib GOT in full-aot code.
8315 * On AMD64, the result is placed into R11.
8316 */
8317 guint8*
8318 mono_arch_emit_load_aotconst (guint8 *start, guint8 *code, MonoJumpInfo **ji, MonoJumpInfoType tramp_type, gconstpointer target)
8319 {
8324 }
8326 /*
8327 * mono_arch_get_trampolines:
8328 *
8329 * Return a list of MonoTrampInfo structures describing arch specific trampolines
8330 * for AOT.
8331 */
8332 GSList *
8334 {
8336 }
8338 /* Soft Debug support */
8339 #ifdef MONO_ARCH_SOFT_DEBUG_SUPPORTED
8341 /*
8342 * mono_arch_set_breakpoint:
8343 *
8344 * Set a breakpoint at the native code corresponding to JI at NATIVE_OFFSET.
8345 * The location should contain code emitted by OP_SEQ_POINT.
8346 */
8347 void
8349 {
8354 SeqPointInfo *info = (SeqPointInfo *)mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8359 /* ip points to a mov r11, 0 */
8363 }
8364 }
8366 /*
8367 * mono_arch_clear_breakpoint:
8368 *
8369 * Clear the breakpoint at IP.
8370 */
8371 void
8373 {
8378 SeqPointInfo *info = (SeqPointInfo *)mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8383 }
8384 }
8386 gboolean
8388 {
8389 /* We use soft breakpoints on amd64 */
8391 }
8393 /*
8394 * mono_arch_skip_breakpoint:
8395 *
8396 * Modify CTX so the ip is placed after the breakpoint instruction, so when
8397 * we resume, the instruction is not executed again.
8398 */
8399 void
8401 {
8403 }
8405 /*
8406 * mono_arch_start_single_stepping:
8407 *
8408 * Start single stepping.
8409 */
8410 void
8412 {
8414 }
8416 /*
8417 * mono_arch_stop_single_stepping:
8418 *
8419 * Stop single stepping.
8420 */
8421 void
8423 {
8425 }
8427 /*
8428 * mono_arch_is_single_step_event:
8429 *
8430 * Return whenever the machine state in SIGCTX corresponds to a single
8431 * step event.
8432 */
8433 gboolean
8435 {
8436 /* We use soft breakpoints on amd64 */
8438 }
8440 /*
8441 * mono_arch_skip_single_step:
8442 *
8443 * Modify CTX so the ip is placed after the single step trigger instruction,
8444 * we resume, the instruction is not executed again.
8445 */
8446 void
8448 {
8450 }
8452 /*
8453 * mono_arch_create_seq_point_info:
8454 *
8455 * Return a pointer to a data structure which is used by the sequence
8456 * point implementation in AOTed code.
8457 */
8458 gpointer
8460 {
8464 // FIXME: Add a free function
8468 code);
8475 // FIXME: Optimize the size
8476 info = (SeqPointInfo *)g_malloc0 (sizeof (SeqPointInfo) + (ji->code_size * sizeof (gpointer)));
8484 }
8487 }
8489 #endif
8491 gboolean
8493 {
8524 }
8525 }
8527 CallInfo*
8529 {
8531 }