| blob | 49f4f25699ec59efefd9de6418f626d895560829 |
1 /**
2 * \file
3 * AMD64 backend for the Mono code generator
4 *
5 * Based on mini-x86.c.
6 *
7 * Authors:
8 * Paolo Molaro (lupus@ximian.com)
9 * Dietmar Maurer (dietmar@ximian.com)
10 * Patrik Torstensson
11 * Zoltan Varga (vargaz@gmail.com)
12 * Johan Lorensson (lateralusx.github@gmail.com)
13 *
14 * (C) 2003 Ximian, Inc.
15 * Copyright 2003-2011 Novell, Inc (http://www.novell.com)
16 * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
17 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
18 */
20 #include <string.h>
21 #include <math.h>
22 #include <assert.h>
23 #ifdef HAVE_UNISTD_H
24 #include <unistd.h>
25 #endif
27 #include <mono/metadata/abi-details.h>
28 #include <mono/metadata/appdomain.h>
29 #include <mono/metadata/debug-helpers.h>
30 #include <mono/metadata/threads.h>
31 #include <mono/metadata/profiler-private.h>
32 #include <mono/metadata/mono-debug.h>
33 #include <mono/metadata/gc-internals.h>
34 #include <mono/utils/mono-math.h>
35 #include <mono/utils/mono-mmap.h>
36 #include <mono/utils/mono-memory-model.h>
37 #include <mono/utils/mono-tls.h>
38 #include <mono/utils/mono-hwcap.h>
39 #include <mono/utils/mono-threads.h>
40 #include <mono/utils/unlocked.h>
53 #ifdef MONO_XEN_OPT
55 #else
56 #define optimize_for_xen 0
57 #endif
59 #define IS_IMM32(val) ((((guint64)val) >> 32) == 0)
61 #define IS_REX(inst) (((inst) >= 0x40) && ((inst) <= 0x4f))
63 #ifdef TARGET_WIN32
64 /* Under windows, the calling convention is never stdcall */
65 #define CALLCONV_IS_STDCALL(call_conv) (FALSE)
66 #else
67 #define CALLCONV_IS_STDCALL(call_conv) ((call_conv) == MONO_CALL_STDCALL)
68 #endif
70 /* This mutex protects architecture specific caches */
71 #define mono_mini_arch_lock() mono_os_mutex_lock (&mini_arch_mutex)
72 #define mono_mini_arch_unlock() mono_os_mutex_unlock (&mini_arch_mutex)
75 /* The single step trampoline */
78 /* The breakpoint trampoline */
81 /* Offset between fp and the first argument in the callee */
82 #define ARGS_OFFSET 16
83 #define GP_SCRATCH_REG AMD64_R11
85 /*
86 * AMD64 register usage:
87 * - callee saved registers are used for global register allocation
88 * - %r11 is used for materializing 64 bit constants in opcodes
89 * - the rest is used for local allocation
90 */
92 /*
93 * Floating point comparison results:
94 * ZF PF CF
95 * A > B 0 0 0
96 * A < B 0 0 1
97 * A = B 1 0 0
98 * A > B 0 0 0
99 * UNORDERED 1 1 1
100 */
104 {
122 }
124 }
129 };
134 };
138 {
141 else
143 }
147 {
150 else
152 }
154 static gboolean
156 {
157 #if 0
159 #else
161 #endif
162 }
166 {
167 /* Skip REX */
172 }
176 {
181 }
183 static void
185 {
186 // NOTE: Sometimes code has just been generated, is not running yet,
187 // and has no alignment requirements. Sometimes it could be running while we patch it,
188 // and there are alignment requirements.
189 // FIXME Assert alignment.
193 /* Skip REX */
197 }
200 /* amd64_set_reg_template */
202 }
203 else if ((code [0] == 0x8b) && rex && x86_modrm_mod (code [1]) == 0 && x86_modrm_rm (code [1]) == 5) {
204 /* mov 0(%rip), %dreg */
206 }
208 /* call or jmp *<OFFSET>(%rip) */
210 }
212 /* call or jmp <DISP> */
216 }
217 else
219 }
221 void
223 {
225 }
227 #define DEBUG(a) if (cfg->verbose_level > 1) a
231 {
237 /* Since the same stack slot size is used for all arg */
238 /* types, it needs to be big enough to hold them all */
240 }
245 }
246 }
250 {
256 /* Since the same stack slot size is used for both float */
257 /* types, it needs to be big enough to hold them both */
259 }
261 /* A double register */
264 else
268 }
269 }
272 ARG_CLASS_NO_CLASS,
273 ARG_CLASS_MEMORY,
274 ARG_CLASS_INTEGER,
275 ARG_CLASS_SSE
278 static ArgumentClass
280 {
303 #ifdef TARGET_WIN32
305 #else
307 #endif
317 }
318 /* fall through */
326 }
328 }
331 }
333 /* Merge */
335 ;
342 else
346 }
353 /*
354 * collect_field_info_nested:
355 *
356 * Collect field info from KLASS recursively into FIELDS.
357 */
358 static void
359 collect_field_info_nested (MonoClass *klass, GArray *fields_array, int offset, gboolean pinvoke, gboolean unicode)
360 {
369 collect_field_info_nested (mono_class_from_mono_type (info->fields [i].field->type), fields_array, info->fields [i].offset, pinvoke, unicode);
371 guint32 align;
372 StructFieldInfo f;
380 /* This can happen with .pack directives eg. 'fixed' arrays */
382 /* Replicate the last field to fill out the remaining place, since the code in add_valuetype () needs type information */
387 }
391 }
394 }
395 }
396 }
398 gpointer iter;
406 collect_field_info_nested (mono_class_from_mono_type (field->type), fields_array, field->offset - sizeof (MonoObject), pinvoke, unicode);
409 StructFieldInfo f;
416 }
417 }
418 }
419 }
421 #ifdef TARGET_WIN32
423 /* Windows x64 ABI can pass/return value types in register of size 1,2,4,8 bytes. */
424 #define MONO_WIN64_VALUE_TYPE_FITS_REG(arg_size) (arg_size <= SIZEOF_REGISTER && (arg_size == 1 || arg_size == 2 || arg_size == 4 || arg_size == 8))
426 static gboolean
427 allocate_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, AMD64_Reg_No int_regs [], int int_reg_count, AMD64_XMM_Reg_No float_regs [], int float_reg_count, guint32 *current_int_reg, guint32 *current_float_reg)
428 {
431 assert (arg_info != NULL && int_regs != NULL && float_regs != NULL && current_int_reg != NULL && current_float_reg != NULL);
441 /* Pass parameter in integer register. */
447 /* Pass parameter in float register. */
448 arg_info->pair_storage [0] = (arg_size <= sizeof (gfloat)) ? ArgInFloatSSEReg : ArgInDoubleSSEReg;
452 }
457 }
460 }
463 allocate_parameter_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
464 {
465 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, param_regs, PARAM_REGS, float_param_regs, FLOAT_PARAM_REGS, current_int_reg, current_float_reg);
466 }
469 allocate_return_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
470 {
471 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, return_regs, RETURN_REGS, float_return_regs, FLOAT_RETURN_REGS, current_int_reg, current_float_reg);
472 }
474 static void
475 allocate_storage_for_valuetype_win64 (ArgInfo *arg_info, MonoType *type, gboolean is_return, ArgumentClass arg_class,
477 {
478 /* Windows x64 value type ABI.
479 *
480 * Parameters: https://msdn.microsoft.com/en-us/library/zthk2dkh.aspx
481 *
482 * Integer/Float types smaller than or equals to 8 bytes or porperly sized struct/union (1,2,4,8)
483 * Try pass in register using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8), if no more registers, pass on stack using ArgOnStack as storage and size of parameter(1,2,4,8).
484 * Integer/Float types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
485 * Try to pass pointer in register using ArgValuetypeAddrInIReg, if no more registers, pass pointer on stack using ArgValuetypeAddrOnStack as storage and parameter size of register (8 bytes).
486 *
487 * Return values: https://msdn.microsoft.com/en-us/library/7572ztz4.aspx.
488 *
489 * Integers/Float types smaller than or equal to 8 bytes
490 * Return in corresponding register RAX/XMM0 using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8).
491 * Properly sized struct/unions (1,2,4,8)
492 * Return in register RAX using ArgValuetypeInReg as storage and size of parameter(1,2,4,8).
493 * Types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
494 * Return pointer to allocated stack space (allocated by caller) using ArgValuetypeAddrInIReg as storage and parameter size.
495 */
497 assert (arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
501 /* Parameter cases. */
505 /* First, try to use registers for parameter. If type is struct it can only be passed by value in integer register. */
507 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
508 /* No more registers, fallback passing parameter on stack as value. */
509 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
511 /* Passing value directly on stack, so use size of value. */
517 }
519 /* Fallback to stack, try to pass address to parameter in register. Always use integer register to represent stack address. */
521 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
522 /* No more registers, fallback passing address to parameter on stack. */
523 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
525 /* Passing an address to value on stack, so use size of register as argument size. */
531 }
532 }
534 /* Return value cases. */
538 /* Return value fits into return registers. If type is struct it can only be returned by value in integer register. */
540 allocate_return_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
542 /* Only RAX/XMM0 should be used to return valuetype. */
543 assert ((arg_info->pair_regs[0] == AMD64_RAX && arg_info->pair_regs[1] == ArgNone) || (arg_info->pair_regs[0] == AMD64_XMM0 && arg_info->pair_regs[1] == ArgNone));
545 /* Return value doesn't fit into return register, return address to allocated stack space (allocated by caller and passed as input). */
547 allocate_return_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
549 /* Only RAX should be used to return valuetype address. */
555 }
556 }
557 }
559 static void
560 get_valuetype_size_win64 (MonoClass *klass, gboolean pinvoke, ArgInfo *arg_info, MonoType *type, ArgumentClass *arg_class, guint32 *arg_size)
561 {
565 assert (klass != NULL && arg_info != NULL && type != NULL && arg_class != NULL && arg_size != NULL);
568 /* Calculate argument class type and size of marshalled type. */
572 /* Calculate argument class type and size of managed type. */
574 }
576 /* Windows ABI only handle value types on stack or passed in integer register (if it fits register size). */
580 /* Value type has a size that doesn't seem to fit register according to ABI. Try to used full stack size of type. */
582 }
584 /*
585 * Standard C and C++ doesn't allow empty structs, empty structs will always have a size of 1 byte.
586 * GCC have an extension to allow empty structs, https://gcc.gnu.org/onlinedocs/gcc/Empty-Structures.html.
587 * This cause a little dilemma since runtime build using none GCC compiler will not be compatible with
588 * GCC build C libraries and the other way around. On platforms where empty structs has size of 1 byte
589 * it must be represented in call and cannot be dropped.
590 */
595 }
598 }
600 static void
603 {
606 ArgumentClass arg_class;
608 assert (signature != NULL && arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
613 /* Only drop value type if its not an empty struct as input that must be represented in call */
614 if ((arg_size == 0 && !arg_info->pass_empty_struct) || (arg_info->pass_empty_struct && is_return)) {
618 /* Alocate storage for value type. */
619 allocate_storage_for_valuetype_win64 (arg_info, type, is_return, arg_class, arg_size, current_int_reg, current_float_reg, stack_size);
620 }
621 }
625 static void
627 gboolean is_return,
629 {
630 #ifdef TARGET_WIN32
632 #else
634 /* Keep track of the size used in each quad so we can */
635 /* use the right size when copying args/return vars. */
648 /* We pass and return vtypes of size 8 in a register */
651 }
653 /* If this struct can't be split up naturally into 8-byte */
654 /* chunks (registers), pass it on the stack. */
661 }
662 /*
663 * Collect field information recursively to be able to
664 * handle nested structures.
665 */
675 }
676 }
682 }
685 /* Allways pass in memory */
694 }
698 else
707 /* Always pass in 1 or 2 integer registers */
710 /* Only the simplest cases are supported */
714 }
716 /*
717 * Implement the algorithm from section 3.2.3 of the X86_64 ABI.
718 * The X87 and SSEUP stuff is left out since there are no such types in
719 * the CLR.
720 */
725 }
736 }
741 ArgumentClass class1;
745 else
749 /* Unaligned field */
750 NOT_IMPLEMENTED;
751 }
753 /* Skip fields in other quad */
759 /* How far into this quad this data extends.*/
760 /* (8 is size of quad) */
764 }
765 /* Empty structs have a nonzero size, causing this assert to be hit */
769 }
770 }
774 /* Post merger cleanup */
778 /* Allocate registers */
779 {
785 while (quadsize [1] != 0 && quadsize [1] != 1 && quadsize [1] != 2 && quadsize [1] != 4 && quadsize [1] != 8)
804 else
807 }
818 }
826 }
827 }
831 /* Revert possible register assignments */
838 else
844 }
845 }
847 }
849 /*
850 * get_call_info:
851 *
852 * Obtain information about a call according to the calling convention.
853 * For AMD64 System V, see the "System V ABI, x86-64 Architecture Processor Supplement
854 * Draft Version 0.23" document for more information.
855 * For AMD64 Windows, see "Overview of x64 Calling Conventions",
856 * https://msdn.microsoft.com/en-us/library/ms235286.aspx
857 */
860 {
870 else
879 #ifdef TARGET_WIN32
880 /* Reserve space where the callee can save the argument registers */
882 #endif
884 /* return value */
919 }
923 }
924 /* fall through */
932 }
942 }
945 /*
946 * To simplify get_this_arg_reg () and LLVM integration, emit the vret arg after
947 * the first argument, allowing 'this' to be always passed in the first arg reg.
948 * Also do this if the first argument is a reference type, since virtual calls
949 * are sometimes made using calli without sig->hasthis set, like in the delegate
950 * invoke wrappers.
951 */
953 if ((ret_storage == ArgValuetypeAddrInIReg || ret_storage == ArgGsharedvtVariableInReg) && !is_pinvoke && (sig->hasthis || (sig->param_count > 0 && MONO_TYPE_IS_REFERENCE (mini_get_underlying_type (sig->params [0]))))) {
959 }
964 /* this */
971 }
972 }
978 /* Emit the signature cookie just before the implicit arguments */
980 }
986 #ifdef TARGET_WIN32
987 /* The float param registers and other param registers must be the same index on Windows x64.*/
992 #endif
995 /* We allways pass the sig cookie on the stack for simplicity */
996 /*
997 * Prevent implicit arguments + the sig cookie from being passed
998 * in registers.
999 */
1003 /* Emit the signature cookie just before the implicit arguments */
1005 }
1035 }
1037 /* gsharedvt arguments are passed by ref */
1041 else
1044 }
1045 /* fall through */
1063 /* gsharedvt arguments are passed by ref */
1068 else
1073 }
1074 }
1076 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
1080 /* Emit the signature cookie just before the implicit arguments */
1082 }
1088 }
1090 void
1091 mono_arch_set_native_call_context (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1092 {
1104 gpointer ret_storage = interp_cb->frame_arg_to_storage ((MonoInterpFrameHandle)frame, sig, -1);
1106 }
1107 }
1111 gpointer storage;
1118 }
1123 }
1127 }
1131 }
1134 }
1137 /* Split up the value type into the reg pairs */
1151 }
1153 }
1154 }
1155 }
1158 }
1160 void
1161 mono_arch_get_native_call_context (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1162 {
1166 /* No return value */
1172 /* The return values were stored directly at address passed in reg */
1177 gpointer storage;
1184 }
1189 }
1193 /* Reconstruct the value type */
1207 }
1208 storage_tmp++;
1209 }
1211 }
1214 }
1216 done:
1218 }
1220 /*
1221 * mono_arch_get_argument_info:
1222 * @csig: a method signature
1223 * @param_count: the number of parameters to consider
1224 * @arg_info: an array to store the result infos
1225 *
1226 * Gathers information on parameters such as size, alignment and
1227 * padding. arg_info should be large enought to hold param_count + 1 entries.
1228 *
1229 * Returns the size of the argument area on the stack.
1230 */
1231 int
1232 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
1233 {
1238 /* The arguments are saved to a stack area in mono_arch_instrument_prolog */
1241 }
1245 /* FIXME: */
1247 }
1252 }
1254 gboolean
1255 mono_arch_tail_call_supported (MonoCompile *cfg, MonoMethodSignature *caller_sig, MonoMethodSignature *callee_sig)
1256 {
1258 gboolean res;
1266 /* An address on the callee's stack is passed as the first argument */
1273 }
1275 /*
1276 * Initialize the cpu to execute managed code.
1277 */
1278 void
1280 {
1281 #ifndef _MSC_VER
1282 guint16 fpcw;
1284 /* spec compliance requires running with double precision */
1290 #else
1291 /* TODO: This is crashing on Win64 right now.
1292 * _control87 (_PC_53, MCW_PC);
1293 */
1294 #endif
1295 }
1297 /*
1298 * Initialize architecture specific code.
1299 */
1300 void
1302 {
1306 mono_aot_register_jit_icall ("mono_amd64_throw_corlib_exception", mono_amd64_throw_corlib_exception);
1309 #if defined(MONO_ARCH_GSHAREDVT_SUPPORTED)
1310 mono_aot_register_jit_icall ("mono_amd64_start_gsharedvt_call", mono_amd64_start_gsharedvt_call);
1311 #endif
1315 }
1317 /*
1318 * Cleanup architecture specific code.
1319 */
1320 void
1322 {
1324 }
1326 /*
1327 * This function returns the optimizations supported on this cpu.
1328 */
1329 guint32
1331 {
1341 else
1345 }
1347 #ifdef TARGET_WIN32
1348 /* The current SIMD doesn't support the argument used by a LD_ADDR to be of type OP_VTARG_ADDR. */
1349 /* This will now be used for value types > 8 or of size 3,5,6,7 as dictated by windows x64 value type ABI. */
1350 /* Since OP_VTARG_ADDR needs to be resolved in mono_spill_global_vars and the SIMD implementation optimize */
1351 /* away the LD_ADDR in load_simd_vreg, that will cause an error in mono_spill_global_vars since incorrect opcode */
1352 /* will now have a reference to an argument that won't be fully decomposed. */
1354 #endif
1357 }
1359 /*
1360 * This function test for all SSE functions supported.
1361 *
1362 * Returns a bitmask corresponding to all supported versions.
1363 *
1364 */
1365 guint32
1367 {
1392 }
1394 #ifndef DISABLE_JIT
1396 GList *
1398 {
1406 /* unused vars */
1418 }
1419 }
1424 }
1426 /**
1427 * mono_arch_compute_omit_fp:
1428 * Determine whether the frame pointer can be eliminated.
1429 */
1430 static void
1432 {
1449 /*
1450 * FIXME: Remove some of the restrictions.
1451 */
1460 /*
1461 if (cfg->method->save_lmf)
1462 cfg->arch.omit_fp = FALSE;
1463 */
1477 if (ainfo->storage == ArgOnStack || ainfo->storage == ArgValuetypeAddrInIReg || ainfo->storage == ArgValuetypeAddrOnStack) {
1478 /*
1479 * The stack offset can only be determined when the frame
1480 * size is known.
1481 */
1483 }
1484 }
1492 }
1493 }
1495 GList *
1497 {
1505 /* We use the callee saved registers for global allocation */
1511 #ifdef TARGET_WIN32
1514 #endif
1517 }
1519 /*
1520 * mono_arch_regalloc_cost:
1521 *
1522 * Return the cost, in number of memory references, of the action of
1523 * allocating the variable VMV into a register during global register
1524 * allocation.
1525 */
1526 guint32
1528 {
1532 /* The register is already saved */
1533 /* substract 1 for the invisible store in the prolog */
1535 else
1536 /* push+pop */
1538 }
1540 /*
1541 * mono_arch_fill_argument_info:
1542 *
1543 * Populate cfg->args, cfg->ret and cfg->vret_addr with information about the arguments
1544 * of the method.
1545 */
1546 void
1548 {
1560 /*
1561 * Contrary to mono_arch_allocate_vars (), the information should describe
1562 * where the arguments are at the beginning of the method, not where they can be
1563 * accessed during the execution of the method. The later makes no sense for the
1564 * global register allocator, since a variable can be in more than one location.
1565 */
1582 }
1602 /* Dummy */
1607 }
1608 }
1609 }
1611 void
1613 {
1629 /*
1630 * We use the ABI calling conventions for managed code as well.
1631 * Exception: valuetypes are only sometimes passed or returned in registers.
1632 */
1634 /*
1635 * The stack looks like this:
1636 * <incoming arguments passed on the stack>
1637 * <return value>
1638 * <lmf/caller saved registers>
1639 * <locals>
1640 * <spill area>
1641 * <localloc area> -> grows dynamically
1642 * <params area>
1643 */
1650 /* Locals are allocated backwards from %fp */
1653 }
1657 /* Save all callee-saved registers normally (except RBP, if not already used), and restore them when unwinding through an LMF */
1660 }
1664 /* Reserve space for callee saved registers */
1668 }
1683 /* The register is volatile */
1692 }
1696 }
1699 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
1708 }
1712 }
1713 }
1715 /* Allocate locals */
1716 offsets = mono_allocate_stack_slots (cfg, cfg->arch.omit_fp ? FALSE: TRUE, &locals_stack_size, &locals_stack_align);
1720 }
1727 }
1736 else
1738 //printf ("allocated local %d to ", i); mono_print_tree_nl (ins);
1739 }
1740 }
1747 }
1755 /* FIXME: Allocate volatile arguments to registers */
1759 /*
1760 * Under AMD64, all registers used to pass arguments to functions
1761 * are volatile across calls.
1762 * FIXME: Optimize this.
1763 */
1764 if ((ainfo->storage == ArgInIReg) || (ainfo->storage == ArgInFloatSSEReg) || (ainfo->storage == ArgInDoubleSSEReg) || (ainfo->storage == ArgValuetypeInReg) || (ainfo->storage == ArgGSharedVtInReg))
1777 }
1792 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
1801 }
1805 }
1811 }
1813 NOT_IMPLEMENTED;
1814 }
1816 if (!inreg && (ainfo->storage != ArgOnStack) && (ainfo->storage != ArgValuetypeAddrInIReg) && (ainfo->storage != ArgValuetypeAddrOnStack) && (ainfo->storage != ArgGSharedVtOnStack)) {
1819 /* These arguments are saved to the stack in the prolog */
1823 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (mgreg_t) : sizeof (mgreg_t);
1824 // Arguments are yet supported by the stack map creation code
1825 //cfg->locals_max_stack_offset = MAX (cfg->locals_max_stack_offset, offset);
1827 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (mgreg_t) : sizeof (mgreg_t);
1829 //cfg->locals_min_stack_offset = MIN (cfg->locals_min_stack_offset, offset);
1830 }
1831 }
1832 }
1833 }
1836 }
1838 void
1840 {
1855 if (cinfo->ret.storage == ArgValuetypeAddrInIReg || cinfo->ret.storage == ArgGsharedvtVariableInReg) {
1856 cfg->vret_addr = mono_compile_create_var (cfg, m_class_get_byval_arg (mono_defaults.int_class), OP_ARG);
1860 }
1861 }
1867 MonoInst *ins = mono_compile_create_var (cfg, m_class_get_byval_arg (mono_defaults.int_class), OP_LOCAL);
1870 }
1871 ins = mono_compile_create_var (cfg, m_class_get_byval_arg (mono_defaults.int_class), OP_LOCAL);
1875 ins = mono_compile_create_var (cfg, m_class_get_byval_arg (mono_defaults.int_class), OP_LOCAL);
1878 }
1885 }
1886 }
1888 static void
1889 add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, ArgStorage storage, int reg, MonoInst *tree)
1890 {
1920 }
1921 }
1923 static int
1925 {
1928 #if defined(__mono_ilp32__)
1930 #else
1932 #endif
1939 }
1942 }
1944 static void
1946 {
1951 NOT_IMPLEMENTED;
1955 /*
1956 * mono_ArgIterator_Setup assumes the signature cookie is
1957 * passed first and all the arguments which were before it are
1958 * passed on the stack after the signature. So compensate by
1959 * passing a different signature.
1960 */
1961 tmp_sig = mono_metadata_signature_dup_full (m_class_get_image (cfg->method->klass), call->signature);
1964 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
1969 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORE_MEMBASE_REG, AMD64_RSP, cinfo->sig_cookie.offset, sig_reg);
1970 }
1972 #ifdef ENABLE_LLVM
1975 {
1987 }
1988 }
1990 LLVMCallInfo*
1992 {
2005 linfo = mono_mempool_alloc0 (cfg->mempool, sizeof (LLVMCallInfo) + (sizeof (LLVMArgInfo) * n));
2007 /*
2008 * LLVM always uses the native ABI while we use our own ABI, the
2009 * only difference is the handling of vtypes:
2010 * - we only pass/receive them in registers in some cases, and only
2011 * in 1 or 2 integer registers.
2012 */
2026 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2027 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2031 }
2037 }
2040 /* Vtype returned using a hidden argument */
2047 }
2054 else
2071 else
2076 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2077 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2081 }
2085 linfo->args [i].pair_storage [j] = arg_storage_to_llvm_arg_storage (cfg, ainfo->pair_storage [j]);
2095 }
2096 }
2099 }
2100 #endif
2102 void
2104 {
2120 /* We shouldn't be called in the llvm case */
2123 }
2125 /*
2126 * Emit all arguments which are passed on the stack to prevent register
2127 * allocation problems.
2128 */
2137 else
2141 //XXX what about ArgGSharedVtOnStack here?
2148 else
2152 }
2157 }
2158 }
2159 }
2161 /*
2162 * Emit all parameters passed in registers in non-reverse order for better readability
2163 * and to help the optimization in emit_prolog ().
2164 */
2172 }
2183 else
2189 /* Already done */
2202 /* Already emitted above */
2204 //FIXME what about ArgGSharedVtOnStack ?
2210 }
2212 guint32 align;
2213 guint32 size;
2218 /*
2219 * Other backends use mono_type_stack_size (), but that
2220 * aligns the size to 8, which is larger than the size of
2221 * the source, leading to reads of invalid memory if the
2222 * source is at the end of address space.
2223 */
2225 }
2228 /* Avoid asserts in emit_memcpy () */
2229 mono_cfg_set_exception_invalid_program (cfg, g_strdup_printf ("Passing an argument of size '%d'.", size));
2230 /* Continue normally */
2231 }
2243 }
2245 }
2248 }
2251 /* Emit the signature cookie just before the implicit arguments */
2253 }
2255 /* Handle the case where there are no implicit arguments */
2262 /*
2263 * Tell the JIT to use a more efficient calling convention: call using
2264 * OP_CALL, compute the result location after the call, and save the
2265 * result there.
2266 */
2268 /*
2269 * Nullify the instruction computing the vret addr to enable
2270 * future optimizations.
2271 */
2276 NOT_IMPLEMENTED;
2277 /*
2278 * The valuetype is in RAX:RDX after the call, need to be copied to
2279 * the stack. Push the address here, so the call instruction can
2280 * access it.
2281 */
2283 cfg->arch.vret_addr_loc = mono_compile_create_var (cfg, m_class_get_byval_arg (mono_defaults.int_class), OP_LOCAL);
2284 /* Prevent it from being register allocated or optimized away */
2286 }
2288 MONO_EMIT_NEW_UNALU (cfg, OP_MOVE, ((MonoInst*)cfg->arch.vret_addr_loc)->dreg, call->vret_var->dreg);
2289 }
2301 }
2304 }
2309 }
2312 }
2314 void
2316 {
2332 //Pass empty struct value as 0 on platforms representing empty structs as 1 byte.
2334 }
2350 }
2351 }
2356 }
2358 }
2363 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
2387 }
2389 }
2391 /* Pass by addr */
2406 // FIXME: Code growth
2408 }
2412 EMIT_NEW_GC_PARAM_SLOT_LIVENESS_DEF (cfg, def, ainfo->offset, m_class_get_byval_arg (ins->klass));
2413 }
2414 }
2415 }
2417 void
2419 {
2425 else
2431 }
2434 }
2438 #define EMIT_COND_BRANCH(ins,cond,sign) \
2439 if (ins->inst_true_bb->native_offset) { \
2440 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
2441 } else { \
2442 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
2443 if ((cfg->opt & MONO_OPT_BRANCH) && \
2444 x86_is_imm8 (ins->inst_true_bb->max_offset - offset)) \
2445 x86_branch8 (code, cond, 0, sign); \
2446 else \
2447 x86_branch32 (code, cond, 0, sign); \
2448 }
2456 static gboolean
2458 {
2471 }
2484 }
2485 }
2488 }
2490 /*
2491 * mono_arch_dyn_call_prepare:
2492 *
2493 * Return a pointer to an arch-specific structure which contains information
2494 * needed by mono_arch_get_dyn_call_args (). Return NULL if OP_DYN_CALL is not
2495 * supported for SIG.
2496 * This function is equivalent to ffi_prep_cif in libffi.
2497 */
2498 MonoDynCallInfo*
2500 {
2510 }
2513 // FIXME: Preprocess the info to speed up get_dyn_call_args ().
2526 }
2527 }
2528 /* Align to 16 bytes */
2533 }
2535 /*
2536 * mono_arch_dyn_call_free:
2537 *
2538 * Free a MonoDynCallInfo structure.
2539 */
2540 void
2542 {
2547 }
2549 int
2551 {
2554 /* Extend the 'regs' field dynamically */
2556 }
2558 #define PTR_TO_GREG(ptr) (mgreg_t)(ptr)
2559 #define GREG_TO_PTR(greg) (gpointer)(greg)
2561 /*
2562 * mono_arch_get_start_dyn_call:
2563 *
2564 * Convert the arguments ARGS to a format which can be passed to OP_DYN_CALL, and
2565 * store the result into BUF.
2566 * ARGS should be an array of pointers pointing to the arguments.
2567 * RET should point to a memory buffer large enought to hold the result of the
2568 * call.
2569 * This function should be as fast as possible, any work which does not depend
2570 * on the actual values of the arguments should be done in
2571 * mono_arch_dyn_call_prepare ().
2572 * start_dyn_call + OP_DYN_CALL + finish_dyn_call is equivalent to ffi_call in
2573 * libffi.
2574 */
2575 void
2577 {
2591 }
2606 }
2608 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg)
2621 }
2625 greg ++;
2627 }
2634 #if !defined(__mono_ilp32__)
2637 #endif
2640 #if defined(__mono_ilp32__)
2645 #endif
2671 }
2680 } else if (t->type == MONO_TYPE_GENERICINST && mono_class_is_nullable (mono_class_from_mono_type (t))) {
2690 /* The argument pointed to by arg is either a boxed vtype or null */
2694 /* Fall though */
2697 /* Fall through */
2698 }
2717 }
2718 }
2727 }
2729 }
2732 }
2733 }
2734 }
2736 /*
2737 * mono_arch_finish_dyn_call:
2738 *
2739 * Store the result of a dyn call into the return value buffer passed to
2740 * start_dyn_call ().
2741 * This function should be as fast as possible, any work which does not depend
2742 * on the actual values of the arguments should be done in
2743 * mono_arch_dyn_call_prepare ().
2744 */
2745 void
2747 {
2801 /* Fall through */
2802 }
2804 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg) {
2805 /* Nothing to do */
2824 }
2825 }
2826 }
2830 }
2831 }
2833 /* emit an exception if condition is fail */
2834 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
2835 do { \
2836 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
2837 if (tins == NULL) { \
2838 mono_add_patch_info (cfg, code - cfg->native_code, \
2839 MONO_PATCH_INFO_EXC, exc_name); \
2840 x86_branch32 (code, cond, 0, signed); \
2841 } else { \
2842 EMIT_COND_BRANCH (tins, cond, signed); \
2843 } \
2844 } while (0);
2846 #define EMIT_FPCOMPARE(code) do { \
2847 amd64_fcompp (code); \
2848 amd64_fnstsw (code); \
2849 } while (0);
2851 #define EMIT_SSE2_FPFUNC(code, op, dreg, sreg1) do { \
2852 amd64_movsd_membase_reg (code, AMD64_RSP, -8, (sreg1)); \
2853 amd64_fld_membase (code, AMD64_RSP, -8, TRUE); \
2854 amd64_ ##op (code); \
2855 amd64_fst_membase (code, AMD64_RSP, -8, TRUE, TRUE); \
2856 amd64_movsd_reg_membase (code, (dreg), AMD64_RSP, -8); \
2857 } while (0);
2860 emit_call_body (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data)
2861 {
2864 /*
2865 * FIXME: Add support for thunks
2866 */
2867 {
2870 /*
2871 * Indirect calls are expensive so try to make a near call if possible.
2872 * The caller memory is allocated by the code manager so it is
2873 * guaranteed to be at a 32 bit offset.
2874 */
2877 /* The target is in memory allocated using the code manager */
2882 /* The callee might be an AOT method */
2885 /* The target is in malloc-ed memory */
2887 }
2890 /*
2891 * The call might go directly to a native function without
2892 * the wrapper.
2893 */
2899 }
2900 }
2901 }
2914 /*
2915 * This is not really an optimization, but required because the
2916 * generic class init trampolines use R11 to pass the vtable.
2917 */
2919 }
2924 /* No wrapper */
2927 }
2929 /* See the comment in mono_codegen () */
2930 if ((info->name [0] != 'v') || (strstr (info->name, "ves_array_new_va_") == NULL && strstr (info->name, "ves_array_element_address_") == NULL))
2932 }
2933 }
2937 }
2938 }
2939 }
2942 /* These methods are allocated using malloc */
2945 #ifdef MONO_ARCH_NOMAP32BIT
2947 #endif
2948 /* The 64bit XEN kernel does not honour the MAP_32BIT flag. (#522894) */
2955 }
2958 /*
2959 * Align the call displacement to an address divisible by 4 so it does
2960 * not span cache lines. This is required for code patching to work on SMP
2961 * systems.
2962 */
2966 }
2969 }
2975 }
2979 }
2980 }
2983 }
2986 emit_call (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data, gboolean win64_adjust_stack)
2987 {
2988 #ifdef TARGET_WIN32
2991 #endif
2993 #ifdef TARGET_WIN32
2996 #endif
2999 }
3003 {
3011 }
3014 }
3016 #ifndef DISABLE_JIT
3018 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB) || ((opcode) == OP_ISBB_IMM)))
3020 /*
3021 * mono_arch_peephole_pass_1:
3022 *
3023 * Perform peephole opts which should/can be performed before local regalloc
3024 */
3025 void
3027 {
3038 /*
3039 * X86_LEA is like ADD, but doesn't have the
3040 * sreg1==dreg restriction. inst_imm > 0 is needed since LEA sign-extends
3041 * its operand to 64 bit.
3042 */
3045 }
3052 /*
3053 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3054 * the latter has length 2-3 instead of 6 (reverse constant
3055 * propagation). These instruction sequences are very common
3056 * in the initlocals bblock.
3057 */
3059 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3062 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG)) {
3063 /* Continue */
3064 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3066 /* Continue */
3068 /* Continue */
3071 }
3072 }
3073 }
3077 /* OP_COMPARE_IMM (reg, 0)
3078 * -->
3079 * OP_AMD64_TEST_NULL (reg)
3080 */
3089 /*
3090 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3091 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
3092 * -->
3093 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3094 * OP_COMPARE_IMM reg, imm
3095 *
3096 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
3097 */
3104 /* check if we can remove cmp reg,0 with test null */
3107 }
3110 }
3113 }
3114 }
3116 void
3118 {
3126 /* reg = 0 -> XOR (reg, reg) */
3127 /* XOR sets cflags on x86, so we cant do it always */
3132 /* Fall through */
3135 }
3136 }
3138 /*
3139 * Use IXOR to avoid a rex prefix if possible. The cpu will sign extend the
3140 * 0 result into 64 bits.
3141 */
3144 }
3145 /* Fall through */
3150 /*
3151 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3152 * the latter has length 2-3 instead of 6 (reverse constant
3153 * propagation). These instruction sequences are very common
3154 * in the initlocals bblock.
3155 */
3157 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3160 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_REG) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG) || (ins2->opcode == OP_LIVERANGE_START) || (ins2->opcode == OP_GC_LIVENESS_DEF) || (ins2->opcode == OP_GC_LIVENESS_USE)) {
3161 /* Continue */
3162 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3164 /* Continue */
3166 /* Continue */
3169 }
3170 }
3171 }
3181 }
3184 }
3185 }
3187 #define NEW_INS(cfg,ins,dest,op) do { \
3188 MONO_INST_NEW ((cfg), (dest), (op)); \
3189 (dest)->cil_code = (ins)->cil_code; \
3190 mono_bblock_insert_before_ins (bb, ins, (dest)); \
3191 } while (0)
3193 /*
3194 * mono_arch_lowering_pass:
3195 *
3196 * Converts complex opcodes into simpler ones so that each IR instruction
3197 * corresponds to one machine instruction.
3198 */
3199 void
3201 {
3204 /*
3205 * FIXME: Need to add more instructions, but the current machine
3206 * description can't model some parts of the composite instructions like
3207 * cdq.
3208 */
3228 }
3230 #ifndef __mono_ilp32__
3232 #endif
3234 /* Don't generate memindex opcodes (to simplify */
3235 /* read sandboxing) */
3242 }
3244 #ifndef __mono_ilp32__
3246 #endif
3254 }
3256 #ifdef MONO_ARCH_SIMD_INTRINSICS
3277 }
3279 #endif
3282 }
3283 }
3286 }
3288 static const int
3289 branch_cc_table [] = {
3293 };
3295 /* Maps CMP_... constants to X86_CC_... constants */
3296 static const int
3297 cc_table [] = {
3300 };
3302 static const int
3303 cc_signed_table [] = {
3306 };
3308 /*#include "cprop.c"*/
3311 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int sreg, int size, gboolean is_signed)
3312 {
3315 else
3323 }
3327 {
3331 #if defined(TARGET_WIN32)
3333 #elif defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
3336 #endif
3341 /*
3342 * Under Windows:
3343 * If requested stack size is larger than one page,
3344 * perform stack-touch operation
3345 */
3346 /*
3347 * Generate stack probe code.
3348 * Under Windows, it is necessary to allocate one page at a time,
3349 * "touching" stack after each successful sub-allocation. This is
3350 * because of the way stack growth is implemented - there is a
3351 * guard page before the lowest stack page that is currently commited.
3352 * Stack normally grows sequentially so OS traps access to the
3353 * guard page and commits more pages when needed.
3354 */
3375 }
3376 else
3384 }
3388 }
3392 }
3412 }
3414 }
3418 {
3420 guint32 quad;
3422 /* Move return value to the target register */
3423 /* FIXME: do this in the local reg allocator */
3439 }
3443 }
3445 }
3462 /* Load the destination address */
3464 amd64_mov_reg_membase (code, AMD64_RCX, loc->inst_basereg, loc->inst_offset, sizeof(gpointer));
3469 amd64_mov_membase_reg (code, AMD64_RCX, (quad * sizeof(mgreg_t)), cinfo->ret.pair_regs [quad], sizeof(mgreg_t));
3480 NOT_IMPLEMENTED;
3481 }
3482 }
3483 }
3485 }
3488 }
3492 #ifdef TARGET_MACH
3494 #endif
3496 gboolean
3498 {
3499 #ifdef TARGET_MACH
3512 /*
3513 * We're looking for these two instructions:
3514 *
3515 * mov %gs:[offset](,%rdi,8),%rax
3516 * retq
3517 */
3530 /*
3531 * Apple now loads a different version of pthread_getspecific when launched from Xcode
3532 * For that version we're looking for these instructions:
3533 *
3534 * pushq %rbp
3535 * movq %rsp, %rbp
3536 * mov %gs:[offset](,%rdi,8),%rax
3537 * popq %rbp
3538 * retq
3539 */
3557 }
3561 #elif defined(TARGET_ANDROID)
3563 #else
3567 #endif
3568 }
3570 int
3572 {
3573 #ifdef TARGET_OSX
3575 #else
3578 #endif
3579 }
3581 /*
3582 * \param code buffer to store code to
3583 * \param dreg hard register where to place the result
3584 * \param tls_offset offset info
3585 * \return a pointer to the end of the stored code
3586 *
3587 * mono_amd64_emit_tls_get emits in \p code the native code that puts in
3588 * the dreg register the item in the thread local storage identified
3589 * by tls_offset.
3590 */
3593 {
3594 #ifdef TARGET_WIN32
3602 /* Load TEB->TlsExpansionSlots */
3610 }
3611 #elif defined(TARGET_MACH)
3614 #else
3622 }
3623 #endif
3625 }
3629 {
3630 #ifdef TARGET_WIN32
3632 #elif defined(TARGET_MACH)
3635 #else
3639 #endif
3641 }
3643 /*
3644 * emit_setup_lmf:
3645 *
3646 * Emit code to initialize an LMF structure at LMF_OFFSET.
3647 */
3650 {
3651 /*
3652 * The ip field is not set, the exception handling code will obtain it from the stack location pointed to by the sp field.
3653 */
3654 /*
3655 * sp is saved right before calls but we need to save it here too so
3656 * async stack walks would work.
3657 */
3658 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
3659 /* Save rbp */
3660 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), AMD64_RBP, 8);
3662 mono_emit_unwind_op_offset (cfg, code, AMD64_RBP, - (cfa_offset - (lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp))));
3664 /* These can't contain refs */
3665 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, previous_lmf), SLOT_NOREF);
3666 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), SLOT_NOREF);
3667 /* These are handled automatically by the stack marking code */
3668 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), SLOT_NOREF);
3671 }
3673 #ifdef TARGET_WIN32
3675 #define TEB_LAST_ERROR_OFFSET 0x068
3679 {
3680 /* Threads last error value is located in TEB_LAST_ERROR_OFFSET. */
3685 }
3687 #else
3691 {
3693 }
3695 #endif
3697 /* benchmark and set based on cpu */
3698 #define LOOP_ALIGNMENT 8
3699 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
3701 #ifndef DISABLE_JIT
3705 {
3706 #ifndef TARGET_WIN32
3709 else
3711 #endif
3713 }
3716 amd64_handle_varargs_call (MonoCompile *cfg, guint8 *code, MonoCallInst *call, gboolean free_rax)
3717 {
3718 #ifdef TARGET_WIN32
3720 #else
3721 /*
3722 * The AMD64 ABI forces callers to know about varargs.
3723 */
3726 // deliberatly nothing -- but nreg = 0 and do not return
3727 } else if (cfg->method->wrapper_type == MONO_WRAPPER_MANAGED_TO_NATIVE && m_class_get_image (cfg->method->klass) != mono_defaults.corlib) {
3728 /*
3729 * Since the unmanaged calling convention doesn't contain a
3730 * 'vararg' entry, we have to treat every pinvoke call as a
3731 * potential vararg call.
3732 */
3737 }
3742 }
3744 #endif
3745 }
3747 void
3749 {
3752 guint offset;
3756 /* Fix max_offset estimate for each successor bb */
3763 }
3764 }
3768 /* set alignment depending on cpu */
3771 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
3775 }
3776 }
3785 if (mono_break_at_bb_method && mono_method_desc_full_match (mono_break_at_bb_method, cfg->method) && bb->block_num == mono_break_at_bb_bb_num)
3793 #define EXTRA_CODE_SPACE (16)
3800 }
3830 /* In AMD64 NaCl, pointers are 4 bytes, */
3831 /* so STORE_* != STOREI8_*. Likewise below. */
3833 amd64_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, sizeof(gpointer));
3842 /* In NaCl, this could be a PCONST type, which could */
3843 /* mean a pointer type was copied directly into the */
3844 /* lower 32-bits of inst_imm, so for InvalidPtr==-1 */
3845 /* the value would be 0x00000000FFFFFFFF which is */
3846 /* not proper for an imm32 unless you cast it. */
3848 amd64_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, (gint32)ins->inst_imm, sizeof(gpointer));
3855 #ifdef __mono_ilp32__
3856 /* In ILP32, pointers are 4 bytes, so separate these */
3857 /* cases, use literal 8 below where we really want 8 */
3861 #endif
3863 // FIXME: Decompose this earlier
3869 }
3876 // FIXME: Decompose this earlier
3882 }
3889 /* For NaCl, pointers are 4 bytes, so separate these */
3890 /* cases, use literal 8 below where we really want 8 */
3896 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, sizeof(gpointer));
3899 /* Use literal 8 instead of sizeof pointer or */
3900 /* register, we really want 8 for this opcode */
3911 /* The cpu zero extends the result into 64 bits */
3912 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE, 4);
3918 /* The cpu zero extends the result into 64 bits */
3919 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE, 4);
3946 /* Clean out the upper word */
3957 #if defined(__mono_ilp32__)
3958 /* Comparison of pointer immediates should be 4 bytes to avoid sign-extend problems */
3962 #endif
3994 /* FIXME: Make a 64 version too */
3995 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
3999 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4003 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4007 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4011 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4014 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4017 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4020 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4026 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4045 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4048 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4051 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4055 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4058 amd64_alu_membase8_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4084 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4087 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4090 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4096 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4101 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4105 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4109 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4113 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4117 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4147 /* Load ss_tramp_var */
4148 /* This is equal to &ss_trampoline */
4150 /* Load the trampoline address */
4152 /* Call it if it is non-null */
4158 }
4160 /*
4161 * This is the address which is saved in seq points,
4162 */
4167 guint32 val;
4171 /* Load info var */
4174 /* Load the info->bp_addrs [offset], which is either NULL or the address of the breakpoint trampoline */
4179 /* Call the trampoline */
4186 /*
4187 * Emit a test+branch against a constant, the constant will be overwritten
4188 * by mono_arch_set_breakpoint () to cause the test to fail.
4189 */
4197 /* Load bp_tramp_var */
4198 /* This is equal to &bp_trampoline */
4200 /* Call the trampoline */
4203 }
4204 /*
4205 * Add an additional nop so skipping the bp doesn't cause the ip to point
4206 * to another IL offset.
4207 */
4210 }
4263 /* MOV r1, r2 */
4264 /* ADD r1, r1 */
4270 /* LEA r1, [r2 + r2*2] */
4274 /* LEA r1, [r2 + r2*4] */
4278 /* LEA r1, [r2 + r2*2] */
4279 /* ADD r1, r1 */
4284 /* LEA r1, [r2 + r2*8] */
4288 /* LEA r1, [r2 + r2*4] */
4289 /* ADD r1, r1 */
4294 /* LEA r1, [r2 + r2*2] */
4295 /* SHL r1, 2 */
4300 /* LEA r1, [r2 + r2*4] */
4301 /* LEA r1, [r1 + r1*4] */
4306 /* LEA r1, [r2 + r2*4] */
4307 /* SHL r1, 2 */
4308 /* LEA r1, [r1 + r1*4] */
4316 }
4318 }
4321 /* Regalloc magic makes the div/rem cases the same */
4329 }
4340 }
4351 }
4362 }
4495 /* the mul operation and the exception check should most likely be split */
4498 /*g_assert (ins->sreg2 == X86_EAX);
4499 g_assert (ins->dreg == X86_EAX);*/
4505 /* no need to save since we're going to store to it anyway */
4509 }
4512 }
4517 }
4521 }
4523 /* save before the check since pop and mov don't change the flags */
4532 }
4559 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
4583 /* This needs to operate on 64 bit values */
4584 amd64_cmov_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, ins->sreg2);
4598 else
4619 }
4621 }
4626 }
4635 /* the size of the tailcall op depends on signature, let's check for enough
4636 * space in the code buffer here again */
4645 }
4647 // FIXME hardcoding RAX here is not ideal.
4656 // FIXME Patch data instead of code.
4662 }
4663 }
4665 /* Restore callee saved registers */
4671 }
4676 // FIXME:
4678 NOT_IMPLEMENTED;
4681 /* Copy arguments on the stack to our argument area */
4685 }
4687 #ifdef TARGET_WIN32
4691 #else
4693 #endif
4694 }
4696 #ifdef TARGET_WIN32
4697 // Redundant REX byte indicates a tailcall to the native unwinder. It means nothing to the processor.
4698 // https://github.com/dotnet/coreclr/blob/966dabb5bb3c4bf1ea885e1e8dc6528e8c64dc4f/src/unwinder/amd64/unwinder_amd64.cpp#L1394
4699 // FIXME This should be jmp rip+32 for AOT direct to same assembly.
4700 // FIXME This should be jmp [rip+32] for AOT direct to not-same assembly (through data).
4701 // FIXME This should be jmp [rip+32] for JIT direct -- patch data instead of code.
4702 // This is only close to ideal for membase, and even then it should
4703 // have a more dynamic register allocation.
4706 #else
4707 // NT does not have varargs rax use, and NT ABI does not have red zone.
4708 // Use red-zone mov/jmp instead of push/ret to preserve call/ret speculation stack.
4709 // FIXME Just like NT the direct cases are are not ideal.
4713 #endif
4717 }
4719 /* ensure ins->sreg1 is not NULL */
4726 }
4739 else
4757 }
4787 /* r11 = args buffer filled by mono_arch_get_dyn_call_args () */
4789 /* r10 = ftn */
4792 /* Save args buffer */
4795 /* Set fp arg regs */
4796 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, has_fp), sizeof (mgreg_t));
4801 amd64_sse_movsd_reg_membase (code, i, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + (i * sizeof (double)));
4804 /* Allocate param area */
4805 /* This doesn't need to be freed since OP_DYN_CALL is never called in a loop */
4806 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, nstack_args), 8);
4809 /* Set stack args */
4810 /* rax/rcx/rdx/r8/r9 is scratch */
4815 amd64_mov_reg_membase (code, limit_reg, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, nstack_args), 8);
4817 amd64_lea_membase (code, src_reg, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + ((PARAM_REGS) * sizeof(mgreg_t)));
4833 /* Set argument registers */
4835 amd64_mov_reg_membase (code, param_regs [i], AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + (i * sizeof(mgreg_t)), sizeof(mgreg_t));
4837 /* Make the call */
4843 /* Save result */
4846 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs), AMD64_XMM0);
4847 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + sizeof (double), AMD64_XMM1);
4849 }
4852 amd64_mov_membase_reg (code, lmf_var->inst_basereg, lmf_var->inst_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
4854 }
4879 else
4890 }
4896 amd64_test_membase_imm_size (code, ins->sreg1, MONO_STRUCT_OFFSET (MonoVTable, initialized), 1, 1);
4900 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_generic_class_init", FALSE);
4906 }
4909 amd64_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
4918 /* keep alignment */
4946 }
4950 }
4954 }
4962 }
4970 }
4972 /* Align stack */
4976 /*
4977 * ins->inst_eh_blocks and bb->clause_holes are part of same GList.
4978 * Holes from bb->clause_holes will be added separately for the entire
4979 * basic block. Add only the rest of them.
4980 */
4983 /* Restore stack alignment */
4987 /* Even though we're saving RSP, use sizeof */
4988 /* gpointer because spvar is of type IntPtr */
4989 /* see: mono_create_spvar_for_region */
4991 amd64_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, AMD64_RSP, sizeof(gpointer));
4996 amd64_alu_reg_imm (code, X86_SUB, AMD64_RSP, ALIGN_TO (cfg->param_area, MONO_ARCH_FRAME_ALIGNMENT));
4997 }
4999 }
5002 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5005 }
5008 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5009 /* The local allocator will put the result into RAX */
5012 }
5021 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
5022 //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
5023 //break;
5031 else
5033 }
5059 amd64_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
5082 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], (const char *)ins->inst_p1);
5099 /* floating point opcodes */
5105 }
5109 }
5111 }
5118 else
5120 }
5126 }
5128 }
5139 /* This requires a double->single conversion */
5141 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
5142 }
5150 }
5158 }
5169 }
5180 }
5241 /* Based on gcc code */
5245 /* Positive case */
5250 /* Negative case */
5251 /* Save to the red zone */
5261 /* Restore */
5266 }
5291 }
5324 }
5339 }
5365 }
5418 /*
5419 * The two arguments are swapped because the fbranch instructions
5420 * depend on this for the non-sse case to work.
5421 */
5425 /*
5426 * FIXME: Get rid of this.
5427 * The two arguments are swapped because the fbranch instructions
5428 * depend on this for the non-sse case to work.
5429 */
5434 /* zeroing the register at the start results in
5435 * shorter and faster code (we can also remove the widening op)
5436 */
5455 }
5457 }
5460 /* zeroing the register at the start results in
5461 * shorter and faster code (we can also remove the widening op)
5462 */
5477 }
5479 }
5489 }
5492 /* zeroing the register at the start results in
5493 * shorter and faster code (we can also remove the widening op)
5494 */
5506 }
5508 }
5518 }
5552 }
5568 }
5570 }
5596 }
5618 }
5620 }
5627 }
5629 /* Branch if C013 != 100 */
5630 /* branch if !ZF or (PF|CF) */
5647 /* skip branch if C1=1 */
5650 /* branch if (C0 | C3) = 1 */
5656 }
5659 /* Branch if C013 == 100 or 001 */
5662 /* skip branch if C1=1 */
5665 /* branch if (C0 | C3) = 1 */
5669 }
5671 /* Branch if C013 == 000 */
5675 /* Branch if C013=000 or 100 */
5678 /* skip branch if C1=1 */
5681 /* branch if C0=0 */
5685 }
5687 /* Branch if C013 != 001 */
5692 /* Transfer value to the fp stack */
5710 }
5714 }
5719 }
5731 /* dreg contains the old value, add with sreg2 value */
5738 }
5743 /* LOCK prefix is implied. */
5748 }
5751 guint32 size;
5755 else
5758 /*
5759 * See http://msdn.microsoft.com/en-us/magazine/cc302329.aspx for
5760 * an explanation of how this works.
5761 */
5772 }
5776 }
5780 }
5784 }
5788 }
5792 }
5796 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, ins->opcode == OP_ATOMIC_LOAD_U4 ? 4 : 8);
5798 }
5803 }
5807 }
5835 }
5842 }
5845 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
5850 }
5861 }
5867 gpointer card_table_mask;
5874 /*If either point to the stack we can simply avoid the WB. This happens due to
5875 * optimizations revealing a stack store that was not visible when op_cardtable was emited.
5876 */
5880 /*
5881 * We need one register we can clobber, we choose EDX and make sreg1
5882 * fixed EAX to work around limitations in the local register allocator.
5883 * sreg2 might get allocated to EDX, but that is not a problem since
5884 * we use it before clobbering EDX.
5885 */
5888 /*
5889 * This is the code we produce:
5890 *
5891 * edx = value
5892 * edx >>= nursery_shift
5893 * cmp edx, (nursery_start >> nursery_shift)
5894 * jne done
5895 * edx = ptr
5896 * edx >>= card_table_shift
5897 * edx += cardtable
5898 * [edx] = 1
5899 * done:
5900 */
5907 /*
5908 * The value we need to compare against is 64 bits, so we need
5909 * another spare register. We use RBX, which we save and
5910 * restore.
5911 */
5918 }
5920 }
5926 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GC_CARD_TABLE_ADDR, card_table);
5934 }
5935 #ifdef MONO_ARCH_SIMD_INTRINSICS
5936 /* TODO: Some of these IR opcodes are marked as no clobber when they indeed do. */
6326 /*TODO: This is appart of the sse spec but not added
6327 case OP_PSARQ:
6328 amd64_sse_psraq_reg_imm (code, ins->dreg, ins->inst_imm);
6329 break;
6330 case OP_PSARQ_REG:
6331 amd64_sse_psraq_reg_reg (code, ins->dreg, ins->sreg2);
6332 break;
6333 */
6378 }
6389 /*amd64_movd_reg_xreg_size (code, ins->dreg, ins->sreg1, 4);
6390 if (ins->inst_c0)
6391 amd64_shift_reg_imm_size (code, X86_SHR, ins->dreg, 16, 4);*/
6398 else
6408 /*sreg1 is the extracted ireg (scratch)
6409 /sreg2 is the to be inserted ireg (scratch)
6410 /dreg is the xreg to receive the value*/
6412 /*clear the bits from the extracted word*/
6414 /*shift the value to insert if needed*/
6417 /*join them together*/
6430 else
6439 else
6446 else
6454 else
6462 else
6466 }
6471 else
6495 /*FIXME the peephole pass should have killed this*/
6530 }
6552 }
6559 #endif
6562 printf ("R%d START=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6565 }
6568 printf ("R%d END=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6571 }
6579 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_threads_state_poll", FALSE);
6582 }
6599 amd64_mov_membase_reg (code, ins->sreg1, MONO_STRUCT_OFFSET (MonoContext, gregs) + i * sizeof (mgreg_t), i, sizeof (mgreg_t));
6604 }
6610 }
6611 }
6614 }
6618 void
6620 {
6621 /* The signature doesn't matter */
6622 mono_register_jit_icall (mono_amd64_throw_exception, "mono_amd64_throw_exception", mono_create_icall_signature ("void"), TRUE);
6624 #if defined(TARGET_WIN32) || defined(HOST_WIN32)
6625 #if _MSC_VER
6628 #else
6631 #endif
6632 #endif
6633 }
6635 void
6636 mono_arch_patch_code_new (MonoCompile *cfg, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gpointer target)
6637 {
6640 /*
6641 * Debug code to help track down problems where the target of a near call is
6642 * is not valid.
6643 */
6659 }
6660 }
6661 }
6664 }
6666 #ifndef DISABLE_JIT
6668 static int
6670 {
6682 }
6684 /*
6685 * This macro is used for testing whenever the unwinder works correctly at every point
6686 * where an async exception can happen.
6687 */
6688 /* This will generate a SIGSEGV at the given point in the code */
6689 #define async_exc_point(code) do { \
6690 if (mono_inject_async_exc_method && mono_method_desc_full_match (mono_inject_async_exc_method, cfg->method)) { \
6691 if (cfg->arch.async_point_count == mono_inject_async_exc_pos) \
6692 amd64_mov_reg_mem (code, AMD64_RAX, 0, 4); \
6693 cfg->arch.async_point_count ++; \
6694 } \
6695 } while (0)
6697 #ifdef TARGET_WIN32
6699 emit_prolog_setup_sp_win64 (MonoCompile *cfg, guint8 *code, int alloc_size, int *cfa_offset_input)
6700 {
6703 /* Allocate windows stack frame using stack probing method */
6709 }
6716 }
6718 // NOTE, in a standard win64 prolog the alloc unwind info is always emitted, but since mono
6719 // uses a frame pointer with negative offsets and a standard win64 prolog assumes positive offsets, we can't
6720 // emit sp alloc unwind metadata since the native OS unwinder will incorrectly restore sp. Excluding the alloc
6721 // metadata on the other hand won't give the OS the information so it can just restore the frame pointer to sp and
6722 // that will retrieve the expected results.
6725 }
6729 }
6732 guint8 *
6734 {
6753 /* Amount of stack space allocated by register saving code */
6756 /* Offset between RSP and the CFA */
6759 /*
6760 * The prolog consists of the following parts:
6761 * FP present:
6762 * - push rbp
6763 * - mov rbp, rsp
6764 * - save callee saved regs using moves
6765 * - allocate frame
6766 * - save rgctx if needed
6767 * - save lmf if needed
6768 * FP not present:
6769 * - allocate frame
6770 * - save rgctx if needed
6771 * - save lmf if needed
6772 * - save callee saved regs using moves
6773 */
6775 // CFA = sp + 8
6778 // IP saved at CFA - 8
6789 /* These are handled automatically by the stack marking code */
6796 }
6798 /* The param area is always at offset 0 from sp */
6799 /* This needs to be allocated here, since it has to come after the spill area */
6802 // FIXME:
6805 }
6808 /*
6809 * On enter, the stack is misaligned by the pushing of the return
6810 * address. It is either made aligned by the pushing of %rbp, or by
6811 * this.
6812 */
6816 /* Mark the padding slot as NOREF */
6818 }
6822 /* Mark the padding slot as NOREF */
6824 }
6827 }
6831 /* Allocate stack frame */
6832 #ifdef TARGET_WIN32
6834 #else
6836 /* See mono_emit_stack_alloc */
6837 #if defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
6840 /* Use a loop for large sizes */
6854 }
6857 }
6859 guint32 required_code_size = ((remaining_size / 0x1000) + 1) * 11; /*11 is the max size of amd64_alu_reg_imm + amd64_test_membase_reg*/
6867 }
6874 }
6879 }
6886 }
6887 }
6888 #else
6894 }
6895 #endif
6896 }
6897 #endif
6899 /* Stack alignment check */
6900 #if 0
6901 {
6911 }
6912 #endif
6915 /* Fill the stack frame with a dummy value to force deterministic behavior */
6917 /* Save registers to the red zone */
6931 }
6933 /* Save LMF */
6937 /* Save callee saved registers */
6940 /* Save caller saved registers after sp is adjusted */
6941 /* The registers are saved at the bottom of the frame */
6942 /* FIXME: Optimize this so the regs are saved at the end of the frame in increasing order */
6944 /* The registers are saved just below the saved rbp */
6946 }
6954 /* These are handled automatically by the stack marking code */
6958 // FIXME: GC
6959 }
6963 }
6964 }
6966 /* store runtime generic context */
6971 amd64_mov_membase_reg (code, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, sizeof(gpointer));
6973 mono_add_var_location (cfg, cfg->rgctx_var, TRUE, MONO_ARCH_RGCTX_REG, 0, 0, code - cfg->native_code);
6974 mono_add_var_location (cfg, cfg->rgctx_var, FALSE, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, code - cfg->native_code, 0);
6975 }
6977 /* compute max_length in order to use short forward jumps */
6984 /* max alignment for loops */
6990 }
6992 /* Take prolog and epilog instrumentation into account */
6997 }
6998 }
7006 /* Save volatile arguments to the stack */
7008 amd64_mov_membase_reg (code, cfg->vret_addr->inst_basereg, cfg->vret_addr->inst_offset, cinfo->ret.reg, 8);
7009 }
7011 /* Keep this in sync with emit_load_volatile_arguments */
7018 /* Unused arguments */
7021 /* Save volatile arguments to the stack */
7027 /* FIXME: I1 etc */
7028 /*
7029 if (stack_offset & 0x1)
7030 size = 1;
7031 else if (stack_offset & 0x2)
7032 size = 2;
7033 else if (stack_offset & 0x4)
7034 size = 4;
7035 else
7036 size = 8;
7037 */
7040 /*
7041 * Save the original location of 'this',
7042 * get_generic_info_from_stack_frame () needs this to properly look up
7043 * the argument value during the handling of async exceptions.
7044 */
7047 mono_add_var_location (cfg, ins, FALSE, ins->inst_basereg, ins->inst_offset, code - cfg->native_code, 0);
7048 }
7050 }
7061 amd64_mov_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad], sizeof(mgreg_t));
7064 amd64_movss_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad]);
7067 amd64_movsd_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad]);
7073 }
7074 }
7078 amd64_mov_membase_reg (code, ins->inst_left->inst_basereg, ins->inst_left->inst_offset, ainfo->pair_regs [0], sizeof (gpointer));
7087 }
7089 /* Argument allocated to (non-volatile) register */
7099 }
7104 }
7105 }
7106 }
7114 }
7116 /*
7117 * Optimize the common case of the first bblock making a call with the same
7118 * arguments as the method. This works because the arguments are still in their
7119 * original argument registers.
7120 * FIXME: Generalize this
7121 */
7131 }
7144 if (((next->opcode == OP_LOAD_MEMBASE) || (next->opcode == OP_LOADI4_MEMBASE)) && next->inst_basereg == ins->inst_basereg && next->inst_offset == ins->inst_offset) {
7151 /* Only continue if the instruction doesn't change argument regs */
7154 }
7155 }
7157 }
7160 }
7162 /* Argument allocated to (non-volatile) register */
7168 }
7172 }
7173 }
7177 //next = mono_inst_list_next (&next->node, &first_bb->ins_list);
7180 }
7181 }
7182 }
7187 /* Initialize seq_point_info_var */
7189 /* Initialize the variable from a GOT slot */
7190 /* Same as OP_AOTCONST */
7191 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_SEQ_POINT_INFO, cfg->method);
7195 }
7198 /* Initialize ss_tramp_var */
7203 amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, MONO_STRUCT_OFFSET (SeqPointInfo, ss_tramp_addr), 8);
7206 /* Initialize ss_tramp_var */
7213 /* Initialize bp_tramp_var */
7219 }
7220 }
7227 }
7229 void
7231 {
7246 }
7251 /* Mark the start of the epilog */
7254 /* Save the uwind state which is needed by the out-of-line code */
7260 /* the code restoring the registers must be kept in sync with OP_TAILCALL */
7264 amd64_mov_reg_membase (code, AMD64_RBP, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), 8);
7266 /*
7267 * emit_setup_lmf () marks RBP as saved, we have to mark it as same value here before clearing up the stack
7268 * since its stack slot will become invalid.
7269 */
7271 }
7273 /* Restore callee saved regs */
7276 /* Restore only used_int_regs, not arch.saved_iregs */
7277 #if defined(MONO_SUPPORT_TASKLETS)
7279 #else
7281 #endif
7286 }
7288 }
7289 }
7291 /* Load returned vtypes into registers if needed */
7300 amd64_mov_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_size [quad]);
7303 amd64_movss_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)));
7306 amd64_movsd_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)));
7312 }
7313 }
7314 }
7319 }
7321 #ifdef TARGET_WIN32
7325 #else
7328 #endif
7329 }
7334 /* Restore the unwind state to be the same as before the epilog */
7340 }
7342 void
7344 {
7352 /* Compute needed space */
7362 }
7368 }
7372 /* add code to raise exceptions */
7379 guint32 throw_ip;
7386 //x86_breakpoint (code);
7387 /* Find a throw sequence for the same exception class */
7395 }
7404 }
7405 amd64_mov_reg_imm (code, AMD64_ARG_REG1, m_class_get_type_token (exc_class) - MONO_TOKEN_TYPE_DEF);
7409 code = emit_call_body (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_arch_throw_corlib_exception");
7417 nthrows ++;
7418 }
7419 }
7421 }
7423 /* do nothing */
7425 }
7427 }
7429 /* Handle relocations with RIP relative addressing */
7438 guint32 target_pos;
7440 /* The SSE opcodes require a 16 byte alignment */
7447 }
7451 }
7459 }
7465 }
7472 /*loading is faster against aligned addresses.*/
7478 /*alu_op [rex] modr/m imm32 - 7 or 8 bytes */
7481 else
7489 }
7492 }
7501 ;
7503 }
7504 }
7506 }
7512 }
7518 {
7524 /* Keep this in sync with mono_arch_get_argument_info */
7527 /* Allocate a new area on the stack and save arguments there */
7546 }
7547 }
7548 }
7559 }
7562 SAVE_NONE,
7563 SAVE_STRUCT,
7564 SAVE_EAX,
7565 SAVE_EAX_EDX,
7566 SAVE_XMM
7567 };
7571 {
7579 /* special case string .ctor icall */
7582 else
7597 }
7598 /* Fall through */
7605 }
7607 /* Save the result and copy it into the proper argument register */
7611 /* Align stack */
7617 /* FIXME: */
7624 /* Align stack */
7626 /*
7627 * The result is already in the proper argument register so no copying
7628 * needed.
7629 */
7635 }
7637 /* Set %al since this is a varargs call */
7643 /* Restore result */
7650 /* FIXME: */
7661 }
7664 }
7666 void
7668 {
7669 /* Not needed */
7670 }
7672 void
7674 {
7675 }
7677 gboolean
7679 {
7681 }
7683 /*
7684 * Determine whenever the trap whose info is in SIGINFO is caused by
7685 * integer overflow.
7686 */
7687 gboolean
7689 {
7690 MonoContext ctx;
7693 gint64 value;
7701 rip ++;
7702 }
7703 else
7706 if ((rip [0] == 0xf7) && (x86_modrm_mod (rip [1]) == 0x3) && (x86_modrm_reg (rip [1]) == 0x7)) {
7707 /* idiv REG */
7714 }
7717 }
7719 guint32
7721 {
7723 }
7725 /**
7726 * \return TRUE if no sw breakpoint was present.
7727 *
7728 * Copy \p size bytes from \p code - \p offset to the buffer \p buf. If the debugger inserted software
7729 * breakpoints in the original code, they are removed in the copy.
7730 */
7731 gboolean
7732 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
7733 {
7734 /*
7735 * If method_start is non-NULL we need to perform bound checks, since we access memory
7736 * at code - offset we could go before the start of the method and end up in a different
7737 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
7738 * instead.
7739 */
7746 }
7748 }
7750 int
7752 {
7754 }
7756 gpointer
7758 {
7760 }
7762 #define MAX_ARCH_DELEGATE_PARAMS 10
7764 static gpointer
7766 {
7774 start = code = (guint8 *)mono_global_codeman_reserve (64 + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7776 /* Replace the this argument with the target */
7778 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7782 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
7784 start = code = (guint8 *)mono_global_codeman_reserve (64 + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7789 /* We have to shift the arguments left */
7792 #ifdef TARGET_WIN32
7795 else
7797 #else
7799 #endif
7800 }
7803 }
7805 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
7806 }
7811 *info = mono_tramp_info_create ("delegate_invoke_impl_has_target", start, code - start, NULL, unwind_ops);
7816 }
7822 else
7827 }
7828 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL));
7831 }
7833 #define MAX_VIRTUAL_DELEGATE_OFFSET 32
7835 static gpointer
7837 {
7846 start = code = (guint8 *)mono_global_codeman_reserve (size + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7850 /* Replace the this argument with the target */
7852 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7855 /* Load the IMT reg */
7856 amd64_mov_reg_membase (code, MONO_ARCH_IMT_REG, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, method), 8);
7857 }
7859 /* Load the vtable */
7860 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_ARG_REG1, MONO_STRUCT_OFFSET (MonoObject, vtable), 8);
7862 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL));
7869 }
7871 /*
7872 * mono_arch_get_delegate_invoke_impls:
7873 *
7874 * Return a list of MonoTrampInfo structures for the delegate invoke impl
7875 * trampolines.
7876 */
7877 GSList*
7879 {
7890 }
7895 }
7902 }
7905 }
7907 gpointer
7909 {
7916 /* FIXME: Support more cases */
7932 }
7957 }
7962 }
7965 }
7967 gpointer
7968 mono_arch_get_delegate_virtual_invoke_impl (MonoMethodSignature *sig, MonoMethod *method, int offset, gboolean load_imt_reg)
7969 {
7971 gpointer code;
7977 }
7979 void
7981 {
7982 #if !defined(HOST_WIN32) && defined(MONO_XEN_OPT)
7984 #endif
7985 }
7987 void
7989 {
7990 }
7992 #define CMP_SIZE (6 + 1)
7993 #define CMP_REG_REG_SIZE (4 + 1)
7994 #define BR_SMALL_SIZE 2
7995 #define BR_LARGE_SIZE 6
7996 #define MOV_REG_IMM_SIZE 10
7997 #define MOV_REG_IMM_32BIT_SIZE 6
7998 #define JUMP_REG_SIZE (2 + 1)
8000 static int
8002 {
8007 }
8009 /*
8010 * LOCKING: called with the domain lock held
8011 */
8012 gpointer
8013 mono_arch_build_imt_trampoline (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
8014 gpointer fail_tramp)
8015 {
8029 else
8031 }
8037 else
8039 }
8048 else
8051 /* with assert below:
8052 * item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
8053 */
8054 }
8055 }
8059 else
8063 }
8065 }
8067 code = (guint8 *)mono_method_alloc_generic_virtual_trampoline (domain, size + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
8068 else
8083 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8087 }
8088 }
8095 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8097 }
8104 }
8106 /* enable the commented code to assert on wrong method */
8107 #if 0
8109 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8113 }
8116 /* See the comment below about R10 */
8117 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8122 #else
8123 /* We're using R10 (MONO_ARCH_IMT_SCRATCH_REG) here because R11 (MONO_ARCH_IMT_REG)
8124 needs to be preserved. R10 needs
8125 to be preserved for calls which
8126 require a runtime generic context,
8127 but interface calls don't. */
8128 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8130 #endif
8131 }
8134 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof (gpointer));
8138 }
8142 else
8144 }
8146 }
8147 /* patch the branches to get to the target items */
8153 }
8154 }
8155 }
8160 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
8162 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_IMT_TRAMPOLINE, NULL));
8164 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
8167 }
8169 MonoMethod*
8171 {
8173 }
8175 MonoVTable*
8177 {
8179 }
8181 GSList*
8183 {
8190 }
8192 #ifndef DISABLE_JIT
8194 MonoInst*
8195 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
8196 {
8209 }
8217 }
8239 }
8240 }
8249 }
8251 #if 0
8252 /* OP_FREM is not IEEE compatible */
8257 }
8258 #endif
8259 }
8262 }
8263 #endif
8265 mgreg_t
8267 {
8269 }
8271 void
8273 {
8275 }
8277 /*
8278 * mono_arch_emit_load_aotconst:
8279 *
8280 * Emit code to load the contents of the GOT slot identified by TRAMP_TYPE and
8281 * TARGET from the mscorlib GOT in full-aot code.
8282 * On AMD64, the result is placed into R11.
8283 */
8284 guint8*
8285 mono_arch_emit_load_aotconst (guint8 *start, guint8 *code, MonoJumpInfo **ji, MonoJumpInfoType tramp_type, gconstpointer target)
8286 {
8291 }
8293 /*
8294 * mono_arch_get_trampolines:
8295 *
8296 * Return a list of MonoTrampInfo structures describing arch specific trampolines
8297 * for AOT.
8298 */
8299 GSList *
8301 {
8303 }
8305 /* Soft Debug support */
8306 #ifdef MONO_ARCH_SOFT_DEBUG_SUPPORTED
8308 /*
8309 * mono_arch_set_breakpoint:
8310 *
8311 * Set a breakpoint at the native code corresponding to JI at NATIVE_OFFSET.
8312 * The location should contain code emitted by OP_SEQ_POINT.
8313 */
8314 void
8316 {
8321 SeqPointInfo *info = (SeqPointInfo *)mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8326 /* ip points to a mov r11, 0 */
8330 }
8331 }
8333 /*
8334 * mono_arch_clear_breakpoint:
8335 *
8336 * Clear the breakpoint at IP.
8337 */
8338 void
8340 {
8345 SeqPointInfo *info = (SeqPointInfo *)mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8350 }
8351 }
8353 gboolean
8355 {
8356 /* We use soft breakpoints on amd64 */
8358 }
8360 /*
8361 * mono_arch_skip_breakpoint:
8362 *
8363 * Modify CTX so the ip is placed after the breakpoint instruction, so when
8364 * we resume, the instruction is not executed again.
8365 */
8366 void
8368 {
8370 }
8372 /*
8373 * mono_arch_start_single_stepping:
8374 *
8375 * Start single stepping.
8376 */
8377 void
8379 {
8381 }
8383 /*
8384 * mono_arch_stop_single_stepping:
8385 *
8386 * Stop single stepping.
8387 */
8388 void
8390 {
8392 }
8394 /*
8395 * mono_arch_is_single_step_event:
8396 *
8397 * Return whenever the machine state in SIGCTX corresponds to a single
8398 * step event.
8399 */
8400 gboolean
8402 {
8403 /* We use soft breakpoints on amd64 */
8405 }
8407 /*
8408 * mono_arch_skip_single_step:
8409 *
8410 * Modify CTX so the ip is placed after the single step trigger instruction,
8411 * we resume, the instruction is not executed again.
8412 */
8413 void
8415 {
8417 }
8419 /*
8420 * mono_arch_create_seq_point_info:
8421 *
8422 * Return a pointer to a data structure which is used by the sequence
8423 * point implementation in AOTed code.
8424 */
8425 gpointer
8427 {
8431 // FIXME: Add a free function
8435 code);
8442 // FIXME: Optimize the size
8443 info = (SeqPointInfo *)g_malloc0 (sizeof (SeqPointInfo) + (ji->code_size * sizeof (gpointer)));
8451 }
8454 }
8456 #endif
8458 gboolean
8460 {
8491 }
8492 }
8494 CallInfo*
8496 {
8498 }