| blob | 0846fef65f20adbbe9e8f2f81816133956d9df23 |
1 /**
2 * \file
3 * AMD64 backend for the Mono code generator
4 *
5 * Based on mini-x86.c.
6 *
7 * Authors:
8 * Paolo Molaro (lupus@ximian.com)
9 * Dietmar Maurer (dietmar@ximian.com)
10 * Patrik Torstensson
11 * Zoltan Varga (vargaz@gmail.com)
12 * Johan Lorensson (lateralusx.github@gmail.com)
13 *
14 * (C) 2003 Ximian, Inc.
15 * Copyright 2003-2011 Novell, Inc (http://www.novell.com)
16 * Copyright 2011 Xamarin, Inc (http://www.xamarin.com)
17 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
18 */
20 #include <string.h>
21 #include <math.h>
22 #include <assert.h>
23 #ifdef HAVE_UNISTD_H
24 #include <unistd.h>
25 #endif
27 #include <mono/metadata/abi-details.h>
28 #include <mono/metadata/appdomain.h>
29 #include <mono/metadata/debug-helpers.h>
30 #include <mono/metadata/threads.h>
31 #include <mono/metadata/profiler-private.h>
32 #include <mono/metadata/mono-debug.h>
33 #include <mono/metadata/gc-internals.h>
34 #include <mono/utils/mono-math.h>
35 #include <mono/utils/mono-mmap.h>
36 #include <mono/utils/mono-memory-model.h>
37 #include <mono/utils/mono-tls.h>
38 #include <mono/utils/mono-hwcap.h>
39 #include <mono/utils/mono-threads.h>
40 #include <mono/utils/unlocked.h>
52 #ifdef MONO_XEN_OPT
54 #else
55 #define optimize_for_xen 0
56 #endif
61 #define IS_IMM32(val) ((((guint64)val) >> 32) == 0)
63 #define IS_REX(inst) (((inst) >= 0x40) && ((inst) <= 0x4f))
65 #ifdef TARGET_WIN32
66 /* Under windows, the calling convention is never stdcall */
67 #define CALLCONV_IS_STDCALL(call_conv) (FALSE)
68 #else
69 #define CALLCONV_IS_STDCALL(call_conv) ((call_conv) == MONO_CALL_STDCALL)
70 #endif
72 /* This mutex protects architecture specific caches */
73 #define mono_mini_arch_lock() mono_os_mutex_lock (&mini_arch_mutex)
74 #define mono_mini_arch_unlock() mono_os_mutex_unlock (&mini_arch_mutex)
77 /* The single step trampoline */
80 /* The breakpoint trampoline */
83 /* Offset between fp and the first argument in the callee */
84 #define ARGS_OFFSET 16
85 #define GP_SCRATCH_REG AMD64_R11
87 /* Max number of bblocks before we bail from using more advanced branch placement code */
88 #define MAX_BBLOCKS_FOR_BRANCH_OPTS 800
90 /*
91 * AMD64 register usage:
92 * - callee saved registers are used for global register allocation
93 * - %r11 is used for materializing 64 bit constants in opcodes
94 * - the rest is used for local allocation
95 */
97 /*
98 * Floating point comparison results:
99 * ZF PF CF
100 * A > B 0 0 0
101 * A < B 0 0 1
102 * A = B 1 0 0
103 * A > B 0 0 0
104 * UNORDERED 1 1 1
105 */
109 {
127 }
129 }
134 };
139 };
143 {
146 else
148 }
152 {
155 else
157 }
159 static gboolean
161 {
162 #if 0
164 #else
166 #endif
167 }
171 {
172 /* Skip REX */
177 }
181 {
186 }
188 static void
190 {
191 // NOTE: Sometimes code has just been generated, is not running yet,
192 // and has no alignment requirements. Sometimes it could be running while we patch it,
193 // and there are alignment requirements.
194 // FIXME Assert alignment.
198 /* Skip REX */
202 }
205 /* amd64_set_reg_template */
207 }
208 else if ((code [0] == 0x8b) && rex && x86_modrm_mod (code [1]) == 0 && x86_modrm_rm (code [1]) == 5) {
209 /* mov 0(%rip), %dreg */
211 }
213 /* call or jmp *<OFFSET>(%rip) */
215 }
217 /* call or jmp <DISP> */
221 }
222 else
224 }
226 void
228 {
230 }
232 #define DEBUG(a) if (cfg->verbose_level > 1) a
236 {
242 /* Since the same stack slot size is used for all arg */
243 /* types, it needs to be big enough to hold them all */
245 }
250 }
251 }
255 {
261 /* Since the same stack slot size is used for both float */
262 /* types, it needs to be big enough to hold them both */
264 }
266 /* A double register */
269 else
273 }
274 }
277 ARG_CLASS_NO_CLASS,
278 ARG_CLASS_MEMORY,
279 ARG_CLASS_INTEGER,
280 ARG_CLASS_SSE
283 static ArgumentClass
285 {
308 #ifdef TARGET_WIN32
310 #else
312 #endif
322 }
323 /* fall through */
331 }
333 }
336 }
338 /* Merge */
340 ;
347 else
351 }
358 /*
359 * collect_field_info_nested:
360 *
361 * Collect field info from KLASS recursively into FIELDS.
362 */
363 static void
364 collect_field_info_nested (MonoClass *klass, GArray *fields_array, int offset, gboolean pinvoke, gboolean unicode)
365 {
374 collect_field_info_nested (mono_class_from_mono_type_internal (info->fields [i].field->type), fields_array, info->fields [i].offset, pinvoke, unicode);
376 guint32 align;
377 StructFieldInfo f;
385 /* This can happen with .pack directives eg. 'fixed' arrays */
387 /* Replicate the last field to fill out the remaining place, since the code in add_valuetype () needs type information */
392 }
396 }
399 }
400 }
401 }
403 gpointer iter;
411 collect_field_info_nested (mono_class_from_mono_type_internal (field->type), fields_array, field->offset - MONO_ABI_SIZEOF (MonoObject), pinvoke, unicode);
414 StructFieldInfo f;
421 }
422 }
423 }
424 }
426 #ifdef TARGET_WIN32
428 /* Windows x64 ABI can pass/return value types in register of size 1,2,4,8 bytes. */
429 #define MONO_WIN64_VALUE_TYPE_FITS_REG(arg_size) (arg_size <= SIZEOF_REGISTER && (arg_size == 1 || arg_size == 2 || arg_size == 4 || arg_size == 8))
431 static gboolean
432 allocate_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, const AMD64_Reg_No int_regs [], int int_reg_count, const AMD64_XMM_Reg_No float_regs [], int float_reg_count, guint32 *current_int_reg, guint32 *current_float_reg)
433 {
436 assert (arg_info != NULL && int_regs != NULL && float_regs != NULL && current_int_reg != NULL && current_float_reg != NULL);
446 /* Pass parameter in integer register. */
452 /* Pass parameter in float register. */
453 arg_info->pair_storage [0] = (arg_size <= sizeof (gfloat)) ? ArgInFloatSSEReg : ArgInDoubleSSEReg;
457 }
462 }
465 }
468 allocate_parameter_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
469 {
470 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, param_regs, PARAM_REGS, float_param_regs, FLOAT_PARAM_REGS, current_int_reg, current_float_reg);
471 }
474 allocate_return_register_for_valuetype_win64 (ArgInfo *arg_info, ArgumentClass arg_class, guint32 arg_size, guint32 *current_int_reg, guint32 *current_float_reg)
475 {
476 return allocate_register_for_valuetype_win64 (arg_info, arg_class, arg_size, return_regs, RETURN_REGS, float_return_regs, FLOAT_RETURN_REGS, current_int_reg, current_float_reg);
477 }
479 static void
480 allocate_storage_for_valuetype_win64 (ArgInfo *arg_info, MonoType *type, gboolean is_return, ArgumentClass arg_class,
482 {
483 /* Windows x64 value type ABI.
484 *
485 * Parameters: https://msdn.microsoft.com/en-us/library/zthk2dkh.aspx
486 *
487 * Integer/Float types smaller than or equals to 8 bytes or porperly sized struct/union (1,2,4,8)
488 * Try pass in register using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8), if no more registers, pass on stack using ArgOnStack as storage and size of parameter(1,2,4,8).
489 * Integer/Float types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
490 * Try to pass pointer in register using ArgValuetypeAddrInIReg, if no more registers, pass pointer on stack using ArgValuetypeAddrOnStack as storage and parameter size of register (8 bytes).
491 *
492 * Return values: https://msdn.microsoft.com/en-us/library/7572ztz4.aspx.
493 *
494 * Integers/Float types smaller than or equal to 8 bytes
495 * Return in corresponding register RAX/XMM0 using ArgValuetypeInReg/(ArgInIReg|ArgInFloatSSEReg|ArgInDoubleSSEReg) as storage and size of parameter(1,2,4,8).
496 * Properly sized struct/unions (1,2,4,8)
497 * Return in register RAX using ArgValuetypeInReg as storage and size of parameter(1,2,4,8).
498 * Types bigger than 8 bytes or struct/unions larger than 8 bytes or (3,5,6,7).
499 * Return pointer to allocated stack space (allocated by caller) using ArgValuetypeAddrInIReg as storage and parameter size.
500 */
502 assert (arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
506 /* Parameter cases. */
510 /* First, try to use registers for parameter. If type is struct it can only be passed by value in integer register. */
512 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
513 /* No more registers, fallback passing parameter on stack as value. */
514 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
516 /* Passing value directly on stack, so use size of value. */
522 }
524 /* Fallback to stack, try to pass address to parameter in register. Always use integer register to represent stack address. */
526 if (!allocate_parameter_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg)) {
527 /* No more registers, fallback passing address to parameter on stack. */
528 assert (arg_info->pair_storage [0] == ArgNone && arg_info->pair_storage [1] == ArgNone && arg_info->pair_size [0] == 0 && arg_info->pair_size [1] == 0 && arg_info->nregs == 0);
530 /* Passing an address to value on stack, so use size of register as argument size. */
536 }
537 }
539 /* Return value cases. */
543 /* Return value fits into return registers. If type is struct it can only be returned by value in integer register. */
545 allocate_return_register_for_valuetype_win64 (arg_info, !MONO_TYPE_ISSTRUCT (type) ? arg_class : ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
547 /* Only RAX/XMM0 should be used to return valuetype. */
548 assert ((arg_info->pair_regs[0] == AMD64_RAX && arg_info->pair_regs[1] == ArgNone) || (arg_info->pair_regs[0] == AMD64_XMM0 && arg_info->pair_regs[1] == ArgNone));
550 /* Return value doesn't fit into return register, return address to allocated stack space (allocated by caller and passed as input). */
552 allocate_return_register_for_valuetype_win64 (arg_info, ARG_CLASS_INTEGER, arg_size, current_int_reg, current_float_reg);
554 /* Only RAX should be used to return valuetype address. */
560 }
561 }
562 }
564 static void
565 get_valuetype_size_win64 (MonoClass *klass, gboolean pinvoke, ArgInfo *arg_info, MonoType *type, ArgumentClass *arg_class, guint32 *arg_size)
566 {
570 assert (klass != NULL && arg_info != NULL && type != NULL && arg_class != NULL && arg_size != NULL);
573 /* Calculate argument class type and size of marshalled type. */
577 /* Calculate argument class type and size of managed type. */
579 }
581 /* Windows ABI only handle value types on stack or passed in integer register (if it fits register size). */
585 /* Value type has a size that doesn't seem to fit register according to ABI. Try to used full stack size of type. */
587 }
589 /*
590 * Standard C and C++ doesn't allow empty structs, empty structs will always have a size of 1 byte.
591 * GCC have an extension to allow empty structs, https://gcc.gnu.org/onlinedocs/gcc/Empty-Structures.html.
592 * This cause a little dilemma since runtime build using none GCC compiler will not be compatible with
593 * GCC build C libraries and the other way around. On platforms where empty structs has size of 1 byte
594 * it must be represented in call and cannot be dropped.
595 */
600 }
603 }
605 static void
608 {
611 ArgumentClass arg_class;
613 assert (signature != NULL && arg_info != NULL && type != NULL && current_int_reg != NULL && current_float_reg != NULL && stack_size != NULL);
618 /* Only drop value type if its not an empty struct as input that must be represented in call */
619 if ((arg_size == 0 && !arg_info->pass_empty_struct) || (arg_info->pass_empty_struct && is_return)) {
623 /* Alocate storage for value type. */
624 allocate_storage_for_valuetype_win64 (arg_info, type, is_return, arg_class, arg_size, current_int_reg, current_float_reg, stack_size);
625 }
626 }
630 static void
632 gboolean is_return,
634 {
635 #ifdef TARGET_WIN32
637 #else
639 /* Keep track of the size used in each quad so we can */
640 /* use the right size when copying args/return vars. */
653 /* We pass and return vtypes of size 8 in a register */
656 }
658 /* If this struct can't be split up naturally into 8-byte */
659 /* chunks (registers), pass it on the stack. */
666 }
667 /*
668 * Collect field information recursively to be able to
669 * handle nested structures.
670 */
680 }
681 }
687 }
690 /* Allways pass in memory */
699 }
703 else
712 /* Always pass in 1 or 2 integer registers */
715 /* Only the simplest cases are supported */
719 }
721 /*
722 * Implement the algorithm from section 3.2.3 of the X86_64 ABI.
723 * The X87 and SSEUP stuff is left out since there are no such types in
724 * the CLR.
725 */
730 }
741 }
746 ArgumentClass class1;
750 else
754 /* Unaligned field */
755 NOT_IMPLEMENTED;
756 }
758 /* Skip fields in other quad */
764 /* How far into this quad this data extends.*/
765 /* (8 is size of quad) */
769 }
770 /* Empty structs have a nonzero size, causing this assert to be hit */
774 }
775 }
779 /* Post merger cleanup */
783 /* Allocate registers */
784 {
790 while (quadsize [1] != 0 && quadsize [1] != 1 && quadsize [1] != 2 && quadsize [1] != 4 && quadsize [1] != 8)
809 else
812 }
823 }
831 }
832 }
836 /* Revert possible register assignments */
843 else
849 }
850 }
852 }
854 /*
855 * get_call_info:
856 *
857 * Obtain information about a call according to the calling convention.
858 * For AMD64 System V, see the "System V ABI, x86-64 Architecture Processor Supplement
859 * Draft Version 0.23" document for more information.
860 * For AMD64 Windows, see "Overview of x64 Calling Conventions",
861 * https://msdn.microsoft.com/en-us/library/ms235286.aspx
862 */
865 {
875 else
884 #ifdef TARGET_WIN32
885 /* Reserve space where the callee can save the argument registers */
887 #endif
889 /* return value */
924 }
928 }
929 /* fall through */
937 }
947 }
950 /*
951 * To simplify get_this_arg_reg () and LLVM integration, emit the vret arg after
952 * the first argument, allowing 'this' to be always passed in the first arg reg.
953 * Also do this if the first argument is a reference type, since virtual calls
954 * are sometimes made using calli without sig->hasthis set, like in the delegate
955 * invoke wrappers.
956 */
958 if ((ret_storage == ArgValuetypeAddrInIReg || ret_storage == ArgGsharedvtVariableInReg) && !is_pinvoke && (sig->hasthis || (sig->param_count > 0 && MONO_TYPE_IS_REFERENCE (mini_get_underlying_type (sig->params [0]))))) {
964 }
969 /* this */
976 }
977 }
983 /* Emit the signature cookie just before the implicit arguments */
985 }
991 #ifdef TARGET_WIN32
992 /* The float param registers and other param registers must be the same index on Windows x64.*/
997 #endif
1000 /* We allways pass the sig cookie on the stack for simplicity */
1001 /*
1002 * Prevent implicit arguments + the sig cookie from being passed
1003 * in registers.
1004 */
1008 /* Emit the signature cookie just before the implicit arguments */
1010 }
1040 }
1042 /* gsharedvt arguments are passed by ref */
1046 else
1049 }
1050 /* fall through */
1068 /* gsharedvt arguments are passed by ref */
1073 else
1078 }
1079 }
1081 if (!sig->pinvoke && (sig->call_convention == MONO_CALL_VARARG) && (n > 0) && (sig->sentinelpos == sig->param_count)) {
1085 /* Emit the signature cookie just before the implicit arguments */
1087 }
1093 }
1095 static int
1097 {
1101 }
1103 static gpointer
1105 {
1115 // Empty struct
1120 }
1121 }
1123 static void
1125 {
1129 /* Reconstruct the value type */
1143 }
1144 dest_cast++;
1145 }
1146 }
1148 static void
1150 {
1167 }
1168 src_cast++;
1169 }
1170 }
1172 void
1173 mono_arch_set_native_call_context_args (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1174 {
1177 gpointer storage;
1191 }
1192 }
1202 else
1208 }
1211 }
1213 void
1214 mono_arch_set_native_call_context_ret (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1215 {
1218 gpointer storage;
1233 else
1239 }
1242 }
1244 void
1245 mono_arch_get_native_call_context_args (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1246 {
1249 gpointer storage;
1257 }
1258 }
1269 }
1271 }
1274 }
1276 void
1277 mono_arch_get_native_call_context_ret (CallContext *ccontext, gpointer frame, MonoMethodSignature *sig)
1278 {
1282 gpointer storage;
1284 /* No return value */
1292 /* The return values were stored directly at address passed in reg */
1301 }
1303 }
1306 }
1308 /*
1309 * mono_arch_get_argument_info:
1310 * @csig: a method signature
1311 * @param_count: the number of parameters to consider
1312 * @arg_info: an array to store the result infos
1313 *
1314 * Gathers information on parameters such as size, alignment and
1315 * padding. arg_info should be large enought to hold param_count + 1 entries.
1316 *
1317 * Returns the size of the argument area on the stack.
1318 */
1319 int
1320 mono_arch_get_argument_info (MonoMethodSignature *csig, int param_count, MonoJitArgumentInfo *arg_info)
1321 {
1326 /* The arguments are saved to a stack area in mono_arch_instrument_prolog */
1329 }
1333 /* FIXME: */
1335 }
1340 }
1342 gboolean
1343 mono_arch_tailcall_supported (MonoCompile *cfg, MonoMethodSignature *caller_sig, MonoMethodSignature *callee_sig, gboolean virtual_)
1344 {
1350 // Limit stack_usage to 1G. Assume 32bit limits when we move parameters.
1354 // valuetype parameters are address of local
1360 }
1366 }
1368 /*
1369 * Initialize the cpu to execute managed code.
1370 */
1371 void
1373 {
1374 #ifndef _MSC_VER
1375 guint16 fpcw;
1377 /* spec compliance requires running with double precision */
1383 #else
1384 /* TODO: This is crashing on Win64 right now.
1385 * _control87 (_PC_53, MCW_PC);
1386 */
1387 #endif
1388 }
1390 /*
1391 * Initialize architecture specific code.
1392 */
1393 void
1395 {
1399 mono_aot_register_jit_icall ("mono_amd64_throw_corlib_exception", mono_amd64_throw_corlib_exception);
1402 #if defined(MONO_ARCH_GSHAREDVT_SUPPORTED)
1403 mono_aot_register_jit_icall ("mono_amd64_start_gsharedvt_call", mono_amd64_start_gsharedvt_call);
1404 #endif
1408 }
1410 /*
1411 * Cleanup architecture specific code.
1412 */
1413 void
1415 {
1417 }
1419 /*
1420 * This function returns the optimizations supported on this cpu.
1421 */
1422 guint32
1424 {
1434 else
1438 }
1441 }
1443 /*
1444 * This function test for all SSE functions supported.
1445 *
1446 * Returns a bitmask corresponding to all supported versions.
1447 *
1448 */
1449 guint32
1451 {
1476 }
1478 #ifndef DISABLE_JIT
1480 GList *
1482 {
1490 /* unused vars */
1502 }
1503 }
1508 }
1510 /**
1511 * mono_arch_compute_omit_fp:
1512 * Determine whether the frame pointer can be eliminated.
1513 */
1514 static void
1516 {
1533 /*
1534 * FIXME: Remove some of the restrictions.
1535 */
1544 /*
1545 if (cfg->method->save_lmf)
1546 cfg->arch.omit_fp = FALSE;
1547 */
1559 if (ainfo->storage == ArgOnStack || ainfo->storage == ArgValuetypeAddrInIReg || ainfo->storage == ArgValuetypeAddrOnStack) {
1560 /*
1561 * The stack offset can only be determined when the frame
1562 * size is known.
1563 */
1565 }
1566 }
1574 }
1575 }
1577 GList *
1579 {
1587 /* We use the callee saved registers for global allocation */
1593 #ifdef TARGET_WIN32
1596 #endif
1599 }
1601 /*
1602 * mono_arch_regalloc_cost:
1603 *
1604 * Return the cost, in number of memory references, of the action of
1605 * allocating the variable VMV into a register during global register
1606 * allocation.
1607 */
1608 guint32
1610 {
1614 /* The register is already saved */
1615 /* substract 1 for the invisible store in the prolog */
1617 else
1618 /* push+pop */
1620 }
1622 /*
1623 * mono_arch_fill_argument_info:
1624 *
1625 * Populate cfg->args, cfg->ret and cfg->vret_addr with information about the arguments
1626 * of the method.
1627 */
1628 void
1630 {
1640 /*
1641 * Contrary to mono_arch_allocate_vars (), the information should describe
1642 * where the arguments are at the beginning of the method, not where they can be
1643 * accessed during the execution of the method. The later makes no sense for the
1644 * global register allocator, since a variable can be in more than one location.
1645 */
1662 }
1682 /* Dummy */
1687 }
1688 }
1689 }
1691 void
1693 {
1709 /*
1710 * We use the ABI calling conventions for managed code as well.
1711 * Exception: valuetypes are only sometimes passed or returned in registers.
1712 */
1714 /*
1715 * The stack looks like this:
1716 * <incoming arguments passed on the stack>
1717 * <return value>
1718 * <lmf/caller saved registers>
1719 * <locals>
1720 * <spill area>
1721 * <localloc area> -> grows dynamically
1722 * <params area>
1723 */
1730 /* Locals are allocated backwards from %fp */
1733 }
1737 /* Save all callee-saved registers normally (except RBP, if not already used), and restore them when unwinding through an LMF */
1740 }
1744 /* Reserve space for callee saved registers */
1748 }
1763 /* The register is volatile */
1772 }
1776 }
1779 /* Allocate a local to hold the result, the epilog will copy it to the correct place */
1788 }
1792 }
1793 }
1795 /* Allocate locals */
1796 offsets = mono_allocate_stack_slots (cfg, cfg->arch.omit_fp ? FALSE: TRUE, &locals_stack_size, &locals_stack_align);
1800 }
1807 }
1816 else
1818 //printf ("allocated local %d to ", i); mono_print_tree_nl (ins);
1819 }
1820 }
1827 }
1835 /* FIXME: Allocate volatile arguments to registers */
1839 /*
1840 * Under AMD64, all registers used to pass arguments to functions
1841 * are volatile across calls.
1842 * FIXME: Optimize this.
1843 */
1844 if ((ainfo->storage == ArgInIReg) || (ainfo->storage == ArgInFloatSSEReg) || (ainfo->storage == ArgInDoubleSSEReg) || (ainfo->storage == ArgValuetypeInReg) || (ainfo->storage == ArgGSharedVtInReg))
1857 }
1872 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
1881 }
1885 }
1891 }
1893 NOT_IMPLEMENTED;
1894 }
1896 if (!inreg && (ainfo->storage != ArgOnStack) && (ainfo->storage != ArgValuetypeAddrInIReg) && (ainfo->storage != ArgValuetypeAddrOnStack) && (ainfo->storage != ArgGSharedVtOnStack)) {
1899 /* These arguments are saved to the stack in the prolog */
1903 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (mgreg_t) : sizeof (mgreg_t);
1904 // Arguments are yet supported by the stack map creation code
1905 //cfg->locals_max_stack_offset = MAX (cfg->locals_max_stack_offset, offset);
1907 offset += (ainfo->storage == ArgValuetypeInReg) ? ainfo->nregs * sizeof (mgreg_t) : sizeof (mgreg_t);
1909 //cfg->locals_min_stack_offset = MIN (cfg->locals_min_stack_offset, offset);
1910 }
1911 }
1912 }
1913 }
1916 }
1918 void
1920 {
1933 if (cinfo->ret.storage == ArgValuetypeAddrInIReg || cinfo->ret.storage == ArgGsharedvtVariableInReg) {
1938 }
1939 }
1948 }
1956 }
1963 }
1964 }
1966 static void
1967 add_outarg_reg (MonoCompile *cfg, MonoCallInst *call, ArgStorage storage, int reg, MonoInst *tree)
1968 {
1998 }
1999 }
2001 static int
2003 {
2006 #if defined(__mono_ilp32__)
2008 #else
2010 #endif
2017 }
2020 }
2022 static void
2024 {
2029 NOT_IMPLEMENTED;
2033 /*
2034 * mono_ArgIterator_Setup assumes the signature cookie is
2035 * passed first and all the arguments which were before it are
2036 * passed on the stack after the signature. So compensate by
2037 * passing a different signature.
2038 */
2039 tmp_sig = mono_metadata_signature_dup_full (m_class_get_image (cfg->method->klass), call->signature);
2042 memcpy (tmp_sig->params, call->signature->params + call->signature->sentinelpos, tmp_sig->param_count * sizeof (MonoType*));
2047 MONO_EMIT_NEW_STORE_MEMBASE (cfg, OP_STORE_MEMBASE_REG, AMD64_RSP, cinfo->sig_cookie.offset, sig_reg);
2048 }
2050 #ifdef ENABLE_LLVM
2053 {
2065 }
2066 }
2068 LLVMCallInfo*
2070 {
2083 linfo = mono_mempool_alloc0 (cfg->mempool, sizeof (LLVMCallInfo) + (sizeof (LLVMArgInfo) * n));
2085 /*
2086 * LLVM always uses the native ABI while we use our own ABI, the
2087 * only difference is the handling of vtypes:
2088 * - we only pass/receive them in registers in some cases, and only
2089 * in 1 or 2 integer registers.
2090 */
2104 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2105 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2109 }
2115 }
2118 /* Vtype returned using a hidden argument */
2125 }
2132 else
2149 else
2154 (ainfo->pair_storage [0] == ArgInFloatSSEReg || ainfo->pair_storage [0] == ArgInDoubleSSEReg ||
2155 ainfo->pair_storage [1] == ArgInFloatSSEReg || ainfo->pair_storage [1] == ArgInDoubleSSEReg)) {
2159 }
2163 linfo->args [i].pair_storage [j] = arg_storage_to_llvm_arg_storage (cfg, ainfo->pair_storage [j]);
2173 }
2174 }
2177 }
2178 #endif
2180 void
2182 {
2195 /* We shouldn't be called in the llvm case */
2198 }
2200 /*
2201 * Emit all arguments which are passed on the stack to prevent register
2202 * allocation problems.
2203 */
2212 else
2216 //XXX what about ArgGSharedVtOnStack here?
2217 // FIXME tailcall is not always yet initialized.
2224 else
2228 }
2233 }
2234 }
2235 }
2237 /*
2238 * Emit all parameters passed in registers in non-reverse order for better readability
2239 * and to help the optimization in emit_prolog ().
2240 */
2248 }
2259 else
2265 /* Already done */
2277 // FIXME tailcall is not always yet initialized.
2279 /* Already emitted above */
2281 //FIXME what about ArgGSharedVtOnStack ?
2282 // FIXME tailcall is not always yet initialized.
2288 }
2290 guint32 align;
2291 guint32 size;
2296 /*
2297 * Other backends use mono_type_stack_size (), but that
2298 * aligns the size to 8, which is larger than the size of
2299 * the source, leading to reads of invalid memory if the
2300 * source is at the end of address space.
2301 */
2303 }
2306 /* Avoid asserts in emit_memcpy () */
2307 mono_cfg_set_exception_invalid_program (cfg, g_strdup_printf ("Passing an argument of size '%d'.", size));
2308 /* Continue normally */
2309 }
2321 }
2323 }
2326 }
2329 /* Emit the signature cookie just before the implicit arguments */
2331 }
2333 /* Handle the case where there are no implicit arguments */
2340 /*
2341 * Tell the JIT to use a more efficient calling convention: call using
2342 * OP_CALL, compute the result location after the call, and save the
2343 * result there.
2344 */
2346 /*
2347 * Nullify the instruction computing the vret addr to enable
2348 * future optimizations.
2349 */
2354 NOT_IMPLEMENTED;
2355 /*
2356 * The valuetype is in RAX:RDX after the call, need to be copied to
2357 * the stack. Push the address here, so the call instruction can
2358 * access it.
2359 */
2362 /* Prevent it from being register allocated or optimized away */
2364 }
2367 }
2379 }
2382 }
2387 }
2390 }
2392 void
2394 {
2410 //Pass empty struct value as 0 on platforms representing empty structs as 1 byte.
2412 }
2428 }
2429 }
2434 }
2436 }
2441 g_assert (ainfo->storage == ArgValuetypeAddrInIReg || (ainfo->storage == ArgValuetypeAddrOnStack && ainfo->pair_storage [0] == ArgNone));
2465 }
2467 }
2469 /* Pass by addr */
2484 // FIXME: Code growth
2486 }
2490 EMIT_NEW_GC_PARAM_SLOT_LIVENESS_DEF (cfg, def, ainfo->offset, m_class_get_byval_arg (ins->klass));
2491 }
2492 }
2493 }
2495 void
2497 {
2503 else
2509 }
2512 }
2516 #define EMIT_COND_BRANCH(ins,cond,sign) \
2517 if (ins->inst_true_bb->native_offset) { \
2518 x86_branch (code, cond, cfg->native_code + ins->inst_true_bb->native_offset, sign); \
2519 } else { \
2520 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_BB, ins->inst_true_bb); \
2521 if (optimize_branch_pred && \
2522 x86_is_imm8 (ins->inst_true_bb->max_offset - offset)) \
2523 x86_branch8 (code, cond, 0, sign); \
2524 else \
2525 x86_branch32 (code, cond, 0, sign); \
2526 }
2534 static gboolean
2536 {
2549 }
2564 }
2565 }
2568 }
2570 /*
2571 * mono_arch_dyn_call_prepare:
2572 *
2573 * Return a pointer to an arch-specific structure which contains information
2574 * needed by mono_arch_get_dyn_call_args (). Return NULL if OP_DYN_CALL is not
2575 * supported for SIG.
2576 * This function is equivalent to ffi_prep_cif in libffi.
2577 */
2578 MonoDynCallInfo*
2580 {
2590 }
2593 // FIXME: Preprocess the info to speed up get_dyn_call_args ().
2603 info->nstack_args = MAX (info->nstack_args, (ainfo->offset / sizeof (mgreg_t)) + (ainfo->arg_size / sizeof (mgreg_t)));
2607 }
2608 }
2619 if (t->type == MONO_TYPE_GENERICINST && mono_class_is_nullable (mono_class_from_mono_type_internal (t))) {
2624 /* Nullables need a temporary buffer, its stored at the end of DynCallArgs.regs after the stack args */
2627 }
2628 }
2632 }
2633 }
2637 /* Align to 16 bytes */
2642 }
2644 /*
2645 * mono_arch_dyn_call_free:
2646 *
2647 * Free a MonoDynCallInfo structure.
2648 */
2649 void
2651 {
2656 }
2658 int
2660 {
2663 /* Extend the 'regs' field dynamically */
2665 }
2667 #define PTR_TO_GREG(ptr) (mgreg_t)(ptr)
2668 #define GREG_TO_PTR(greg) (gpointer)(greg)
2670 /*
2671 * mono_arch_get_start_dyn_call:
2672 *
2673 * Convert the arguments ARGS to a format which can be passed to OP_DYN_CALL, and
2674 * store the result into BUF.
2675 * ARGS should be an array of pointers pointing to the arguments.
2676 * RET should point to a memory buffer large enought to hold the result of the
2677 * call.
2678 * This function should be as fast as possible, any work which does not depend
2679 * on the actual values of the arguments should be done in
2680 * mono_arch_dyn_call_prepare ().
2681 * start_dyn_call + OP_DYN_CALL + finish_dyn_call is equivalent to ffi_call in
2682 * libffi.
2683 */
2684 void
2686 {
2707 }
2717 /* Stored after the stack arguments */
2727 }
2729 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg)
2747 }
2752 }
2759 #if !defined(__mono_ilp32__)
2762 #endif
2765 #if defined(__mono_ilp32__)
2770 #endif
2798 }
2800 }
2807 }
2813 } else if (t->type == MONO_TYPE_GENERICINST && mono_class_is_nullable (mono_class_from_mono_type_internal (t))) {
2825 }
2827 /* The argument pointed to by arg is either a boxed vtype or null */
2831 /* Fall though */
2834 /* Fall through */
2835 }
2854 }
2863 }
2864 }
2868 // In DYNCALL use case value types are already copied when included in parameter array.
2869 // Currently no need to make an extra temporary value type on stack for this use case.
2879 }
2881 }
2884 }
2885 }
2886 }
2888 /*
2889 * mono_arch_finish_dyn_call:
2890 *
2891 * Store the result of a dyn call into the return value buffer passed to
2892 * start_dyn_call ().
2893 * This function should be as fast as possible, any work which does not depend
2894 * on the actual values of the arguments should be done in
2895 * mono_arch_dyn_call_prepare ().
2896 */
2897 void
2899 {
2953 /* Fall through */
2954 }
2956 if (dinfo->cinfo->ret.storage == ArgValuetypeAddrInIReg || dinfo->cinfo->ret.storage == ArgGsharedvtVariableInReg) {
2957 /* Nothing to do */
2976 }
2977 }
2978 }
2982 }
2983 }
2985 /* emit an exception if condition is fail */
2986 #define EMIT_COND_SYSTEM_EXCEPTION(cond,signed,exc_name) \
2987 do { \
2988 MonoInst *tins = mono_branch_optimize_exception_target (cfg, bb, exc_name); \
2989 if (tins == NULL) { \
2990 mono_add_patch_info (cfg, code - cfg->native_code, \
2991 MONO_PATCH_INFO_EXC, exc_name); \
2992 x86_branch32 (code, cond, 0, signed); \
2993 } else { \
2994 EMIT_COND_BRANCH (tins, cond, signed); \
2995 } \
2996 } while (0);
2998 #define EMIT_FPCOMPARE(code) do { \
2999 amd64_fcompp (code); \
3000 amd64_fnstsw (code); \
3001 } while (0);
3003 #define EMIT_SSE2_FPFUNC(code, op, dreg, sreg1) do { \
3004 amd64_movsd_membase_reg (code, AMD64_RSP, -8, (sreg1)); \
3005 amd64_fld_membase (code, AMD64_RSP, -8, TRUE); \
3006 amd64_ ##op (code); \
3007 amd64_fst_membase (code, AMD64_RSP, -8, TRUE, TRUE); \
3008 amd64_movsd_reg_membase (code, (dreg), AMD64_RSP, -8); \
3009 } while (0);
3012 emit_call_body (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data)
3013 {
3016 /*
3017 * FIXME: Add support for thunks
3018 */
3019 {
3022 /*
3023 * Indirect calls are expensive so try to make a near call if possible.
3024 * The caller memory is allocated by the code manager so it is
3025 * guaranteed to be at a 32 bit offset.
3026 */
3029 /* The target is in memory allocated using the code manager */
3034 /* The callee might be an AOT method */
3037 /* The target is in malloc-ed memory */
3039 }
3042 /*
3043 * The call might go directly to a native function without
3044 * the wrapper.
3045 */
3051 }
3052 }
3053 }
3066 /*
3067 * This is not really an optimization, but required because the
3068 * generic class init trampolines use R11 to pass the vtable.
3069 */
3071 }
3076 /* No wrapper */
3079 }
3081 /* See the comment in mono_codegen () */
3082 if ((info->name [0] != 'v') || (strstr (info->name, "ves_array_new_va_") == NULL && strstr (info->name, "ves_array_element_address_") == NULL))
3084 }
3085 }
3089 }
3090 }
3091 }
3094 /* These methods are allocated using malloc */
3097 #ifdef MONO_ARCH_NOMAP32BIT
3099 #endif
3100 /* The 64bit XEN kernel does not honour the MAP_32BIT flag. (#522894) */
3107 }
3110 /*
3111 * Align the call displacement to an address divisible by 4 so it does
3112 * not span cache lines. This is required for code patching to work on SMP
3113 * systems.
3114 */
3118 }
3121 }
3127 }
3131 }
3132 }
3137 }
3140 emit_call (MonoCompile *cfg, guint8 *code, MonoJumpInfoType patch_type, gconstpointer data, gboolean win64_adjust_stack)
3141 {
3142 #ifdef TARGET_WIN32
3145 #endif
3147 #ifdef TARGET_WIN32
3150 #endif
3155 }
3159 {
3167 }
3170 }
3172 #ifndef DISABLE_JIT
3174 #define INST_IGNORES_CFLAGS(opcode) (!(((opcode) == OP_ADC) || ((opcode) == OP_ADC_IMM) || ((opcode) == OP_IADC) || ((opcode) == OP_IADC_IMM) || ((opcode) == OP_SBB) || ((opcode) == OP_SBB_IMM) || ((opcode) == OP_ISBB) || ((opcode) == OP_ISBB_IMM)))
3176 /*
3177 * mono_arch_peephole_pass_1:
3178 *
3179 * Perform peephole opts which should/can be performed before local regalloc
3180 */
3181 void
3183 {
3194 /*
3195 * X86_LEA is like ADD, but doesn't have the
3196 * sreg1==dreg restriction. inst_imm > 0 is needed since LEA sign-extends
3197 * its operand to 64 bit.
3198 */
3201 }
3208 /*
3209 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3210 * the latter has length 2-3 instead of 6 (reverse constant
3211 * propagation). These instruction sequences are very common
3212 * in the initlocals bblock.
3213 */
3215 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3218 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG)) {
3219 /* Continue */
3220 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3222 /* Continue */
3224 /* Continue */
3227 }
3228 }
3229 }
3233 /* OP_COMPARE_IMM (reg, 0)
3234 * -->
3235 * OP_AMD64_TEST_NULL (reg)
3236 */
3245 /*
3246 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3247 * OP_X86_COMPARE_MEMBASE_IMM offset(basereg), imm
3248 * -->
3249 * OP_STORE_MEMBASE_REG reg, offset(basereg)
3250 * OP_COMPARE_IMM reg, imm
3251 *
3252 * Note: if imm = 0 then OP_COMPARE_IMM replaced with OP_X86_TEST_NULL
3253 */
3260 /* check if we can remove cmp reg,0 with test null */
3263 }
3266 }
3269 }
3270 }
3272 void
3274 {
3282 /* reg = 0 -> XOR (reg, reg) */
3283 /* XOR sets cflags on x86, so we cant do it always */
3288 /* Fall through */
3291 }
3292 }
3294 /*
3295 * Use IXOR to avoid a rex prefix if possible. The cpu will sign extend the
3296 * 0 result into 64 bits.
3297 */
3300 }
3301 /* Fall through */
3306 /*
3307 * Replace STORE_MEMBASE_IMM 0 with STORE_MEMBASE_REG since
3308 * the latter has length 2-3 instead of 6 (reverse constant
3309 * propagation). These instruction sequences are very common
3310 * in the initlocals bblock.
3311 */
3313 if (((ins2->opcode == OP_STORE_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_IMM) || (ins2->opcode == OP_STOREI8_MEMBASE_IMM) || (ins2->opcode == OP_STORE_MEMBASE_IMM)) && (ins2->inst_imm == 0)) {
3316 } else if ((ins2->opcode == OP_STOREI1_MEMBASE_IMM) || (ins2->opcode == OP_STOREI2_MEMBASE_IMM) || (ins2->opcode == OP_STOREI4_MEMBASE_REG) || (ins2->opcode == OP_STOREI8_MEMBASE_REG) || (ins2->opcode == OP_STORE_MEMBASE_REG) || (ins2->opcode == OP_LIVERANGE_START) || (ins2->opcode == OP_GC_LIVENESS_DEF) || (ins2->opcode == OP_GC_LIVENESS_USE)) {
3317 /* Continue */
3318 } else if (((ins2->opcode == OP_ICONST) || (ins2->opcode == OP_I8CONST)) && (ins2->dreg == ins->dreg) && (ins2->inst_c0 == 0)) {
3320 /* Continue */
3322 /* Continue */
3325 }
3326 }
3327 }
3337 }
3340 }
3341 }
3343 #define NEW_INS(cfg,ins,dest,op) do { \
3344 MONO_INST_NEW ((cfg), (dest), (op)); \
3345 (dest)->cil_code = (ins)->cil_code; \
3346 mono_bblock_insert_before_ins (bb, ins, (dest)); \
3347 } while (0)
3349 /*
3350 * mono_arch_lowering_pass:
3351 *
3352 * Converts complex opcodes into simpler ones so that each IR instruction
3353 * corresponds to one machine instruction.
3354 */
3355 void
3357 {
3360 /*
3361 * FIXME: Need to add more instructions, but the current machine
3362 * description can't model some parts of the composite instructions like
3363 * cdq.
3364 */
3384 }
3386 #ifndef __mono_ilp32__
3388 #endif
3390 /* Don't generate memindex opcodes (to simplify */
3391 /* read sandboxing) */
3398 }
3400 #ifndef __mono_ilp32__
3402 #endif
3410 }
3412 #ifdef MONO_ARCH_SIMD_INTRINSICS
3433 }
3435 #endif
3438 }
3439 }
3442 }
3444 static const int
3445 branch_cc_table [] = {
3449 };
3451 /* Maps CMP_... constants to X86_CC_... constants */
3452 static const int
3453 cc_table [] = {
3456 };
3458 static const int
3459 cc_signed_table [] = {
3462 };
3464 /*#include "cprop.c"*/
3467 emit_float_to_int (MonoCompile *cfg, guchar *code, int dreg, int sreg, int size, gboolean is_signed)
3468 {
3471 else
3479 }
3483 {
3487 #if defined(TARGET_WIN32)
3489 #elif defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
3492 #endif
3497 /*
3498 * Under Windows:
3499 * If requested stack size is larger than one page,
3500 * perform stack-touch operation
3501 */
3502 /*
3503 * Generate stack probe code.
3504 * Under Windows, it is necessary to allocate one page at a time,
3505 * "touching" stack after each successful sub-allocation. This is
3506 * because of the way stack growth is implemented - there is a
3507 * guard page before the lowest stack page that is currently commited.
3508 * Stack normally grows sequentially so OS traps access to the
3509 * guard page and commits more pages when needed.
3510 */
3531 }
3532 else
3540 }
3544 }
3548 }
3568 }
3570 }
3574 {
3576 guint32 quad;
3578 /* Move return value to the target register */
3579 /* FIXME: do this in the local reg allocator */
3595 }
3599 }
3601 }
3618 /* Load the destination address */
3620 amd64_mov_reg_membase (code, AMD64_RCX, loc->inst_basereg, loc->inst_offset, sizeof(gpointer));
3625 amd64_mov_membase_reg (code, AMD64_RCX, (quad * sizeof(mgreg_t)), cinfo->ret.pair_regs [quad], sizeof(mgreg_t));
3636 NOT_IMPLEMENTED;
3637 }
3638 }
3639 }
3641 }
3644 }
3648 #ifdef TARGET_MACH
3650 #endif
3652 gboolean
3654 {
3655 #ifdef TARGET_MACH
3668 /*
3669 * We're looking for these two instructions:
3670 *
3671 * mov %gs:[offset](,%rdi,8),%rax
3672 * retq
3673 */
3686 /*
3687 * Apple now loads a different version of pthread_getspecific when launched from Xcode
3688 * For that version we're looking for these instructions:
3689 *
3690 * pushq %rbp
3691 * movq %rsp, %rbp
3692 * mov %gs:[offset](,%rdi,8),%rax
3693 * popq %rbp
3694 * retq
3695 */
3713 }
3717 #elif defined(TARGET_ANDROID)
3719 #else
3723 #endif
3724 }
3726 int
3728 {
3729 #ifdef TARGET_OSX
3731 #else
3734 #endif
3735 }
3737 /*
3738 * \param code buffer to store code to
3739 * \param dreg hard register where to place the result
3740 * \param tls_offset offset info
3741 * \return a pointer to the end of the stored code
3742 *
3743 * mono_amd64_emit_tls_get emits in \p code the native code that puts in
3744 * the dreg register the item in the thread local storage identified
3745 * by tls_offset.
3746 */
3749 {
3750 #ifdef TARGET_WIN32
3758 /* Load TEB->TlsExpansionSlots */
3766 }
3767 #elif defined(TARGET_MACH)
3770 #else
3778 }
3779 #endif
3781 }
3785 {
3786 #ifdef TARGET_WIN32
3788 #elif defined(TARGET_MACH)
3791 #else
3795 #endif
3797 }
3799 /*
3800 * emit_setup_lmf:
3801 *
3802 * Emit code to initialize an LMF structure at LMF_OFFSET.
3803 */
3806 {
3807 /*
3808 * The ip field is not set, the exception handling code will obtain it from the stack location pointed to by the sp field.
3809 */
3810 /*
3811 * sp is saved right before calls but we need to save it here too so
3812 * async stack walks would work.
3813 */
3814 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
3815 /* Save rbp */
3816 amd64_mov_membase_reg (code, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), AMD64_RBP, 8);
3818 mono_emit_unwind_op_offset (cfg, code, AMD64_RBP, - (cfa_offset - (lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp))));
3820 /* These can't contain refs */
3821 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, previous_lmf), SLOT_NOREF);
3822 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), SLOT_NOREF);
3823 /* These are handled automatically by the stack marking code */
3824 mini_gc_set_slot_type_from_fp (cfg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), SLOT_NOREF);
3827 }
3829 #ifdef TARGET_WIN32
3831 #define TEB_LAST_ERROR_OFFSET 0x068
3835 {
3836 /* Threads last error value is located in TEB_LAST_ERROR_OFFSET. */
3841 }
3843 #else
3847 {
3849 }
3851 #endif
3853 /* benchmark and set based on cpu */
3854 #define LOOP_ALIGNMENT 8
3855 #define bb_is_loop_start(bb) ((bb)->loop_body_start && (bb)->nesting)
3857 #ifndef DISABLE_JIT
3861 {
3862 #ifndef TARGET_WIN32
3865 else
3867 #endif
3869 }
3872 amd64_handle_varargs_call (MonoCompile *cfg, guint8 *code, MonoCallInst *call, gboolean free_rax)
3873 {
3874 #ifdef TARGET_WIN32
3876 #else
3877 /*
3878 * The AMD64 ABI forces callers to know about varargs.
3879 */
3882 // deliberatly nothing -- but nreg = 0 and do not return
3883 } else if (cfg->method->wrapper_type == MONO_WRAPPER_MANAGED_TO_NATIVE && m_class_get_image (cfg->method->klass) != mono_defaults.corlib) {
3884 /*
3885 * Since the unmanaged calling convention doesn't contain a
3886 * 'vararg' entry, we have to treat every pinvoke call as a
3887 * potential vararg call.
3888 */
3893 }
3898 }
3900 #endif
3901 }
3903 void
3905 {
3910 /* Fix max_offset estimate for each successor bb */
3911 gboolean optimize_branch_pred = (cfg->opt & MONO_OPT_BRANCH) && (cfg->max_block_num < MAX_BBLOCKS_FOR_BRANCH_OPTS);
3919 }
3920 }
3924 /* set alignment depending on cpu */
3927 /*g_print ("adding %d pad at %x to loop in %s\n", pad, cfg->code_len, cfg->method->name);*/
3931 }
3932 }
3941 if (mono_break_at_bb_method && mono_method_desc_full_match (mono_break_at_bb_method, cfg->method) && bb->block_num == mono_break_at_bb_bb_num)
3978 /* In AMD64 NaCl, pointers are 4 bytes, */
3979 /* so STORE_* != STOREI8_*. Likewise below. */
3981 amd64_mov_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, ins->sreg1, sizeof(gpointer));
3990 /* In NaCl, this could be a PCONST type, which could */
3991 /* mean a pointer type was copied directly into the */
3992 /* lower 32-bits of inst_imm, so for InvalidPtr==-1 */
3993 /* the value would be 0x00000000FFFFFFFF which is */
3994 /* not proper for an imm32 unless you cast it. */
3996 amd64_mov_membase_imm (code, ins->inst_destbasereg, ins->inst_offset, (gint32)ins->inst_imm, sizeof(gpointer));
4003 #ifdef __mono_ilp32__
4004 /* In ILP32, pointers are 4 bytes, so separate these */
4005 /* cases, use literal 8 below where we really want 8 */
4009 #endif
4011 // FIXME: Decompose this earlier
4017 }
4024 // FIXME: Decompose this earlier
4030 }
4037 /* For NaCl, pointers are 4 bytes, so separate these */
4038 /* cases, use literal 8 below where we really want 8 */
4044 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, sizeof(gpointer));
4047 /* Use literal 8 instead of sizeof pointer or */
4048 /* register, we really want 8 for this opcode */
4059 /* The cpu zero extends the result into 64 bits */
4060 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, FALSE, 4);
4066 /* The cpu zero extends the result into 64 bits */
4067 amd64_widen_membase_size (code, ins->dreg, ins->inst_basereg, ins->inst_offset, FALSE, TRUE, 4);
4094 /* Clean out the upper word */
4105 #if defined(__mono_ilp32__)
4106 /* Comparison of pointer immediates should be 4 bytes to avoid sign-extend problems */
4110 #endif
4142 /* FIXME: Make a 64 version too */
4143 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4147 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4151 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4155 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4159 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4162 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4165 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4168 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4174 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4193 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 4);
4196 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4199 amd64_alu_membase_reg_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4203 amd64_alu_membase_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4206 amd64_alu_membase8_imm_size (code, X86_CMP, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 4);
4232 amd64_alu_membase_reg_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4235 amd64_alu_membase_reg_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4238 amd64_alu_membase_reg_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4244 amd64_alu_membase_reg_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->sreg2, 8);
4249 amd64_alu_membase_imm_size (code, X86_ADD, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4253 amd64_alu_membase_imm_size (code, X86_SUB, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4257 amd64_alu_membase_imm_size (code, X86_AND, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4261 amd64_alu_membase_imm_size (code, X86_OR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4265 amd64_alu_membase_imm_size (code, X86_XOR, ins->inst_basereg, ins->inst_offset, ins->inst_imm, 8);
4295 /* Load ss_tramp_var */
4296 /* This is equal to &ss_trampoline */
4298 /* Load the trampoline address */
4300 /* Call it if it is non-null */
4306 }
4308 /*
4309 * This is the address which is saved in seq points,
4310 */
4315 guint32 val;
4319 /* Load info var */
4322 /* Load the info->bp_addrs [offset], which is either NULL or the address of the breakpoint trampoline */
4327 /* Call the trampoline */
4334 /*
4335 * Emit a test+branch against a constant, the constant will be overwritten
4336 * by mono_arch_set_breakpoint () to cause the test to fail.
4337 */
4345 /* Load bp_tramp_var */
4346 /* This is equal to &bp_trampoline */
4348 /* Call the trampoline */
4351 }
4352 /*
4353 * Add an additional nop so skipping the bp doesn't cause the ip to point
4354 * to another IL offset.
4355 */
4358 }
4411 /* MOV r1, r2 */
4412 /* ADD r1, r1 */
4418 /* LEA r1, [r2 + r2*2] */
4422 /* LEA r1, [r2 + r2*4] */
4426 /* LEA r1, [r2 + r2*2] */
4427 /* ADD r1, r1 */
4432 /* LEA r1, [r2 + r2*8] */
4436 /* LEA r1, [r2 + r2*4] */
4437 /* ADD r1, r1 */
4442 /* LEA r1, [r2 + r2*2] */
4443 /* SHL r1, 2 */
4448 /* LEA r1, [r2 + r2*4] */
4449 /* LEA r1, [r1 + r1*4] */
4454 /* LEA r1, [r2 + r2*4] */
4455 /* SHL r1, 2 */
4456 /* LEA r1, [r1 + r1*4] */
4464 }
4466 }
4469 /* Regalloc magic makes the div/rem cases the same */
4477 }
4488 }
4499 }
4510 }
4643 /* the mul operation and the exception check should most likely be split */
4646 /*g_assert (ins->sreg2 == X86_EAX);
4647 g_assert (ins->dreg == X86_EAX);*/
4653 /* no need to save since we're going to store to it anyway */
4657 }
4660 }
4665 }
4669 }
4671 /* save before the check since pop and mov don't change the flags */
4680 }
4707 EMIT_COND_BRANCH (ins, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
4731 /* This needs to operate on 64 bit values */
4732 amd64_cmov_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, ins->sreg2);
4746 else
4767 }
4769 }
4774 }
4777 // This opcode helps compute sizes, i.e.
4778 // of the subsequent OP_TAILCALL, but contributes no code.
4796 // FIXME hardcoding RAX here is not ideal.
4812 // FIXME Patch data instead of code.
4818 }
4819 }
4821 /* Restore callee saved registers */
4827 }
4832 // FIXME:
4834 NOT_IMPLEMENTED;
4837 /* Copy arguments on the stack to our argument area */
4838 // FIXME use rep mov for constant code size, before nonvolatiles
4839 // restored, first saving rsi, rdi into volatiles
4843 }
4845 #ifdef TARGET_WIN32
4849 #else
4851 #endif
4852 }
4854 #ifdef TARGET_WIN32
4855 // Redundant REX byte indicates a tailcall to the native unwinder. It means nothing to the processor.
4856 // https://github.com/dotnet/coreclr/blob/966dabb5bb3c4bf1ea885e1e8dc6528e8c64dc4f/src/unwinder/amd64/unwinder_amd64.cpp#L1394
4857 // FIXME This should be jmp rip+32 for AOT direct to same assembly.
4858 // FIXME This should be jmp [rip+32] for AOT direct to not-same assembly (through data).
4859 // FIXME This should be jmp [rip+32] for JIT direct -- patch data instead of code.
4860 // This is only close to ideal for tailcall_membase, and even then it should
4861 // have a more dynamic register allocation.
4864 #else
4865 // NT does not have varargs rax use, and NT ABI does not have red zone.
4866 // Use red-zone mov/jmp instead of push/ret to preserve call/ret speculation stack.
4867 // FIXME Just like NT the direct cases are are not ideal.
4871 #endif
4875 }
4877 /* ensure ins->sreg1 is not NULL */
4884 }
4897 else
4915 }
4945 /* r11 = args buffer filled by mono_arch_get_dyn_call_args () */
4947 /* r10 = ftn */
4950 /* Save args buffer */
4953 /* Set fp arg regs */
4954 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, has_fp), sizeof (mgreg_t));
4959 amd64_sse_movsd_reg_membase (code, i, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + (i * sizeof (double)));
4962 /* Allocate param area */
4963 /* This doesn't need to be freed since OP_DYN_CALL is never called in a loop */
4964 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, nstack_args), 8);
4967 /* Set stack args */
4968 /* rax/rcx/rdx/r8/r9 is scratch */
4973 amd64_mov_reg_membase (code, limit_reg, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, nstack_args), 8);
4975 amd64_lea_membase (code, src_reg, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + ((PARAM_REGS) * sizeof(mgreg_t)));
4991 /* Set argument registers */
4993 amd64_mov_reg_membase (code, param_regs [i], AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, regs) + (i * sizeof(mgreg_t)), sizeof(mgreg_t));
4995 /* Make the call */
5001 /* Save result */
5004 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs), AMD64_XMM0);
5005 amd64_sse_movsd_membase_reg (code, AMD64_R11, MONO_STRUCT_OFFSET (DynCallArgs, fregs) + sizeof (double), AMD64_XMM1);
5007 }
5010 amd64_mov_membase_reg (code, lmf_var->inst_basereg, lmf_var->inst_offset + MONO_STRUCT_OFFSET (MonoLMF, rsp), AMD64_RSP, 8);
5012 }
5037 else
5048 }
5054 amd64_test_membase_imm_size (code, ins->sreg1, MONO_STRUCT_OFFSET (MonoVTable, initialized), 1, 1);
5058 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_generic_class_init", FALSE);
5064 }
5067 amd64_lea_memindex (code, ins->dreg, ins->sreg1, ins->inst_imm, ins->sreg2, ins->backend.shift_amount);
5076 /* keep alignment */
5104 }
5108 }
5112 }
5120 }
5128 }
5130 /* Align stack */
5134 /*
5135 * ins->inst_eh_blocks and bb->clause_holes are part of same GList.
5136 * Holes from bb->clause_holes will be added separately for the entire
5137 * basic block. Add only the rest of them.
5138 */
5141 /* Restore stack alignment */
5145 /* Even though we're saving RSP, use sizeof */
5146 /* gpointer because spvar is of type IntPtr */
5147 /* see: mono_create_spvar_for_region */
5149 amd64_mov_membase_reg (code, spvar->inst_basereg, spvar->inst_offset, AMD64_RSP, sizeof(gpointer));
5154 amd64_alu_reg_imm (code, X86_SUB, AMD64_RSP, ALIGN_TO (cfg->param_area, MONO_ARCH_FRAME_ALIGNMENT));
5155 }
5157 }
5160 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5163 }
5166 amd64_mov_reg_membase (code, AMD64_RSP, spvar->inst_basereg, spvar->inst_offset, sizeof(gpointer));
5167 /* The local allocator will put the result into RAX */
5170 }
5179 //g_print ("target: %p, next: %p, curr: %p, last: %p\n", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins);
5180 //if ((ins->inst_target_bb == bb->next_bb) && ins == bb->last_ins)
5181 //break;
5189 else
5191 }
5217 amd64_set_reg (code, cc_table [mono_opcode_to_cond (ins->opcode)], ins->dreg, cc_signed_table [mono_opcode_to_cond (ins->opcode)]);
5240 EMIT_COND_SYSTEM_EXCEPTION (cc_table [mono_opcode_to_cond (ins->opcode)], cc_signed_table [mono_opcode_to_cond (ins->opcode)], (const char *)ins->inst_p1);
5257 /* floating point opcodes */
5263 }
5267 }
5269 }
5276 else
5278 }
5284 }
5286 }
5297 /* This requires a double->single conversion */
5299 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
5300 }
5308 }
5316 }
5327 }
5338 }
5400 /* Based on gcc code */
5404 /* Positive case */
5409 /* Negative case */
5410 /* Save to the red zone */
5420 /* Restore */
5425 }
5450 }
5483 }
5498 }
5524 }
5577 /*
5578 * The two arguments are swapped because the fbranch instructions
5579 * depend on this for the non-sse case to work.
5580 */
5584 /*
5585 * FIXME: Get rid of this.
5586 * The two arguments are swapped because the fbranch instructions
5587 * depend on this for the non-sse case to work.
5588 */
5593 /* zeroing the register at the start results in
5594 * shorter and faster code (we can also remove the widening op)
5595 */
5614 }
5616 }
5619 /* zeroing the register at the start results in
5620 * shorter and faster code (we can also remove the widening op)
5621 */
5636 }
5638 }
5648 }
5651 /* zeroing the register at the start results in
5652 * shorter and faster code (we can also remove the widening op)
5653 */
5665 }
5667 }
5677 }
5708 }
5733 }
5740 }
5742 }
5768 }
5790 }
5792 }
5799 }
5801 /* Branch if C013 != 100 */
5802 /* branch if !ZF or (PF|CF) */
5819 /* skip branch if C1=1 */
5822 /* branch if (C0 | C3) = 1 */
5828 }
5831 /* Branch if C013 == 100 or 001 */
5834 /* skip branch if C1=1 */
5837 /* branch if (C0 | C3) = 1 */
5841 }
5843 /* Branch if C013 == 000 */
5847 /* Branch if C013=000 or 100 */
5850 /* skip branch if C1=1 */
5853 /* branch if C0=0 */
5857 }
5859 /* Branch if C013 != 001 */
5864 /* Transfer value to the fp stack */
5882 }
5886 }
5891 }
5903 /* dreg contains the old value, add with sreg2 value */
5910 }
5915 /* LOCK prefix is implied. */
5920 }
5923 guint32 size;
5927 else
5930 /*
5931 * See http://msdn.microsoft.com/en-us/magazine/cc302329.aspx for
5932 * an explanation of how this works.
5933 */
5944 }
5948 }
5952 }
5956 }
5960 }
5964 }
5968 amd64_mov_reg_membase (code, ins->dreg, ins->inst_basereg, ins->inst_offset, ins->opcode == OP_ATOMIC_LOAD_U4 ? 4 : 8);
5970 }
5977 }
5979 }
5983 }
6011 }
6018 }
6024 amd64_sse_movss_membase_reg (code, ins->inst_destbasereg, ins->inst_offset, MONO_ARCH_FP_SCRATCH_REG);
6025 }
6030 }
6041 }
6047 gpointer card_table_mask;
6054 /*If either point to the stack we can simply avoid the WB. This happens due to
6055 * optimizations revealing a stack store that was not visible when op_cardtable was emited.
6056 */
6060 /*
6061 * We need one register we can clobber, we choose EDX and make sreg1
6062 * fixed EAX to work around limitations in the local register allocator.
6063 * sreg2 might get allocated to EDX, but that is not a problem since
6064 * we use it before clobbering EDX.
6065 */
6068 /*
6069 * This is the code we produce:
6070 *
6071 * edx = value
6072 * edx >>= nursery_shift
6073 * cmp edx, (nursery_start >> nursery_shift)
6074 * jne done
6075 * edx = ptr
6076 * edx >>= card_table_shift
6077 * edx += cardtable
6078 * [edx] = 1
6079 * done:
6080 */
6087 /*
6088 * The value we need to compare against is 64 bits, so we need
6089 * another spare register. We use RBX, which we save and
6090 * restore.
6091 */
6098 }
6100 }
6106 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_GC_CARD_TABLE_ADDR, card_table);
6114 }
6115 #ifdef MONO_ARCH_SIMD_INTRINSICS
6116 /* TODO: Some of these IR opcodes are marked as no clobber when they indeed do. */
6506 /*TODO: This is appart of the sse spec but not added
6507 case OP_PSARQ:
6508 amd64_sse_psraq_reg_imm (code, ins->dreg, ins->inst_imm);
6509 break;
6510 case OP_PSARQ_REG:
6511 amd64_sse_psraq_reg_reg (code, ins->dreg, ins->sreg2);
6512 break;
6513 */
6558 }
6569 /*amd64_movd_reg_xreg_size (code, ins->dreg, ins->sreg1, 4);
6570 if (ins->inst_c0)
6571 amd64_shift_reg_imm_size (code, X86_SHR, ins->dreg, 16, 4);*/
6578 else
6588 /*sreg1 is the extracted ireg (scratch)
6589 /sreg2 is the to be inserted ireg (scratch)
6590 /dreg is the xreg to receive the value*/
6592 /*clear the bits from the extracted word*/
6594 /*shift the value to insert if needed*/
6597 /*join them together*/
6610 else
6619 else
6626 else
6634 else
6642 else
6646 }
6651 else
6675 /*FIXME the peephole pass should have killed this*/
6710 }
6732 }
6742 #endif
6745 printf ("R%d START=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6748 }
6751 printf ("R%d END=0x%x\n", MONO_VARINFO (cfg, ins->inst_c0)->vreg, (int)(code - cfg->native_code));
6754 }
6762 code = emit_call (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_threads_state_poll", FALSE);
6765 }
6782 amd64_mov_membase_reg (code, ins->sreg1, MONO_STRUCT_OFFSET (MonoContext, gregs) + i * sizeof (mgreg_t), i, sizeof (mgreg_t));
6787 }
6793 }
6794 }
6797 }
6801 G_BEGIN_DECLS
6804 G_END_DECLS
6806 void
6808 {
6809 /* The signature doesn't matter */
6810 mono_register_jit_icall (mono_amd64_throw_exception, "mono_amd64_throw_exception", mono_create_icall_signature ("void"), TRUE);
6812 #if defined(TARGET_WIN32) || defined(HOST_WIN32)
6813 #if _MSC_VER
6815 #else
6817 #endif
6818 #endif
6819 }
6821 void
6822 mono_arch_patch_code_new (MonoCompile *cfg, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, gpointer target)
6823 {
6826 /*
6827 * Debug code to help track down problems where the target of a near call is
6828 * is not valid.
6829 */
6845 }
6846 }
6847 }
6850 }
6852 #ifndef DISABLE_JIT
6854 static int
6856 {
6865 }
6867 /*
6868 * This macro is used for testing whenever the unwinder works correctly at every point
6869 * where an async exception can happen.
6870 */
6871 /* This will generate a SIGSEGV at the given point in the code */
6872 #define async_exc_point(code) do { \
6873 if (mono_inject_async_exc_method && mono_method_desc_full_match (mono_inject_async_exc_method, cfg->method)) { \
6874 if (cfg->arch.async_point_count == mono_inject_async_exc_pos) \
6875 amd64_mov_reg_mem (code, AMD64_RAX, 0, 4); \
6876 cfg->arch.async_point_count ++; \
6877 } \
6878 } while (0)
6880 #ifdef TARGET_WIN32
6882 emit_prolog_setup_sp_win64 (MonoCompile *cfg, guint8 *code, int alloc_size, int *cfa_offset_input)
6883 {
6886 /* Allocate windows stack frame using stack probing method */
6892 }
6899 }
6901 // NOTE, in a standard win64 prolog the alloc unwind info is always emitted, but since mono
6902 // uses a frame pointer with negative offsets and a standard win64 prolog assumes positive offsets, we can't
6903 // emit sp alloc unwind metadata since the native OS unwinder will incorrectly restore sp. Excluding the alloc
6904 // metadata on the other hand won't give the OS the information so it can just restore the frame pointer to sp and
6905 // that will retrieve the expected results.
6908 }
6913 }
6916 guint8 *
6918 {
6933 /* Amount of stack space allocated by register saving code */
6936 /* Offset between RSP and the CFA */
6939 /*
6940 * The prolog consists of the following parts:
6941 * FP present:
6942 * - push rbp
6943 * - mov rbp, rsp
6944 * - save callee saved regs using moves
6945 * - allocate frame
6946 * - save rgctx if needed
6947 * - save lmf if needed
6948 * FP not present:
6949 * - allocate frame
6950 * - save rgctx if needed
6951 * - save lmf if needed
6952 * - save callee saved regs using moves
6953 */
6955 // CFA = sp + 8
6958 // IP saved at CFA - 8
6969 /* These are handled automatically by the stack marking code */
6976 }
6978 /* The param area is always at offset 0 from sp */
6979 /* This needs to be allocated here, since it has to come after the spill area */
6982 // FIXME:
6985 }
6988 /*
6989 * On enter, the stack is misaligned by the pushing of the return
6990 * address. It is either made aligned by the pushing of %rbp, or by
6991 * this.
6992 */
6996 /* Mark the padding slot as NOREF */
6998 }
7002 /* Mark the padding slot as NOREF */
7004 }
7007 }
7013 /* Allocate stack frame */
7014 #ifdef TARGET_WIN32
7016 #else
7018 /* See mono_emit_stack_alloc */
7019 #if defined(MONO_ARCH_SIGSEGV_ON_ALTSTACK)
7022 /* Use a loop for large sizes */
7036 }
7040 }
7042 guint32 required_code_size = ((remaining_size / 0x1000) + 1) * 11; /*11 is the max size of amd64_alu_reg_imm + amd64_test_membase_reg*/
7050 }
7055 }
7062 }
7063 }
7064 #else
7070 }
7071 #endif
7072 }
7073 #endif
7075 /* Stack alignment check */
7076 #if 0
7077 {
7087 }
7088 #endif
7091 /* Fill the stack frame with a dummy value to force deterministic behavior */
7093 /* Save registers to the red zone */
7107 }
7109 /* Save LMF */
7113 /* Save callee saved registers */
7116 /* Save caller saved registers after sp is adjusted */
7117 /* The registers are saved at the bottom of the frame */
7118 /* FIXME: Optimize this so the regs are saved at the end of the frame in increasing order */
7120 /* The registers are saved just below the saved rbp */
7122 }
7130 /* These are handled automatically by the stack marking code */
7134 // FIXME: GC
7135 }
7139 }
7140 }
7142 /* store runtime generic context */
7147 amd64_mov_membase_reg (code, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, MONO_ARCH_RGCTX_REG, sizeof(gpointer));
7149 mono_add_var_location (cfg, cfg->rgctx_var, TRUE, MONO_ARCH_RGCTX_REG, 0, 0, code - cfg->native_code);
7150 mono_add_var_location (cfg, cfg->rgctx_var, FALSE, cfg->rgctx_var->inst_basereg, cfg->rgctx_var->inst_offset, code - cfg->native_code, 0);
7151 }
7153 /* compute max_length in order to use short forward jumps */
7160 /* max alignment for loops */
7166 }
7168 /* Take prolog and epilog instrumentation into account */
7173 }
7174 }
7182 /* Save volatile arguments to the stack */
7184 amd64_mov_membase_reg (code, cfg->vret_addr->inst_basereg, cfg->vret_addr->inst_offset, cinfo->ret.reg, 8);
7185 }
7187 /* Keep this in sync with emit_load_volatile_arguments */
7194 /* Unused arguments */
7197 /* Save volatile arguments to the stack */
7203 /* FIXME: I1 etc */
7204 /*
7205 if (stack_offset & 0x1)
7206 size = 1;
7207 else if (stack_offset & 0x2)
7208 size = 2;
7209 else if (stack_offset & 0x4)
7210 size = 4;
7211 else
7212 size = 8;
7213 */
7216 /*
7217 * Save the original location of 'this',
7218 * get_generic_info_from_stack_frame () needs this to properly look up
7219 * the argument value during the handling of async exceptions.
7220 */
7223 mono_add_var_location (cfg, ins, FALSE, ins->inst_basereg, ins->inst_offset, code - cfg->native_code, 0);
7224 }
7226 }
7237 amd64_mov_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad], sizeof(mgreg_t));
7240 amd64_movss_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad]);
7243 amd64_movsd_membase_reg (code, ins->inst_basereg, ins->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_regs [quad]);
7249 }
7250 }
7254 amd64_mov_membase_reg (code, ins->inst_left->inst_basereg, ins->inst_left->inst_offset, ainfo->pair_regs [0], sizeof (gpointer));
7263 }
7265 /* Argument allocated to (non-volatile) register */
7275 }
7280 }
7281 }
7282 }
7287 /*
7288 * Optimize the common case of the first bblock making a call with the same
7289 * arguments as the method. This works because the arguments are still in their
7290 * original argument registers.
7291 * FIXME: Generalize this
7292 */
7302 }
7315 if (((next->opcode == OP_LOAD_MEMBASE) || (next->opcode == OP_LOADI4_MEMBASE)) && next->inst_basereg == ins->inst_basereg && next->inst_offset == ins->inst_offset) {
7322 /* Only continue if the instruction doesn't change argument regs */
7325 }
7326 }
7328 }
7331 }
7333 /* Argument allocated to (non-volatile) register */
7339 }
7343 }
7344 }
7348 //next = mono_inst_list_next (&next->node, &first_bb->ins_list);
7351 }
7352 }
7353 }
7358 /* Initialize seq_point_info_var */
7360 /* Initialize the variable from a GOT slot */
7361 /* Same as OP_AOTCONST */
7362 mono_add_patch_info (cfg, code - cfg->native_code, MONO_PATCH_INFO_SEQ_POINT_INFO, cfg->method);
7366 }
7369 /* Initialize ss_tramp_var */
7374 amd64_mov_reg_membase (code, AMD64_R11, AMD64_R11, MONO_STRUCT_OFFSET (SeqPointInfo, ss_tramp_addr), 8);
7377 /* Initialize ss_tramp_var */
7384 /* Initialize bp_tramp_var */
7390 }
7391 }
7396 }
7398 void
7400 {
7415 /* Mark the start of the epilog */
7418 /* Save the uwind state which is needed by the out-of-line code */
7421 /* the code restoring the registers must be kept in sync with OP_TAILCALL */
7425 amd64_mov_reg_membase (code, AMD64_RBP, cfg->frame_reg, lmf_offset + MONO_STRUCT_OFFSET (MonoLMF, rbp), 8);
7427 /*
7428 * emit_setup_lmf () marks RBP as saved, we have to mark it as same value here before clearing up the stack
7429 * since its stack slot will become invalid.
7430 */
7432 }
7434 /* Restore callee saved regs */
7437 /* Restore only used_int_regs, not arch.saved_iregs */
7438 #if defined(MONO_SUPPORT_TASKLETS)
7440 #else
7442 #endif
7447 }
7449 }
7450 }
7452 /* Load returned vtypes into registers if needed */
7461 amd64_mov_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)), ainfo->pair_size [quad]);
7464 amd64_movss_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)));
7467 amd64_movsd_reg_membase (code, ainfo->pair_regs [quad], inst->inst_basereg, inst->inst_offset + (quad * sizeof(mgreg_t)));
7473 }
7474 }
7475 }
7480 }
7482 #ifdef TARGET_WIN32
7486 #else
7489 #endif
7490 }
7495 /* Restore the unwind state to be the same as before the epilog */
7499 }
7501 void
7503 {
7511 /* Compute needed space */
7521 }
7525 /* add code to raise exceptions */
7532 guint32 throw_ip;
7539 //x86_breakpoint (code);
7540 /* Find a throw sequence for the same exception class */
7548 }
7557 }
7558 amd64_mov_reg_imm (code, AMD64_ARG_REG1, m_class_get_type_token (exc_class) - MONO_TOKEN_TYPE_DEF);
7562 code = emit_call_body (cfg, code, MONO_PATCH_INFO_INTERNAL_METHOD, "mono_arch_throw_corlib_exception");
7570 nthrows ++;
7571 }
7572 }
7574 }
7576 /* do nothing */
7578 }
7580 }
7582 /* Handle relocations with RIP relative addressing */
7591 guint32 target_pos;
7593 /* The SSE opcodes require a 16 byte alignment */
7600 }
7604 }
7612 }
7618 }
7625 /*loading is faster against aligned addresses.*/
7631 /*alu_op [rex] modr/m imm32 - 7 or 8 bytes */
7634 else
7642 }
7645 }
7654 ;
7656 }
7657 }
7659 }
7662 }
7666 MONO_NEVER_INLINE
7667 void
7669 {
7670 /* call/ret required (or likely other control transfer) */
7671 }
7673 void
7675 {
7676 }
7678 gboolean
7680 {
7682 }
7684 /*
7685 * Determine whenever the trap whose info is in SIGINFO is caused by
7686 * integer overflow.
7687 */
7688 gboolean
7690 {
7691 MonoContext ctx;
7694 gint64 value;
7702 rip ++;
7703 }
7704 else
7707 if ((rip [0] == 0xf7) && (x86_modrm_mod (rip [1]) == 0x3) && (x86_modrm_reg (rip [1]) == 0x7)) {
7708 /* idiv REG */
7715 }
7718 }
7720 guint32
7722 {
7724 }
7726 /**
7727 * \return TRUE if no sw breakpoint was present.
7728 *
7729 * Copy \p size bytes from \p code - \p offset to the buffer \p buf. If the debugger inserted software
7730 * breakpoints in the original code, they are removed in the copy.
7731 */
7732 gboolean
7733 mono_breakpoint_clean_code (guint8 *method_start, guint8 *code, int offset, guint8 *buf, int size)
7734 {
7735 /*
7736 * If method_start is non-NULL we need to perform bound checks, since we access memory
7737 * at code - offset we could go before the start of the method and end up in a different
7738 * page of memory that is not mapped or read incorrect data anyway. We zero-fill the bytes
7739 * instead.
7740 */
7747 }
7749 }
7751 int
7753 {
7755 }
7757 gpointer
7759 {
7761 }
7763 #define MAX_ARCH_DELEGATE_PARAMS 10
7765 static gpointer
7767 {
7775 start = code = (guint8 *)mono_global_codeman_reserve (64 + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7777 /* Replace the this argument with the target */
7779 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7783 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
7785 start = code = (guint8 *)mono_global_codeman_reserve (64 + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7790 /* We have to shift the arguments left */
7793 #ifdef TARGET_WIN32
7796 else
7798 #else
7800 #endif
7801 }
7804 }
7806 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
7807 }
7812 *info = mono_tramp_info_create ("delegate_invoke_impl_has_target", start, code - start, NULL, unwind_ops);
7817 }
7823 else
7828 }
7829 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL));
7832 }
7834 #define MAX_VIRTUAL_DELEGATE_OFFSET 32
7836 static gpointer
7838 {
7847 start = code = (guint8 *)mono_global_codeman_reserve (size + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
7851 /* Replace the this argument with the target */
7853 amd64_mov_reg_membase (code, AMD64_ARG_REG1, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, target), 8);
7856 /* Load the IMT reg */
7857 amd64_mov_reg_membase (code, MONO_ARCH_IMT_REG, AMD64_RAX, MONO_STRUCT_OFFSET (MonoDelegate, method), 8);
7858 }
7860 /* Load the vtable */
7861 amd64_mov_reg_membase (code, AMD64_RAX, AMD64_ARG_REG1, MONO_STRUCT_OFFSET (MonoObject, vtable), 8);
7863 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_DELEGATE_INVOKE, NULL));
7870 }
7872 /*
7873 * mono_arch_get_delegate_invoke_impls:
7874 *
7875 * Return a list of MonoTrampInfo structures for the delegate invoke impl
7876 * trampolines.
7877 */
7878 GSList*
7880 {
7891 }
7896 }
7903 }
7906 }
7908 gpointer
7910 {
7917 /* FIXME: Support more cases */
7933 }
7958 }
7963 }
7966 }
7968 gpointer
7969 mono_arch_get_delegate_virtual_invoke_impl (MonoMethodSignature *sig, MonoMethod *method, int offset, gboolean load_imt_reg)
7970 {
7972 gpointer code;
7978 }
7980 void
7982 {
7983 #if !defined(HOST_WIN32) && defined(MONO_XEN_OPT)
7985 #endif
7986 }
7988 void
7990 {
7991 }
7993 #define CMP_SIZE (6 + 1)
7994 #define CMP_REG_REG_SIZE (4 + 1)
7995 #define BR_SMALL_SIZE 2
7996 #define BR_LARGE_SIZE 6
7997 #define MOV_REG_IMM_SIZE 10
7998 #define MOV_REG_IMM_32BIT_SIZE 6
7999 #define JUMP_REG_SIZE (2 + 1)
8001 static int
8003 {
8008 }
8010 /*
8011 * LOCKING: called with the domain lock held
8012 */
8013 gpointer
8014 mono_arch_build_imt_trampoline (MonoVTable *vtable, MonoDomain *domain, MonoIMTCheckItem **imt_entries, int count,
8015 gpointer fail_tramp)
8016 {
8030 else
8032 }
8038 else
8040 }
8049 else
8052 /* with assert below:
8053 * item->chunk_size += CMP_SIZE + BR_SMALL_SIZE + 1;
8054 */
8055 }
8056 }
8060 else
8064 }
8066 }
8068 code = (guint8 *)mono_method_alloc_generic_virtual_trampoline (domain, size + MONO_TRAMPOLINE_UNWINDINFO_SIZE(0));
8069 else
8084 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8088 }
8089 }
8096 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8098 }
8105 }
8107 /* enable the commented code to assert on wrong method */
8108 #if 0
8110 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof(gpointer));
8114 }
8117 /* See the comment below about R10 */
8118 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8123 #else
8124 /* We're using R10 (MONO_ARCH_IMT_SCRATCH_REG) here because R11 (MONO_ARCH_IMT_REG)
8125 needs to be preserved. R10 needs
8126 to be preserved for calls which
8127 require a runtime generic context,
8128 but interface calls don't. */
8129 amd64_mov_reg_imm (code, MONO_ARCH_IMT_SCRATCH_REG, & (vtable->vtable [item->value.vtable_slot]));
8131 #endif
8132 }
8135 amd64_alu_reg_imm_size (code, X86_CMP, MONO_ARCH_IMT_REG, (guint32)(gssize)item->key, sizeof (gpointer));
8139 }
8143 else
8145 }
8147 }
8148 /* patch the branches to get to the target items */
8154 }
8155 }
8156 }
8161 g_assert_checked (mono_arch_unwindinfo_validate_size (unwind_ops, MONO_TRAMPOLINE_UNWINDINFO_SIZE(0)));
8163 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_IMT_TRAMPOLINE, NULL));
8165 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
8168 }
8170 MonoMethod*
8172 {
8174 }
8176 MonoVTable*
8178 {
8180 }
8182 GSList*
8184 {
8191 }
8193 #ifndef DISABLE_JIT
8195 MonoInst*
8196 mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args)
8197 {
8210 }
8218 }
8240 }
8241 }
8250 }
8252 #if 0
8253 /* OP_FREM is not IEEE compatible */
8258 }
8259 #endif
8261 if (!cfg->compile_aot && (mono_arch_cpu_enumerate_simd_versions () & SIMD_VERSION_SSE41) && fsig->param_count == 1 && fsig->params [0]->type == MONO_TYPE_R8) {
8277 }
8278 }
8279 }
8282 }
8283 #endif
8285 host_mgreg_t
8287 {
8289 }
8291 void
8293 {
8295 }
8297 /*
8298 * mono_arch_emit_load_aotconst:
8299 *
8300 * Emit code to load the contents of the GOT slot identified by TRAMP_TYPE and
8301 * TARGET from the mscorlib GOT in full-aot code.
8302 * On AMD64, the result is placed into R11.
8303 */
8304 guint8*
8305 mono_arch_emit_load_aotconst (guint8 *start, guint8 *code, MonoJumpInfo **ji, MonoJumpInfoType tramp_type, gconstpointer target)
8306 {
8311 }
8313 /*
8314 * mono_arch_get_trampolines:
8315 *
8316 * Return a list of MonoTrampInfo structures describing arch specific trampolines
8317 * for AOT.
8318 */
8319 GSList *
8321 {
8323 }
8325 /* Soft Debug support */
8326 #ifdef MONO_ARCH_SOFT_DEBUG_SUPPORTED
8328 /*
8329 * mono_arch_set_breakpoint:
8330 *
8331 * Set a breakpoint at the native code corresponding to JI at NATIVE_OFFSET.
8332 * The location should contain code emitted by OP_SEQ_POINT.
8333 */
8334 void
8336 {
8341 SeqPointInfo *info = mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8346 /* ip points to a mov r11, 0 */
8350 }
8351 }
8353 /*
8354 * mono_arch_clear_breakpoint:
8355 *
8356 * Clear the breakpoint at IP.
8357 */
8358 void
8360 {
8365 SeqPointInfo *info = mono_arch_get_seq_point_info (mono_domain_get (), (guint8 *)ji->code_start);
8370 }
8371 }
8373 gboolean
8375 {
8376 /* We use soft breakpoints on amd64 */
8378 }
8380 /*
8381 * mono_arch_skip_breakpoint:
8382 *
8383 * Modify CTX so the ip is placed after the breakpoint instruction, so when
8384 * we resume, the instruction is not executed again.
8385 */
8386 void
8388 {
8390 }
8392 /*
8393 * mono_arch_start_single_stepping:
8394 *
8395 * Start single stepping.
8396 */
8397 void
8399 {
8401 }
8403 /*
8404 * mono_arch_stop_single_stepping:
8405 *
8406 * Stop single stepping.
8407 */
8408 void
8410 {
8412 }
8414 /*
8415 * mono_arch_is_single_step_event:
8416 *
8417 * Return whenever the machine state in SIGCTX corresponds to a single
8418 * step event.
8419 */
8420 gboolean
8422 {
8423 /* We use soft breakpoints on amd64 */
8425 }
8427 /*
8428 * mono_arch_skip_single_step:
8429 *
8430 * Modify CTX so the ip is placed after the single step trigger instruction,
8431 * we resume, the instruction is not executed again.
8432 */
8433 void
8435 {
8437 }
8439 /*
8440 * mono_arch_create_seq_point_info:
8441 *
8442 * Return a pointer to a data structure which is used by the sequence
8443 * point implementation in AOTed code.
8444 */
8445 SeqPointInfo*
8447 {
8451 // FIXME: Add a free function
8455 code);
8462 // FIXME: Optimize the size
8463 info = (SeqPointInfo *)g_malloc0 (sizeof (SeqPointInfo) + (ji->code_size * sizeof (gpointer)));
8471 }
8474 }
8476 #endif
8478 gboolean
8480 {
8511 }
8512 }
8514 CallInfo*
8516 {
8518 }