2 * mono-memory-model.h: Mapping of the arch memory model.
5 * Rodrigo Kumpera (kumpera@gmail.com)
7 * (C) 2011 Xamarin, Inc
10 #ifndef _MONO_UTILS_MONO_MEMMODEL_H_
11 #define _MONO_UTILS_MONO_MEMMODEL_H_
14 #include <mono/utils/mono-membar.h>
17 In order to allow for fast concurrent code, we must use fencing to properly order
18 memory access - specially on arch with weaker memory models such as ARM or PPC.
20 On the other hand, we can't use arm's weak model on targets such as x86 that have
21 a stronger model that requires much much less fencing.
23 The idea of exposing each arch memory model is to avoid fencing whenever possible
24 but at the same time make all required ordering explicit.
26 There are four kinds of barriers, LoadLoad, LoadStore, StoreLoad and StoreStore.
27 Each arch must define which ones needs fencing.
29 We assume 3 kinds of barriers are available: load, store and memory (load+store).
31 TODO: Add support for weaker forms of CAS such as present on ARM.
32 TODO: replace all explicit uses of memory barriers with macros from this section. This will make a nicer read of lazy init code.
33 TODO: if we find places where a data depencency could replace barriers, add macros here to help with it
34 TODO: some arch with strong consistency, such as x86, support weaker access. We might need to expose more kinds of barriers once we exploit this.
38 * Keep in sync with the enum in mini/mini-llvm-cpp.h.
41 MONO_MEMORY_BARRIER_NONE
= 0,
42 MONO_MEMORY_BARRIER_ACQ
= 1,
43 MONO_MEMORY_BARRIER_REL
= 2,
44 MONO_MEMORY_BARRIER_SEQ
= 3,
47 #define MEMORY_BARRIER mono_memory_barrier ()
48 #define LOAD_BARRIER mono_memory_read_barrier ()
49 #define STORE_BARRIER mono_memory_write_barrier ()
51 #if defined(__i386__) || defined(__x86_64__)
53 Both x86 and amd64 follow the SPO memory model:
54 -Loads are not reordered with other loads
55 -Stores are not reordered with others stores
56 -Stores are not reordered with earlier loads
59 /*Neither sfence or mfence provide the required semantics here*/
60 #define STORE_LOAD_FENCE MEMORY_BARRIER
62 #define LOAD_RELEASE_FENCE MEMORY_BARRIER
63 #define STORE_ACQUIRE_FENCE MEMORY_BARRIER
65 #elif defined(__arm__)
67 ARM memory model is as weak as it can get. the only guarantee are data dependent
69 LoadStore fences are much better handled using a data depencency such as:
70 load x; if (x = x) store y;
72 This trick can be applied to other fences such as LoadLoad, but require some assembly:
79 #define STORE_STORE_FENCE STORE_BARRIER
80 #define LOAD_LOAD_FENCE LOAD_BARRIER
81 #define STORE_LOAD_FENCE MEMORY_BARRIER
82 #define STORE_ACQUIRE_FENCE MEMORY_BARRIER
83 #define STORE_RELEASE_FENCE MEMORY_BARRIER
84 #define LOAD_ACQUIRE_FENCE MEMORY_BARRIER
85 #define LOAD_RELEASE_FENCE MEMORY_BARRIER
87 #elif defined(__s390x__)
89 #define STORE_STORE_FENCE do {} while (0)
90 #define LOAD_LOAD_FENCE do {} while (0)
91 #define STORE_LOAD_FENCE do {} while (0)
92 #define LOAD_STORE_FENCE do {} while (0)
93 #define STORE_RELEASE_FENCE do {} while (0)
97 /*default implementation with the weakest possible memory model */
98 #define STORE_STORE_FENCE STORE_BARRIER
99 #define LOAD_LOAD_FENCE LOAD_BARRIER
100 #define STORE_LOAD_FENCE MEMORY_BARRIER
101 #define LOAD_STORE_FENCE MEMORY_BARRIER
102 #define STORE_ACQUIRE_FENCE MEMORY_BARRIER
103 #define STORE_RELEASE_FENCE MEMORY_BARRIER
104 #define LOAD_ACQUIRE_FENCE MEMORY_BARRIER
105 #define LOAD_RELEASE_FENCE MEMORY_BARRIER
109 #ifndef STORE_STORE_FENCE
110 #define STORE_STORE_FENCE
113 #ifndef LOAD_LOAD_FENCE
114 #define LOAD_LOAD_FENCE
117 #ifndef STORE_LOAD_FENCE
118 #define STORE_LOAD_FENCE
121 #ifndef LOAD_STORE_FENCE
122 #define LOAD_STORE_FENCE
125 #ifndef STORE_RELEASE_FENCE
126 #define STORE_RELEASE_FENCE
129 #ifndef LOAD_RELEASE_FENCE
130 #define LOAD_RELEASE_FENCE
133 #ifndef STORE_ACQUIRE_FENCE
134 #define STORE_ACQUIRE_FENCE
137 #ifndef LOAD_ACQUIRE_FENCE
138 #define LOAD_ACQUIRE_FENCE
142 /*Makes sure all previous stores as visible before */
143 #define mono_atomic_store_seq(target,value) do { \
145 *(target) = (value); \
150 Acquire/release semantics macros.
152 #define mono_atomic_store_release(target,value) do { \
153 STORE_RELEASE_FENCE; \
154 *(target) = (value); \
157 #define mono_atomic_load_release(_type,target) ({ \
159 LOAD_RELEASE_FENCE; \
163 #define mono_atomic_load_acquire(var,_type,target) do { \
164 _type __tmp = *(target); \
165 LOAD_ACQUIRE_FENCE; \
169 #define mono_atomic_store_acquire(target,value) { \
170 *(target) = (value); \
171 STORE_ACQUIRE_FENCE; \
174 #endif /* _MONO_UTILS_MONO_MEMMODEL_H_ */