mono/arch/alpha/alpha-codegen.h

   1 #ifndef __ALPHA_CODEGEN_H__
   2 #define __ALPHA_CODEGEN_H__
   3
   4 /*
   5     http://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf
   6 */
   7
   8 typedef enum {
   9         alpha_r0 = 0,
  10         alpha_r1 = 1,
  11         alpha_r2 = 2,
  12         alpha_r3 = 3,
  13         alpha_r4 = 4,
  14         alpha_r5 = 5,
  15         alpha_r6 = 6,
  16         alpha_r7 = 7,
  17         alpha_r8 = 8,
  18         alpha_r9 = 9,
  19         alpha_r10 = 10,
  20         alpha_r11 = 11,
  21         alpha_r12 = 12,
  22         alpha_r13 = 13,
  23         alpha_r14 = 14,
  24         alpha_r15 = 15,
  25         alpha_r16 = 16,
  26         alpha_r17 = 17,
  27         alpha_r18 = 18,
  28         alpha_r19 = 19,
  29         alpha_r20 = 20,
  30         alpha_r21 = 21,
  31         alpha_r22 = 22,
  32         alpha_r23 = 23,
  33         alpha_r24 = 24,
  34         alpha_r25 = 25,
  35         alpha_r26 = 26,
  36         alpha_r27 = 27,
  37         alpha_r28 = 28,
  38         alpha_r29 = 29,
  39         alpha_r30 = 30,
  40         alpha_r31 = 31, alpha_zero = 31,
  41         /* aliases */
  42         alpha_v0 = 0,  /* return value */
  43
  44         alpha_t0 = 1,  /* temporaries */
  45         alpha_t1 = 2,
  46         alpha_t2 = 3,
  47         alpha_t3 = 4,
  48         alpha_t4 = 5,
  49         alpha_t5 = 6,
  50         alpha_t6 = 7,
  51         alpha_t7 = 8,
  52
  53         alpha_s0 = 9,  /* saved registers */
  54         alpha_s1 = 10,
  55         alpha_s2 = 11,
  56         alpha_s3 = 12,
  57         alpha_s4 = 13,
  58         alpha_s5 = 14,
  59         alpha_s6 = 15,
  60
  61         alpha_fp = 15, /* frame pointer */
  62
  63         alpha_a0 = 16, /* argument registers */
  64         alpha_a1 = 17,
  65         alpha_a2 = 18,
  66         alpha_a3 = 19,
  67         alpha_a4 = 20,
  68         alpha_a5 = 21,
  69
  70         alpha_t8  = 22, /* temporaries */
  71         alpha_t9  = 23,
  72         alpha_t10  = 24,
  73         alpha_t11  = 25,
  74
  75         alpha_ra   = 26,   /* Return Address */
  76
  77         alpha_pv   = 27,  /* pv  current procedure */
  78         alpha_t12  = 27,  /* temp 12 */
  79
  80         alpha_altreg = 28,
  81         alpha_at     = 28,
  82
  83         alpha_gp     = 29,  /* Global Pointer */
  84         alpha_sp     = 30,  /* Stack Pointer */
  85 } AlphaRegister;
  86
  87 typedef enum {
  88         /* floating point registers */
  89         alpha_f0 = 0,
  90         alpha_f1 = 1,
  91         alpha_f2 = 2,
  92         alpha_f3 = 3,
  93         alpha_f4 = 4,
  94         alpha_f5 = 5,
  95         alpha_f6 = 6,
  96         alpha_f7 = 7,
  97         alpha_f8 = 8,
  98         alpha_f9 = 9,
  99         alpha_f10 = 10,
 100         alpha_f11 = 11,
 101         alpha_f12 = 12,
 102         alpha_f13 = 13,
 103         alpha_f14 = 14,
 104         alpha_f15 = 15,
 105         alpha_f16 = 16,
 106         alpha_f17 = 17,
 107         alpha_f18 = 18,
 108         alpha_f19 = 19,
 109         alpha_f20 = 20,
 110         alpha_f21 = 21,
 111         alpha_f22 = 22,
 112         alpha_f23 = 23,
 113         alpha_f24 = 24,
 114         alpha_f25 = 25,
 115         alpha_f26 = 26,
 116         alpha_f27 = 27,
 117         alpha_f28 = 28,
 118         alpha_f29 = 29,
 119         alpha_f30 = 30,
 120         alpha_f31 = 31, alpha_fzero = 31,
 121         /* aliases */
 122         alpha_fv0 = 0, /* return value */
 123         alpha_fv1 = 1,
 124
 125         alpha_fs0 = 2, /* saved registers */
 126         alpha_fs1 = 3,
 127         alpha_fs2 = 4,
 128         alpha_fs3 = 5,
 129         alpha_fs4 = 6,
 130         alpha_fs5 = 7,
 131         alpha_fs6 = 8,
 132         alpha_fs7 = 9,
 133
 134         alpha_ft0 = 10, /* temporary */
 135         alpha_ft1 = 11,
 136         alpha_ft2 = 12,
 137         alpha_ft3 = 13,
 138         alpha_ft4 = 14,
 139         alpha_ft5 = 15,
 140
 141         alpha_fa0 = 16, /* args */
 142         alpha_fa1 = 17,
 143         alpha_fa2 = 18,
 144         alpha_fa3 = 19,
 145         alpha_fa4 = 20,
 146         alpha_fa5 = 21,
 147
 148         alpha_ft6 = 22,
 149         alpha_ft7 = 23,
 150         alpha_ft8 = 24,
 151         alpha_ft9 = 25,
 152         alpha_ft10 = 26,
 153         alpha_ft11 = 27,
 154         alpha_ft12 = 28,
 155         alpha_ft13 = 29,
 156         alpha_ft14 = 30
 157 } AlphaFPRegister;
 158
 159 /***************************************/
 160
 161 #define __alpha_int_32 unsigned int
 162
 163 /***************************************/
 164 #define AXP_OFF26_MASK 0x03ffffff
 165 #define AXP_OFF21_MASK 0x01fffff
 166 #define AXP_OFF16_MASK 0x0ffff
 167 #define AXP_OFF14_MASK 0x03fff
 168 #define AXP_OFF13_MASK 0x01fff
 169 #define AXP_OFF11_MASK 0x07ff
 170 #define AXP_OFF8_MASK  0x0ff
 171 #define AXP_OFF7_MASK  0x07f
 172 #define AXP_OFF6_MASK  0x03f
 173 #define AXP_OFF5_MASK  0x01f
 174 #define AXP_OFF4_MASK  0x0f
 175 #define AXP_OFF2_MASK  0x03
 176 #define AXP_OFF1_MASK  0x01
 177
 178
 179 #define AXP_REG_MASK  AXP_OFF5_MASK
 180 #define AXP_REGSIZE      5
 181
 182 #define AXP_OP_SHIFT     26
 183 #define AXP_REG1_SHIFT   21
 184 #define AXP_REG2_SHIFT   16
 185 #define AXP_MEM_BR_SHIFT 14
 186 #define AXP_LIT_SHIFT    13
 187
 188 /* encode registers */
 189 #define alpha_opcode( op ) \
 190         ((op&AXP_OFF6_MASK) << AXP_OP_SHIFT)
 191
 192 /* encode registers */
 193 #define alpha_reg_a( reg ) \
 194         ((reg & AXP_REG_MASK) << AXP_REG1_SHIFT)
 195
 196 #define alpha_reg_b( reg ) \
 197         ((reg & AXP_REG_MASK) << AXP_REG2_SHIFT)
 198
 199 #define alpha_reg_c( reg ) \
 200         (reg & AXP_REG_MASK)
 201
 202
 203
 204 /* encode function codes */
 205 #define alpha_fp_func( func ) \
 206         ((func & AXP_OFF11_MASK) << AXP_REGSIZE)
 207
 208 #define alpha_op_func( func ) \
 209         ((func & AXP_OFF7_MASK) << AXP_REGSIZE)
 210
 211 #define alpha_op_literal( lit ) \
 212         ((lit &  AXP_OFF8_MASK) << AXP_LIT_SHIFT)
 213
 214 #define alpha_mem_br_func( func, hint ) \
 215     (((func & AXP_OFF2_MASK ) << AXP_MEM_BR_SHIFT ) | (hint&AXP_OFF14_MASK))
 216
 217 #define alpha_mem_fc_func( func ) \
 218         (func && AXP_OFF16_MASK)
 219
 220
 221 #define alpha_encode_hw4_mem( op, func ) \
 222                 (alpha_opcode( op ) | (( func & 0x0f ) << 12))
 223
 224 #define alpha_encode_hw5_mem( op, func ) \
 225                 (alpha_opcode( op ) | (( func & 0x3f ) << 10))
 226
 227 #define alpha_encode_hw6mem( op, func ) \
 228                 (alpha_opcode( op ) | (( func & 0x0f ) << 12))
 229
 230 #define alpha_encode_hw6mem_br( op, func ) \
 231                 (alpha_opcode( op ) | (( func & 0x07 ) << 13))
 232
 233
 234 /*****************************************/
 235
 236
 237 #define alpha_encode_palcall( ins, op, func ) \
 238         *((__alpha_int_32*)(ins)) = ( 0 |\
 239                 alpha_opcode( op ) | ( func & AXP_OFF26_MASK )),\
 240         ((__alpha_int_32*)(ins))++
 241
 242 #define alpha_encode_mem( ins, op, Rdest, Rsrc, offset ) \
 243         *((__alpha_int_32*)(ins)) = ( 0 |\
 244                 alpha_opcode( op ) | alpha_reg_a( Rdest ) | \
 245                 alpha_reg_b( Rsrc ) | (offset & AXP_OFF16_MASK )),\
 246         ((__alpha_int_32*)(ins))++
 247
 248 #define alpha_encode_mem_fc( ins, op, func, Rdest, Rsrc, offset ) \
 249         *((__alpha_int_32*)(ins)) = ( 0 |\
 250                 alpha_opcode( op ) | alpha_reg_a( Rdest ) | \
 251                 alpha_reg_b( Rsrc ) | alpha_mem_fc_func( func )),\
 252         *((__alpha_int_32*)(ins))++
 253
 254 #define alpha_encode_mem_br( ins, op, func,  Rdest, Rsrc, hint ) \
 255         *((__alpha_int_32*)(ins)) = ( 0 |\
 256                 alpha_opcode( op ) | alpha_reg_a( Rdest ) | \
 257                 alpha_reg_b( Rsrc ) | alpha_mem_br_func( func, hint ) ),\
 258         ((__alpha_int_32*)(ins))++
 259
 260 #define alpha_encode_branch( ins, op, Reg, offset ) \
 261         *((__alpha_int_32*)(ins)) = ( 0 |\
 262                 alpha_opcode( op ) | alpha_reg_a( Reg ) | \
 263                 (offset & AXP_OFF21_MASK )),\
 264         ((__alpha_int_32*)(ins))++
 265
 266 #define alpha_encode_op( ins, op, func, Rsrc1, Rsrc2, Rdest ) \
 267         *((__alpha_int_32*)(ins)) = ( 0 |\
 268                 alpha_opcode( op ) | alpha_reg_a( Rsrc1 ) | \
 269                 alpha_reg_b( Rsrc2 ) | alpha_op_func( func ) | \
 270                 alpha_reg_c( Rdest )),\
 271         ((__alpha_int_32*)(ins))++
 272
 273
 274 #define alpha_encode_opl( ins, op, func, Rsrc, lit, Rdest ) \
 275         *((__alpha_int_32*)(ins)) = ( 0 |\
 276                 alpha_opcode( op ) | alpha_reg_a( Rsrc ) | \
 277                 alpha_op_literal(lit) | ( 1 << 12 ) | \
 278                 alpha_op_func( func ) | alpha_reg_c( Rdest ) ),\
 279         ((__alpha_int_32*)(ins))++
 280
 281
 282 #define alpha_encode_fpop( ins, op, func, Rsrc1, Rsrc2, Rdest ) \
 283         *((__alpha_int_32*)(ins)) = ( 0 |\
 284                 alpha_opcode( op ) | alpha_reg_a( Rsrc1 ) | \
 285                 alpha_reg_b( Rsrc2 ) | alpha_fp_func( func ) | \
 286                 alpha_reg_c( Rdest )),\
 287         ((__alpha_int_32*)(ins))++
 288
 289
 290 /***************************************/
 291
 292 /* pal calls */
 293 /* #define alpha_halt( ins )            alpha_encode_palcall( ins, 0, 0 ) */
 294
 295 #define alpha_call_pal( ins, func )  alpha_encode_palcall( ins, 0, func )
 296
 297 /*memory*/
 298 #define alpha_lda( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x08, Rdest, Rsrc, offset )
 299 #define alpha_ldah( ins, Rdest, Rsrc, offset )  alpha_encode_mem( ins, 0x09, Rdest, Rsrc, offset )
 300 #define alpha_ldbu( ins, Rdest, Rsrc, offset )  alpha_encode_mem( ins, 0x0a, Rdest, Rsrc, offset )
 301 #define alpha_ldq_u( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x0b, Rdest, Rsrc, offset )
 302 #define alpha_ldwu( ins, Rdest, Rsrc, offset )  alpha_encode_mem( ins, 0x0c, Rdest, Rsrc, offset )
 303 #define alpha_stw( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x0d, Rdest, Rsrc, offset )
 304 #define alpha_stb( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x0e, Rdest, Rsrc, offset )
 305 #define alpha_stq_u( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x0f, Rdest, Rsrc, offset )
 306
 307 #ifdef __VAX__
 308 #define alpha_ldf( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x20, Rdest, Rsrc, offset )
 309 #define alpha_ldg( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x21, Rdest, Rsrc, offset )
 310 #define alpha_stf( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x24, Rdest, Rsrc, offset )
 311 #define alpha_stg( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x25, Rdest, Rsrc, offset )
 312 #endif
 313
 314 #define alpha_lds( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x22, Rdest, Rsrc, offset )
 315 #define alpha_ldt( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x23, Rdest, Rsrc, offset )
 316 #define alpha_ldqf( ins, Rdest, Rsrc, offset )  alpha_encode_mem( ins, 0x23, Rdest, Rsrc, offset )
 317
 318 #define alpha_sts( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x26, Rdest, Rsrc, offset )
 319 #define alpha_stt( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x27, Rdest, Rsrc, offset )
 320 #define alpha_stqf( ins, Rdest, Rsrc, offset )  alpha_encode_mem( ins, 0x27, Rdest, Rsrc, offset )
 321
 322
 323 #define alpha_ldl( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x28, Rdest, Rsrc, offset )
 324 #define alpha_ldq( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x29, Rdest, Rsrc, offset )
 325 #define alpha_ldl_l( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2A, Rdest, Rsrc, offset )
 326 #define alpha_ldq_l( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2B, Rdest, Rsrc, offset )
 327 #define alpha_stl( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x2C, Rdest, Rsrc, offset )
 328 #define alpha_stq( ins, Rdest, Rsrc, offset )   alpha_encode_mem( ins, 0x2D, Rdest, Rsrc, offset )
 329 #define alpha_stl_c( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2E, Rdest, Rsrc, offset )
 330 #define alpha_stq_c( ins, Rdest, Rsrc, offset ) alpha_encode_mem( ins, 0x2F, Rdest, Rsrc, offset )
 331
 332
 333 /* branch*/
 334 #define alpha_jmp( ins, Rdest, Rsrc, hint ) alpha_encode_mem_br( ins, 0x1A, 0x0, Rdest, Rsrc, hint )
 335 #define alpha_jsr( ins, Rdest, Rsrc, hint ) alpha_encode_mem_br( ins, 0x1A, 0x1, Rdest, Rsrc, hint )
 336 #define alpha_ret( ins, Rsrc, hint ) alpha_encode_mem_br( ins, 0x1A, 0x2, alpha_zero, Rsrc, hint )
 337 #define alpha_jsrco( ins, Rdest, Rsrc, hint ) alpha_encode_mem_br( ins, 0x1A, 0x3, Rdest, Rsrc, hint )
 338
 339 #define alpha_br( ins, Reg, offset )    alpha_encode_branch( ins, 0x30, Reg, offset )
 340 #define alpha_fbeq( ins, Reg, offset )  alpha_encode_branch( ins, 0x31, Reg, offset )
 341 #define alpha_fblt( ins, Reg, offset )  alpha_encode_branch( ins, 0x32, Reg, offset )
 342 #define alpha_fble( ins, Reg, offset )  alpha_encode_branch( ins, 0x33, Reg, offset )
 343 #define alpha_bsr( ins, Reg, offset )   alpha_encode_branch( ins, 0x34, Reg, offset )
 344 #define alpha_fbne( ins, Reg, offset )  alpha_encode_branch( ins, 0x35, Reg, offset )
 345 #define alpha_fbge( ins, Reg, offset )  alpha_encode_branch( ins, 0x36, Reg, offset )
 346 #define alpha_fbgt( ins, Reg, offset )  alpha_encode_branch( ins, 0x37, Reg, offset )
 347 #define alpha_blbc( ins, Reg, offset )  alpha_encode_branch( ins, 0x38, Reg, offset )
 348 #define alpha_beq( ins, Reg, offset )   alpha_encode_branch( ins, 0x39, Reg, offset )
 349 #define alpha_blt( ins, Reg, offset )   alpha_encode_branch( ins, 0x3A, Reg, offset )
 350 #define alpha_ble( ins, Reg, offset )   alpha_encode_branch( ins, 0x3B, Reg, offset )
 351 #define alpha_blbs( ins, Reg, offset )  alpha_encode_branch( ins, 0x3C, Reg, offset )
 352 #define alpha_bne( ins, Reg, offset )   alpha_encode_branch( ins, 0x3D, Reg, offset )
 353 #define alpha_bge( ins, Reg, offset )   alpha_encode_branch( ins, 0x3E, Reg, offset )
 354 #define alpha_bgt( ins, Reg, offset )   alpha_encode_branch( ins, 0x3F, Reg, offset )
 355
 356
 357 /* integer */
 358 /*//#define alpha_sextl( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x00, Rsrc1, Rsrc2, Rdest )
 359 //#define alpha_sextl_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x00, Rsrc1, lit, Rdest )
 360 */
 361 #define alpha_addl( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x00, Rsrc1, Rsrc2, Rdest )
 362 #define alpha_addl_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x00, Rsrc1, lit, Rdest )
 363 #define alpha_s4addl( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x02, Rsrc1, Rsrc2, Rdest )
 364 #define alpha_s4addl_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x02, Rsrc1, lit, Rdest )
 365 //#define alpha_negl( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x09, Rsrc1, Rsrc2, Rdest )
 366 //#define alpha_negl_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x09, Rsrc1, lit, Rdest )
 367 #define alpha_subl( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x09, Rsrc1, Rsrc2, Rdest )
 368 #define alpha_subl_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x09, Rsrc1, lit, Rdest )
 369 #define alpha_s4subl( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x0B, Rsrc1, Rsrc2, Rdest )
 370 #define alpha_s4subl_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x0B, Rsrc1, lit, Rdest )
 371 #define alpha_cmpbge( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x0F, Rsrc1, Rsrc2, Rdest )
 372 #define alpha_cmpbge_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x0F, Rsrc1, lit, Rdest )
 373 #define alpha_s8addl( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x12, Rsrc1, Rsrc2, Rdest )
 374 #define alpha_s8addl_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x12, Rsrc1, lit, Rdest )
 375 #define alpha_s8subl( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x1B, Rsrc1, Rsrc2, Rdest )
 376 #define alpha_s8subl_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x1B, Rsrc1, lit, Rdest )
 377 #define alpha_cmpult( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x1d, Rsrc1, Rsrc2, Rdest )
 378 #define alpha_cmpult_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x1d, Rsrc1, lit, Rdest )
 379 #define alpha_addq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x20, Rsrc1, Rsrc2, Rdest )
 380 #define alpha_addq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x20, Rsrc1, lit, Rdest )
 381 #define alpha_s4addq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x22, Rsrc1, Rsrc2, Rdest )
 382 #define alpha_s4addq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x22, Rsrc1, lit, Rdest )
 383 //#define alpha_negq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x29, Rsrc1, Rsrc2, Rdest )
 384 //#define alpha_negq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x29, Rsrc1, lit, Rdest )
 385 #define alpha_subq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x29, Rsrc1, Rsrc2, Rdest )
 386 #define alpha_subq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x29, Rsrc1, lit, Rdest )
 387 #define alpha_s4subq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x2B, Rsrc1, Rsrc2, Rdest )
 388 #define alpha_s4subq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x2B, Rsrc1, lit, Rdest )
 389 #define alpha_cmpeq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x2D, Rsrc1, Rsrc2, Rdest )
 390 #define alpha_cmpeq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x2D, Rsrc1, lit, Rdest )
 391 #define alpha_s8addq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x32, Rsrc1, Rsrc2, Rdest )
 392 #define alpha_s8addq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x32, Rsrc1, lit, Rdest )
 393 #define alpha_s8subq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x3B, Rsrc1, Rsrc2, Rdest )
 394 #define alpha_s8subq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x3B, Rsrc1, lit, Rdest )
 395 #define alpha_cmpule( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x3D, Rsrc1, Rsrc2, Rdest )
 396 #define alpha_cmpule_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x3D, Rsrc1, lit, Rdest )
 397 #define alpha_addlv( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x40, Rsrc1, Rsrc2, Rdest )
 398 #define alpha_addlv_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x40, Rsrc1, lit, Rdest )
 399 //#define alpha_neglv( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x49, Rsrc1, Rsrc2, Rdest )
 400 //#define alpha_neglv_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x49, Rsrc1, lit, Rdest )
 401 #define alpha_sublv( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x49, Rsrc1, Rsrc2, Rdest )
 402 #define alpha_sublv_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x49, Rsrc1, lit, Rdest )
 403 #define alpha_cmplt( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x4D, Rsrc1, Rsrc2, Rdest )
 404 #define alpha_cmplt_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x4D, Rsrc1, lit, Rdest )
 405 #define alpha_addqv( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x60, Rsrc1, Rsrc2, Rdest )
 406 #define alpha_addqv_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x60, Rsrc1, lit, Rdest )
 407 //#define alpha_negqv( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x69, Rsrc1, Rsrc2, Rdest )
 408 //#define alpha_negqv_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x69, Rsrc1, lit, Rdest )
 409 #define alpha_subqv( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x69, Rsrc1, Rsrc2, Rdest )
 410 #define alpha_subqv_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x69, Rsrc1, lit, Rdest )
 411 #define alpha_cmple( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x10, 0x6D, Rsrc1, Rsrc2, Rdest )
 412 #define alpha_cmple_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x10, 0x6D, Rsrc1, lit, Rdest )
 413
 414 #define alpha_and( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x00, Rsrc1, Rsrc2, Rdest )
 415 #define alpha_and_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x00, Rsrc1, lit, Rdest )
 416 //#define alpha_andnot( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x08, Rsrc1, Rsrc2, Rdest )
 417 //#define alpha_andnot_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x08, Rsrc1, lit, Rdest )
 418 #define alpha_bic( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x08, Rsrc1, Rsrc2, Rdest )
 419 #define alpha_bic_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x08, Rsrc1, lit, Rdest )
 420 #define alpha_cmovlbs( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x14, Rsrc1, Rsrc2, Rdest )
 421 #define alpha_cmovlbs_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x14, Rsrc1, lit, Rdest )
 422 #define alpha_cmovlbc( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x16, Rsrc1, Rsrc2, Rdest )
 423 #define alpha_cmovlbc_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x16, Rsrc1, lit, Rdest )
 424 #define alpha_nop( ins )                           alpha_encode_op( ins, 0x11, 0x20, alpha_zero, alpha_zero, alpha_zero )
 425 #define alpha_clr( ins, Rdest )                    alpha_encode_op( ins, 0x11, 0x20, alpha_zero, alpha_zero, Rdest )
 426 #define alpha_mov1( ins, Rsrc, Rdest )             alpha_encode_op( ins, 0x11, 0x20, alpha_zero, Rsrc, Rdest )
 427 #define alpha_mov2( ins, Rsrc1, Rsrc2, Rdest )    alpha_encode_op( ins, 0x11, 0x20,  Rsrc1, Rsrc2, Rdest )
 428 #define alpha_mov_( ins, lit, Rdest )              alpha_encode_op( ins, 0x11, 0x20, alpha_zero, lit, Rdest )
 429 //#define alpha_or( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x20, Rsrc1, Rsrc2, Rdest )
 430 //#define alpha_or_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x20, Rsrc1, lit, Rdest )
 431 #define alpha_bis( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x20, Rsrc1, Rsrc2, Rdest )
 432 #define alpha_bis_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x20, Rsrc1, lit, Rdest )
 433 #define alpha_cmoveq( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x24, Rsrc1, Rsrc2, Rdest )
 434 #define alpha_cmoveq_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x24, Rsrc1, lit, Rdest )
 435 #define alpha_cmovne( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x26, Rsrc1, Rsrc2, Rdest )
 436 #define alpha_cmovne_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x26, Rsrc1, lit, Rdest )
 437 #define alpha_not( ins,  Rsrc2, Rdest )        alpha_encode_op( ins, 0x11, 0x28, alpha_zero, Rsrc2, Rdest )
 438 #define alpha_not_( ins, lit, Rdest )          alpha_encode_opl( ins, 0x11, 0x28, alpha_zero, lit, Rdest )
 439 #define alpha_ornot( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x28, Rsrc1, Rsrc2, Rdest )
 440 #define alpha_ornot_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x28, Rsrc1, lit, Rdest )
 441 #define alpha_xor( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x40, Rsrc1, Rsrc2, Rdest )
 442 #define alpha_xor_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x40, Rsrc1, lit, Rdest )
 443 #define alpha_cmovlt( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x44, Rsrc1, Rsrc2, Rdest )
 444 #define alpha_cmovlt_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x44, Rsrc1, lit, Rdest )
 445 #define alpha_cmovge( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x46, Rsrc1, Rsrc2, Rdest )
 446 #define alpha_cmovge_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x46, Rsrc1, lit, Rdest )
 447 #define alpha_eqv( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x48, Rsrc1, Rsrc2, Rdest )
 448 #define alpha_eqv_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x48, Rsrc1, lit, Rdest )
 449 //#define alpha_xornot( ins,  Rsrc1, Rsrc2, Rdest ) alpha_encode_op( ins, 0x11, 0x48, Rsrc1, Rsrc2, Rdest )
 450 //#define alpha_xornot_( ins,  Rsrc1, lit, Rdest )  alpha_encode_opl( ins, 0x11, 0x48, Rsrc1, lit, Rdest )
 451 #define alpha_ev56b_amask( ins,  Rsrc2, Rdest )     alpha_encode_op( ins, 0x11, 0x61, alpha_zero, Rsrc2, Rdest )
 452 #define alpha_ev56b_amask_( ins,  lit, Rdest )      alpha_encode_opl( ins, 0x11, 0x61, alpha_zero, lit, Rdest )
 453 #define alpha_cmovle( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x11, 0x64, Rsrc1, Rsrc2, Rdest )
 454 #define alpha_cmovle_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x11, 0x64, Rsrc1, lit, Rdest )
 455 #define alpha_cmovgt( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x11, 0x66, Rsrc1, Rsrc2, Rdest )
 456 #define alpha_cmovgt_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x11, 0x66, Rsrc1, lit, Rdest )
 457 //#define alpha_implver_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x11, 0x6C, Rsrc1, lit, Rdest )
 458 #define alpha_cmovgt( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x11, 0x66, Rsrc1, Rsrc2, Rdest )
 459 #define alpha_cmovgt_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x11, 0x66, Rsrc1, lit, Rdest )
 460
 461 #define alpha_mskbl( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x02, Rsrc1, Rsrc2, Rdest )
 462 #define alpha_mskbl_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x02, Rsrc1, lit, Rdest )
 463 #define alpha_extbl( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x06, Rsrc1, Rsrc2, Rdest )
 464 #define alpha_extbl_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x06, Rsrc1, lit, Rdest )
 465 #define alpha_insbl( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x0B, Rsrc1, Rsrc2, Rdest )
 466 #define alpha_insbl_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x0B, Rsrc1, lit, Rdest )
 467 #define alpha_mskwl( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x12, Rsrc1, Rsrc2, Rdest )
 468 #define alpha_mskwl_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x12, Rsrc1, lit, Rdest )
 469 #define alpha_extwl( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x16, Rsrc1, Rsrc2, Rdest )
 470 #define alpha_extwl_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x16, Rsrc1, lit, Rdest )
 471 #define alpha_inswl( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x1b, Rsrc1, Rsrc2, Rdest )
 472 #define alpha_inswl_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x1b, Rsrc1, lit, Rdest )
 473 #define alpha_mskll( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x22, Rsrc1, Rsrc2, Rdest )
 474 #define alpha_mskll_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x22, Rsrc1, lit, Rdest )
 475 #define alpha_extll( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x26, Rsrc1, Rsrc2, Rdest )
 476 #define alpha_extll_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x26, Rsrc1, lit, Rdest )
 477 #define alpha_insll( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x2b, Rsrc1, Rsrc2, Rdest )
 478 #define alpha_insll_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x2b, Rsrc1, lit, Rdest )
 479 #define alpha_zap( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x30, Rsrc1, Rsrc2, Rdest )
 480 #define alpha_zap_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x30, Rsrc1, lit, Rdest )
 481 #define alpha_zapnot( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x31, Rsrc1, Rsrc2, Rdest )
 482 #define alpha_zapnot_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x31, Rsrc1, lit, Rdest )
 483 #define alpha_mskql( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x32, Rsrc1, Rsrc2, Rdest )
 484 #define alpha_mskql_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x32, Rsrc1, lit, Rdest )
 485 #define alpha_srl( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x34, Rsrc1, Rsrc2, Rdest )
 486 #define alpha_srl_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x34, Rsrc1, lit, Rdest )
 487 #define alpha_extql( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x36, Rsrc1, Rsrc2, Rdest )
 488 #define alpha_extql_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x36, Rsrc1, lit, Rdest )
 489 #define alpha_sll( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x39, Rsrc1, Rsrc2, Rdest )
 490 #define alpha_sll_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x39, Rsrc1, lit, Rdest )
 491 #define alpha_insql( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x3b, Rsrc1, Rsrc2, Rdest )
 492 #define alpha_insql_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x3b, Rsrc1, lit, Rdest )
 493 #define alpha_sra( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x3c, Rsrc1, Rsrc2, Rdest )
 494 #define alpha_sra_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x3c, Rsrc1, lit, Rdest )
 495 #define alpha_mskwh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x52, Rsrc1, Rsrc2, Rdest )
 496 #define alpha_mskwh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x52, Rsrc1, lit, Rdest )
 497 #define alpha_inswh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x57, Rsrc1, Rsrc2, Rdest )
 498 #define alpha_inswh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x57, Rsrc1, lit, Rdest )
 499 #define alpha_extwh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x5a, Rsrc1, Rsrc2, Rdest )
 500 #define alpha_extwh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x5a, Rsrc1, lit, Rdest )
 501 #define alpha_msklh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x62, Rsrc1, Rsrc2, Rdest )
 502 #define alpha_msklh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x62, Rsrc1, lit, Rdest )
 503 #define alpha_inslh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x67, Rsrc1, Rsrc2, Rdest )
 504 #define alpha_inslh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x67, Rsrc1, lit, Rdest )
 505 #define alpha_extlh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x6a, Rsrc1, Rsrc2, Rdest )
 506 #define alpha_extlh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x6a, Rsrc1, lit, Rdest )
 507 #define alpha_mskqh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x72, Rsrc1, Rsrc2, Rdest )
 508 #define alpha_mskqh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x72, Rsrc1, lit, Rdest )
 509 #define alpha_insqh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x77, Rsrc1, Rsrc2, Rdest )
 510 #define alpha_insqh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x77, Rsrc1, lit, Rdest )
 511 #define alpha_extqh( ins,  Rsrc1, Rsrc2, Rdest )   alpha_encode_op( ins, 0x12, 0x7a, Rsrc1, Rsrc2, Rdest )
 512 #define alpha_extqh_( ins,  Rsrc1, lit, Rdest )    alpha_encode_opl( ins, 0x12, 0x7a, Rsrc1, lit, Rdest )
 513
 514 #define alpha_mull(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_op( ins, 0x13, 0x00, Rsrc1, Rsrc2, Rdest )
 515 #define alpha_mull_(ins,  Rsrc1, lit, Rdest) alpha_encode_op( ins, 0x13, 0x00, Rsrc1, lit, Rdest )
 516 #define alpha_mulq(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_op( ins, 0x13, 0x20, Rsrc1, Rsrc2, Rdest )
 517 #define alpha_mulq_(ins,  Rsrc1, lit, Rdest) alpha_encode_op( ins, 0x13, 0x20, Rsrc1, lit, Rdest )
 518
 519 #define alpha_sextb(ins, Rsrc2, Rdest) alpha_encode_op( ins, 0x1c, 0x00, alpha_zero, Rsrc2, Rdest )
 520 #define alpha_sextw(ins, Rsrc2, Rdest) alpha_encode_op( ins, 0x1c, 0x01, alpha_zero, Rsrc2, Rdest )
 521
 522 // For 264
 523 #define alpha_ftois( ins, RFsrc, Rdest ) alpha_encode_fpop( ins, 0x1c, 0x078, RFsrc, alpha_zero, Rdest )
 524 #define alpha_ftoit( ins, RFsrc, Rdest ) alpha_encode_fpop( ins, 0x1c, 0x070, RFsrc, alpha_zero, Rdest )
 525 #define alpha_ftoi_qf( ins, RFsrc, Rdest ) alpha_encode_fpop( ins, 0x1c, 0x070, RFsrc, alpha_zero, Rdest )
 526 // For 264
 527 #define alpha_itofs( ins, Rsrc, RFdest ) alpha_encode_fpop( ins, 0x14, 0x004, Rsrc, alpha_zero, RFdest )
 528 #define alpha_itoff( ins, Rsrc, RFdest ) alpha_encode_fpop( ins, 0x14, 0x014, Rsrc, alpha_zero, RFdest )
 529 #define alpha_itoft( ins, Rsrc, RFdest ) alpha_encode_fpop( ins, 0x14, 0x024, Rsrc, alpha_zero, RFdest )
 530 #define alpha_itof_qf( ins, Rsrc, RFdest ) alpha_encode_fpop( ins, 0x14, 0x024, Rsrc, alpha_zero, RFdest )
 531
 532 #define alpha_cvtts_c(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x2C, alpha_fzero, Rsrc2, Rdest )
 533 #define alpha_cvttq_c(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x2F, alpha_fzero, Rsrc2, Rdest )
 534 #define alpha_cvtqs_c(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x3C, alpha_fzero, Rsrc2, Rdest )
 535 #define alpha_cvtqt_c(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x3E, alpha_fzero, Rsrc2, Rdest )
 536
 537
 538 #define alpha_adds(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x080, Rsrc1, Rsrc2, Rdest )
 539 #define alpha_subs(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x081, Rsrc1, Rsrc2, Rdest )
 540 #define alpha_addt(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A0, Rsrc1, Rsrc2, Rdest )
 541 #define alpha_subt(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A1, Rsrc1, Rsrc2, Rdest )
 542 #define alpha_mult(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A2, Rsrc1, Rsrc2, Rdest )
 543 #define alpha_divt(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A3, Rsrc1, Rsrc2, Rdest )
 544
 545 #define alpha_cmptun(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A4, Rsrc1, Rsrc2, Rdest )
 546 #define alpha_cmpteq(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A5, Rsrc1, Rsrc2, Rdest )
 547 #define alpha_cmptlt(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A6, Rsrc1, Rsrc2, Rdest )
 548 #define alpha_cmptle(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0A7, Rsrc1, Rsrc2, Rdest )
 549
 550 #define alpha_addt_su(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x5A0, Rsrc1, Rsrc2, Rdest )
 551 #define alpha_subt_su(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x5A1, Rsrc1, Rsrc2, Rdest )
 552
 553
 554 #define alpha_cmptun_su(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x5A4, Rsrc1, Rsrc2, Rdest )
 555 #define alpha_cmpteq_su(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x5A5, Rsrc1, Rsrc2, Rdest )
 556 #define alpha_cmptlt_su(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x5A6, Rsrc1, Rsrc2, Rdest )
 557 #define alpha_cmptle_su(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x5A7, Rsrc1, Rsrc2, Rdest )
 558
 559 #define alpha_cvtts(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0AC, alpha_fzero, Rsrc2, Rdest )
 560 #define alpha_cvttq(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0AF, alpha_fzero, Rsrc2, Rdest )
 561 #define alpha_cvtqs(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0BC, alpha_fzero, Rsrc2, Rdest )
 562 #define alpha_cvtqt(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x0BE, alpha_fzero, Rsrc2, Rdest )
 563
 564 #define alpha_divt_su(ins, Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x5A3, Rsrc1, Rsrc2, Rdest )
 565
 566 #define alpha_cvtts_su(ins, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x16, 0x5AC, alpha_fzero, Rsrc2, Rdest )
 567
 568 #define alpha_cpys(ins,  Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x17, 0x020, Rsrc1, Rsrc2, Rdest )
 569 #define alpha_cpysn(ins,  Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x17, 0x021, Rsrc1, Rsrc2, Rdest )
 570 #define alpha_cpyse(ins,  Rsrc1, Rsrc2, Rdest) alpha_encode_fpop( ins, 0x17, 0x022, Rsrc1, Rsrc2, Rdest )
 571
 572 #define alpha_trapb(ins)        alpha_encode_mem_fc( ins, 0x18, 0x0000, 0, 0, 0 )
 573 #define alpha_mb(ins)           alpha_encode_mem_fc( ins, 0x18, 0x4000, 0, 0, 0 )
 574
 575 #endif
 576