[interp] Fix interp logging (#17636)
[mono-project.git] / mono / mini / tramp-arm.c
blob48da633e9a6344080d0ace7f7ec4a1d88a7651fe
1 /**
2 * \file
3 * JIT trampoline code for ARM
5 * Authors:
6 * Paolo Molaro (lupus@ximian.com)
8 * (C) 2001-2003 Ximian, Inc.
9 * Copyright 2003-2011 Novell Inc
10 * Copyright 2011 Xamarin Inc
11 * Licensed under the MIT license. See LICENSE file in the project root for full license information.
14 #include <config.h>
15 #include <glib.h>
17 #include <mono/metadata/abi-details.h>
18 #include <mono/metadata/appdomain.h>
19 #include <mono/metadata/marshal.h>
20 #include <mono/metadata/tabledefs.h>
21 #include <mono/metadata/profiler-private.h>
22 #include <mono/arch/arm/arm-codegen.h>
23 #include <mono/arch/arm/arm-vfp-codegen.h>
25 #include "mini.h"
26 #include "mini-arm.h"
27 #include "mini-runtime.h"
28 #include "debugger-agent.h"
29 #include "jit-icalls.h"
31 #ifndef DISABLE_INTERPRETER
32 #include "interp/interp.h"
33 #endif
34 #include "mono/utils/mono-tls-inline.h"
36 void
37 mono_arch_patch_callsite (guint8 *method_start, guint8 *code_ptr, guint8 *addr)
39 guint32 *code = (guint32*)code_ptr;
41 /* This is the 'bl' or the 'mov pc' instruction */
42 --code;
45 * Note that methods are called also with the bl opcode.
47 if ((((*code) >> 25) & 7) == 5) {
48 /*g_print ("direct patching\n");*/
49 arm_patch ((guint8*)code, addr);
50 mono_arch_flush_icache ((guint8*)code, 4);
51 return;
54 if ((((*code) >> 20) & 0xFF) == 0x12) {
55 /*g_print ("patching bx\n");*/
56 arm_patch ((guint8*)code, addr);
57 mono_arch_flush_icache ((guint8*)(code - 2), 4);
58 return;
61 g_assert_not_reached ();
64 void
65 mono_arch_patch_plt_entry (guint8 *code, gpointer *got, host_mgreg_t *regs, guint8 *addr)
67 guint8 *jump_entry;
69 /* Patch the jump table entry used by the plt entry */
70 if (*(guint32*)code == 0xe59fc000) {
71 /* ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0); */
72 guint32 offset = ((guint32*)code)[2];
74 jump_entry = code + offset + 12;
75 } else if (*(guint16*)(code - 4) == 0xf8df) {
76 /*
77 * Thumb PLT entry, begins with ldr.w ip, [pc, #8], code points to entry + 4, see
78 * mono_arm_get_thumb_plt_entry ().
80 guint32 offset;
82 code -= 4;
83 offset = *(guint32*)(code + 12);
84 jump_entry = code + offset + 8;
85 } else {
86 g_assert_not_reached ();
89 *(guint8**)jump_entry = addr;
92 #ifndef DISABLE_JIT
94 #define arm_is_imm12(v) ((int)(v) > -4096 && (int)(v) < 4096)
97 * Return the instruction to jump from code to target, 0 if not
98 * reachable with a single instruction
100 static guint32
101 branch_for_target_reachable (guint8 *branch, guint8 *target)
103 gint diff = target - branch - 8;
104 g_assert ((diff & 3) == 0);
105 if (diff >= 0) {
106 if (diff <= 33554431)
107 return (ARMCOND_AL << ARMCOND_SHIFT) | (ARM_BR_TAG) | (diff >> 2);
108 } else {
109 /* diff between 0 and -33554432 */
110 if (diff >= -33554432)
111 return (ARMCOND_AL << ARMCOND_SHIFT) | (ARM_BR_TAG) | ((diff >> 2) & ~0xff000000);
113 return 0;
116 static guint8*
117 emit_bx (guint8* code, int reg)
119 if (mono_arm_thumb_supported ())
120 ARM_BX (code, reg);
121 else
122 ARM_MOV_REG_REG (code, ARMREG_PC, reg);
123 return code;
126 /* Stack size for trampoline function
128 #define STACK ALIGN_TO (MONO_ABI_SIZEOF (MonoLMF), MONO_ARCH_FRAME_ALIGNMENT)
130 /* Method-specific trampoline code fragment size */
131 #define METHOD_TRAMPOLINE_SIZE 64
133 /* Jump-specific trampoline code fragment size */
134 #define JUMP_TRAMPOLINE_SIZE 64
136 guchar*
137 mono_arch_create_generic_trampoline (MonoTrampolineType tramp_type, MonoTrampInfo **info, gboolean aot)
139 const char *tramp_name;
140 guint8 *buf, *code = NULL;
141 guint8 *load_get_lmf_addr = NULL, *load_trampoline = NULL;
142 guint8 *labels [16];
143 gpointer *constants;
144 int i, orig_cfa_offset, cfa_offset, regsave_size, lr_offset;
145 GSList *unwind_ops = NULL;
146 MonoJumpInfo *ji = NULL;
147 int buf_len;
149 /* Now we'll create in 'buf' the ARM trampoline code. This
150 is the trampoline code common to all methods */
152 buf_len = 272;
154 /* Add space for saving/restoring VFP regs. */
155 if (mono_arm_is_hard_float ())
156 buf_len += 8 * 2;
158 code = buf = mono_global_codeman_reserve (buf_len);
161 * At this point lr points to the specific arg and sp points to the saved
162 * regs on the stack (all but PC and SP). The original LR value has been
163 * saved as sp + LR_OFFSET by the push in the specific trampoline
166 /* The size of the area already allocated by the push in the specific trampoline */
167 regsave_size = 14 * sizeof (target_mgreg_t);
168 /* The offset where lr was saved inside the regsave area */
169 lr_offset = 13 * sizeof (target_mgreg_t);
171 // CFA = SP + (num registers pushed) * 4
172 cfa_offset = 14 * sizeof (target_mgreg_t);
173 mono_add_unwind_op_def_cfa (unwind_ops, code, buf, ARMREG_SP, cfa_offset);
174 // PC saved at sp+LR_OFFSET
175 mono_add_unwind_op_offset (unwind_ops, code, buf, ARMREG_LR, -4);
176 /* Callee saved regs */
177 for (i = 0; i < 8; ++i)
178 mono_add_unwind_op_offset (unwind_ops, code, buf, ARMREG_R4 + i, -regsave_size + ((4 + i) * 4));
180 if (aot) {
182 * For page trampolines the data is in r1, so just move it, otherwise use the got slot as below.
183 * The trampoline contains a pc-relative offset to the got slot
184 * preceeding the got slot where the value is stored. The offset can be
185 * found at [lr + 0].
187 /* See if emit_trampolines () in aot-compiler.c for the '2' */
188 if (aot == 2) {
189 ARM_MOV_REG_REG (code, ARMREG_V2, ARMREG_R1);
190 } else {
191 ARM_LDR_IMM (code, ARMREG_V2, ARMREG_LR, 0);
192 ARM_ADD_REG_IMM (code, ARMREG_V2, ARMREG_V2, 4, 0);
193 ARM_LDR_REG_REG (code, ARMREG_V2, ARMREG_V2, ARMREG_LR);
195 } else {
196 ARM_LDR_IMM (code, ARMREG_V2, ARMREG_LR, 0);
198 ARM_LDR_IMM (code, ARMREG_V3, ARMREG_SP, lr_offset);
200 /* we build the MonoLMF structure on the stack - see mini-arm.h
201 * The pointer to the struct is put in r1.
202 * the iregs array is already allocated on the stack by push.
204 code = mono_arm_emit_load_imm (code, ARMREG_R2, STACK - regsave_size);
205 ARM_SUB_REG_REG (code, ARMREG_SP, ARMREG_SP, ARMREG_R2);
206 cfa_offset += STACK - regsave_size;
207 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
208 /* V1 == lmf */
209 code = mono_arm_emit_load_imm (code, ARMREG_R2, STACK - MONO_ABI_SIZEOF (MonoLMF));
210 ARM_ADD_REG_REG (code, ARMREG_V1, ARMREG_SP, ARMREG_R2);
212 /* ok, now we can continue with the MonoLMF setup, mostly untouched
213 * from emit_prolog in mini-arm.c
214 * This is a synthetized call to mono_get_lmf_addr ()
216 if (aot) {
217 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, GUINT_TO_POINTER (MONO_JIT_ICALL_mono_get_lmf_addr));
218 ARM_LDR_IMM (code, ARMREG_R0, ARMREG_PC, 0);
219 ARM_B (code, 0);
220 *(gpointer*)code = NULL;
221 code += 4;
222 ARM_LDR_REG_REG (code, ARMREG_R0, ARMREG_PC, ARMREG_R0);
223 } else {
224 load_get_lmf_addr = code;
225 code += 4;
227 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
228 code = emit_bx (code, ARMREG_R0);
231 * The stack now looks like:
232 * <saved regs>
233 * v1 -> <rest of LMF>
234 * sp -> <alignment>
237 /* r0 is the result from mono_get_lmf_addr () */
238 ARM_STR_IMM (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, lmf_addr));
239 /* new_lmf->previous_lmf = *lmf_addr */
240 ARM_LDR_IMM (code, ARMREG_R2, ARMREG_R0, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
241 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
242 /* *(lmf_addr) = r1 */
243 ARM_STR_IMM (code, ARMREG_V1, ARMREG_R0, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
244 /* save method info (it's in v2) */
245 if ((tramp_type == MONO_TRAMPOLINE_JIT) || (tramp_type == MONO_TRAMPOLINE_JUMP))
246 ARM_STR_IMM (code, ARMREG_V2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, method));
247 else {
248 ARM_MOV_REG_IMM8 (code, ARMREG_R2, 0);
249 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, method));
251 /* save caller SP */
252 code = mono_arm_emit_load_imm (code, ARMREG_R2, cfa_offset);
253 ARM_ADD_REG_REG (code, ARMREG_R2, ARMREG_SP, ARMREG_R2);
254 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, sp));
255 /* save caller FP */
256 ARM_LDR_IMM (code, ARMREG_R2, ARMREG_V1, (MONO_STRUCT_OFFSET (MonoLMF, iregs) + ARMREG_FP*4));
257 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, fp));
258 /* save the IP (caller ip) */
259 if (tramp_type == MONO_TRAMPOLINE_JUMP) {
260 ARM_MOV_REG_IMM8 (code, ARMREG_R2, 0);
261 } else {
262 ARM_LDR_IMM (code, ARMREG_R2, ARMREG_V1, (MONO_STRUCT_OFFSET (MonoLMF, iregs) + 13*4));
264 ARM_STR_IMM (code, ARMREG_R2, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, ip));
266 /* Save VFP registers. */
267 if (mono_arm_is_hard_float ()) {
269 * Strictly speaking, we don't have to save d0-d7 in the LMF, but
270 * it's easier than attempting to store them on the stack since
271 * this trampoline code is pretty messy.
273 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, fregs));
274 ARM_FSTMD (code, ARM_VFP_D0, 8, ARMREG_R0);
278 * Now we're ready to call xxx_trampoline ().
280 /* Arg 1: the saved registers */
281 ARM_ADD_REG_IMM (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, iregs), 0);
283 /* Arg 2: code (next address to the instruction that called us) */
284 if (tramp_type == MONO_TRAMPOLINE_JUMP) {
285 ARM_MOV_REG_IMM8 (code, ARMREG_R1, 0);
286 } else {
287 ARM_MOV_REG_REG (code, ARMREG_R1, ARMREG_V3);
290 /* Arg 3: the specific argument, stored in v2
292 ARM_MOV_REG_REG (code, ARMREG_R2, ARMREG_V2);
294 if (aot) {
295 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, GINT_TO_POINTER (mono_trampoline_type_to_jit_icall_id (tramp_type)));
296 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
297 ARM_B (code, 0);
298 *(gpointer*)code = NULL;
299 code += 4;
300 ARM_LDR_REG_REG (code, ARMREG_IP, ARMREG_PC, ARMREG_IP);
301 } else {
302 load_trampoline = code;
303 code += 4;
306 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
307 code = emit_bx (code, ARMREG_IP);
309 /* OK, code address is now on r0. Move it to the place on the stack
310 * where IP was saved (it is now no more useful to us and it can be
311 * clobbered). This way we can just restore all the regs in one inst
312 * and branch to IP.
314 ARM_STR_IMM (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, iregs) + (ARMREG_R12 * sizeof (target_mgreg_t)));
317 * Now we restore the MonoLMF (see emit_epilogue in mini-arm.c)
318 * and the rest of the registers, so the method called will see
319 * the same state as before we executed.
321 /* ip = previous_lmf */
322 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
323 /* lr = lmf_addr */
324 ARM_LDR_IMM (code, ARMREG_LR, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, lmf_addr));
325 /* *(lmf_addr) = previous_lmf */
326 ARM_STR_IMM (code, ARMREG_IP, ARMREG_LR, MONO_STRUCT_OFFSET (MonoLMF, previous_lmf));
328 /* Check for thread interruption */
329 /* This is not perf critical code so no need to check the interrupt flag */
330 if (aot) {
331 code = mono_arm_emit_aotconst (&ji, code, buf, ARMREG_IP, MONO_PATCH_INFO_JIT_ICALL_ADDR, GUINT_TO_POINTER (MONO_JIT_ICALL_mono_thread_force_interruption_checkpoint_noraise));
332 } else {
333 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
334 ARM_B (code, 0);
335 *(gpointer*)code = (gpointer)mono_thread_force_interruption_checkpoint_noraise;
336 code += 4;
338 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
339 code = emit_bx (code, ARMREG_IP);
341 /* Check whenever an exception needs to be thrown */
342 ARM_CMP_REG_IMM (code, ARMREG_R0, 0, 0);
343 labels [0] = code;
344 ARM_B_COND (code, ARMCOND_NE, 0);
346 orig_cfa_offset = cfa_offset;
348 /* Normal case */
350 /* Restore VFP registers. */
351 if (mono_arm_is_hard_float ()) {
352 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, fregs));
353 ARM_FLDMD (code, ARM_VFP_D0, 8, ARMREG_R0);
356 /* Non-standard function epilogue. Instead of doing a proper
357 * return, we just jump to the compiled code.
359 /* Restore the registers and jump to the code:
360 * Note that IP has been conveniently set to the method addr.
362 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, STACK - regsave_size);
363 cfa_offset -= STACK - regsave_size;
364 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
365 ARM_POP_NWB (code, 0x5fff);
366 mono_add_unwind_op_same_value (unwind_ops, code, buf, ARMREG_LR);
367 if (tramp_type == MONO_TRAMPOLINE_RGCTX_LAZY_FETCH)
368 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_IP);
369 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, regsave_size);
370 cfa_offset -= regsave_size;
371 g_assert (cfa_offset == 0);
372 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
373 if (MONO_TRAMPOLINE_TYPE_MUST_RETURN (tramp_type))
374 code = emit_bx (code, ARMREG_LR);
375 else
376 code = emit_bx (code, ARMREG_IP);
378 if (!aot) {
379 constants = (gpointer*)code;
380 constants [0] = (gpointer)mono_get_lmf_addr;
381 constants [1] = (gpointer)mono_get_trampoline_func (tramp_type);
383 /* backpatch by emitting the missing instructions skipped above */
384 ARM_LDR_IMM (load_get_lmf_addr, ARMREG_R0, ARMREG_PC, (code - load_get_lmf_addr - 8));
385 ARM_LDR_IMM (load_trampoline, ARMREG_IP, ARMREG_PC, (code + 4 - load_trampoline - 8));
386 code += 8;
389 /* Exception case */
390 arm_patch (labels [0], code);
392 cfa_offset = orig_cfa_offset;
395 * We have an exception we want to throw in the caller's frame, so pop
396 * the trampoline frame and throw from the caller.
398 /* Store the exception in place of IP */
399 ARM_STR_IMM (code, ARMREG_R0, ARMREG_V1, MONO_STRUCT_OFFSET (MonoLMF, iregs) + (ARMREG_R12 * sizeof (target_mgreg_t)));
401 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, STACK - regsave_size);
402 cfa_offset -= STACK - regsave_size;
403 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
404 /* Restore all regs */
405 ARM_POP_NWB (code, 0x5fff);
406 mono_add_unwind_op_same_value (unwind_ops, code, buf, ARMREG_LR);
407 ARM_ADD_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, regsave_size);
408 cfa_offset -= regsave_size;
409 g_assert (cfa_offset == 0);
410 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, buf, cfa_offset);
411 /* We are in the parent frame, the exception is in ip */
412 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_IP);
414 * EH is initialized after trampolines, so get the address of the variable
415 * which contains throw_exception, and load it from there.
417 if (aot) {
418 /* Not really a jit icall */
419 code = mono_arm_emit_aotconst (&ji, code, buf, ARMREG_IP, MONO_PATCH_INFO_JIT_ICALL_ADDR, GUINT_TO_POINTER (MONO_JIT_ICALL_mono_rethrow_preserve_exception));
420 } else {
421 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
422 ARM_B (code, 0);
423 *(gpointer*)code = mono_get_rethrow_preserve_exception_addr ();
424 code += 4;
426 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_IP, 0);
427 /* Branch to the throw trampoline */
428 /* lr contains the return address, the trampoline will use it as the throw site */
429 code = emit_bx (code, ARMREG_IP);
431 /* Flush instruction cache, since we've generated code */
432 mono_arch_flush_icache (buf, code - buf);
433 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_HELPER, NULL));
435 /* Sanity check */
436 g_assert ((code - buf) <= buf_len);
438 g_assert (info);
439 tramp_name = mono_get_generic_trampoline_name (tramp_type);
440 *info = mono_tramp_info_create (tramp_name, buf, code - buf, ji, unwind_ops);
442 return buf;
445 #define SPEC_TRAMP_SIZE 24
447 gpointer
448 mono_arch_create_specific_trampoline (gpointer arg1, MonoTrampolineType tramp_type, MonoDomain *domain, guint32 *code_len)
450 guint8 *code, *buf, *tramp;
451 guint32 *constants;
452 guint32 short_branch = FALSE;
453 guint32 size = SPEC_TRAMP_SIZE;
455 tramp = mono_get_trampoline_code (tramp_type);
457 if (domain) {
458 mono_domain_lock (domain);
459 code = buf = mono_domain_code_reserve_align (domain, size, 4);
460 if ((short_branch = branch_for_target_reachable (code + 4, tramp))) {
461 size = 12;
462 mono_domain_code_commit (domain, code, SPEC_TRAMP_SIZE, size);
464 mono_domain_unlock (domain);
465 } else {
466 code = buf = mono_global_codeman_reserve (size);
467 short_branch = FALSE;
470 /* we could reduce this to 12 bytes if tramp is within reach:
471 * ARM_PUSH ()
472 * ARM_BL ()
473 * method-literal
474 * The called code can access method using the lr register
475 * A 20 byte sequence could be:
476 * ARM_PUSH ()
477 * ARM_MOV_REG_REG (lr, pc)
478 * ARM_LDR_IMM (pc, pc, 0)
479 * method-literal
480 * tramp-literal
482 /* We save all the registers, except PC and SP */
483 ARM_PUSH (code, 0x5fff);
484 if (short_branch) {
485 constants = (guint32*)code;
486 constants [0] = short_branch | (1 << 24);
487 constants [1] = GPOINTER_TO_UINT (arg1);
488 code += 8;
489 } else {
490 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_PC, 8); /* temp reg */
491 ARM_MOV_REG_REG (code, ARMREG_LR, ARMREG_PC);
492 code = emit_bx (code, ARMREG_R1);
494 constants = (guint32*)code;
495 constants [0] = GPOINTER_TO_UINT (arg1);
496 constants [1] = GPOINTER_TO_UINT (tramp);
497 code += 8;
500 /* Flush instruction cache, since we've generated code */
501 mono_arch_flush_icache (buf, code - buf);
502 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_SPECIFIC_TRAMPOLINE, mono_get_generic_trampoline_simple_name (tramp_type)));
504 g_assert ((code - buf) <= size);
506 if (code_len)
507 *code_len = code - buf;
509 return buf;
513 * mono_arch_get_unbox_trampoline:
514 * @m: method pointer
515 * @addr: pointer to native code for @m
517 * when value type methods are called through the vtable we need to unbox the
518 * this argument. This method returns a pointer to a trampoline which does
519 * unboxing before calling the method
521 gpointer
522 mono_arch_get_unbox_trampoline (MonoMethod *m, gpointer addr)
524 guint8 *code, *start;
525 MonoDomain *domain = mono_domain_get ();
526 GSList *unwind_ops;
527 guint32 size = 16;
529 start = code = mono_domain_code_reserve (domain, size);
531 unwind_ops = mono_arch_get_cie_program ();
533 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 4);
534 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_R0, MONO_ABI_SIZEOF (MonoObject));
535 code = emit_bx (code, ARMREG_IP);
536 *(guint32*)code = (guint32)(gsize)addr;
537 code += 4;
538 mono_arch_flush_icache (start, code - start);
539 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_UNBOX_TRAMPOLINE, m));
540 g_assert ((code - start) <= size);
541 /*g_print ("unbox trampoline at %d for %s:%s\n", this_pos, m->klass->name, m->name);
542 g_print ("unbox code is at %p for method at %p\n", start, addr);*/
544 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
546 return start;
549 gpointer
550 mono_arch_get_static_rgctx_trampoline (gpointer arg, gpointer addr)
552 guint8 *code, *start;
553 GSList *unwind_ops;
554 int buf_len = 16;
555 MonoDomain *domain = mono_domain_get ();
557 start = code = mono_domain_code_reserve (domain, buf_len);
559 unwind_ops = mono_arch_get_cie_program ();
561 ARM_LDR_IMM (code, MONO_ARCH_RGCTX_REG, ARMREG_PC, 0);
562 ARM_LDR_IMM (code, ARMREG_PC, ARMREG_PC, 0);
563 *(guint32*)code = (guint32)(gsize)arg;
564 code += 4;
565 *(guint32*)code = (guint32)(gsize)addr;
566 code += 4;
568 g_assert ((code - start) <= buf_len);
570 mono_arch_flush_icache (start, code - start);
571 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
573 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
575 return start;
578 /* Same as static rgctx trampoline, but clobbering ARMREG_IP, which is scratch */
579 gpointer
580 mono_arch_get_ftnptr_arg_trampoline (gpointer arg, gpointer addr)
582 guint8 *code, *start;
583 GSList *unwind_ops;
584 int buf_len = 16;
585 MonoDomain *domain = mono_domain_get ();
587 start = code = mono_domain_code_reserve (domain, buf_len);
589 unwind_ops = mono_arch_get_cie_program ();
591 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
592 ARM_LDR_IMM (code, ARMREG_PC, ARMREG_PC, 0);
593 *(guint32*)code = (guint32)(gsize)arg;
594 code += 4;
595 *(guint32*)code = (guint32)(gsize)addr;
596 code += 4;
598 g_assert ((code - start) <= buf_len);
600 mono_arch_flush_icache (start, code - start);
601 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
603 mono_tramp_info_register (mono_tramp_info_create (NULL, start, code - start, NULL, unwind_ops), domain);
605 return start;
608 gpointer
609 mono_arch_create_rgctx_lazy_fetch_trampoline (guint32 slot, MonoTrampInfo **info, gboolean aot)
611 guint8 *tramp;
612 guint8 *code, *buf;
613 int tramp_size;
614 guint32 code_len;
615 guint8 **rgctx_null_jumps;
616 int depth, index;
617 int i, njumps;
618 gboolean mrgctx;
619 MonoJumpInfo *ji = NULL;
620 GSList *unwind_ops = NULL;
622 mrgctx = MONO_RGCTX_SLOT_IS_MRGCTX (slot);
623 index = MONO_RGCTX_SLOT_INDEX (slot);
624 if (mrgctx)
625 index += MONO_SIZEOF_METHOD_RUNTIME_GENERIC_CONTEXT / TARGET_SIZEOF_VOID_P;
626 for (depth = 0; ; ++depth) {
627 int size = mono_class_rgctx_get_array_size (depth, mrgctx);
629 if (index < size - 1)
630 break;
631 index -= size - 1;
634 tramp_size = 64 + 16 * depth;
636 code = buf = mono_global_codeman_reserve (tramp_size);
638 unwind_ops = mono_arch_get_cie_program ();
640 rgctx_null_jumps = g_malloc (sizeof (guint8*) * (depth + 2));
641 njumps = 0;
643 /* The vtable/mrgctx is in R0 */
644 g_assert (MONO_ARCH_VTABLE_REG == ARMREG_R0);
646 if (mrgctx) {
647 /* get mrgctx ptr */
648 ARM_MOV_REG_REG (code, ARMREG_R1, ARMREG_R0);
649 } else {
650 /* load rgctx ptr from vtable */
651 g_assert (arm_is_imm12 (MONO_STRUCT_OFFSET (MonoVTable, runtime_generic_context)));
652 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_R0, MONO_STRUCT_OFFSET (MonoVTable, runtime_generic_context));
653 /* is the rgctx ptr null? */
654 ARM_CMP_REG_IMM (code, ARMREG_R1, 0, 0);
655 /* if yes, jump to actual trampoline */
656 rgctx_null_jumps [njumps ++] = code;
657 ARM_B_COND (code, ARMCOND_EQ, 0);
660 for (i = 0; i < depth; ++i) {
661 /* load ptr to next array */
662 if (mrgctx && i == 0) {
663 g_assert (arm_is_imm12 (MONO_SIZEOF_METHOD_RUNTIME_GENERIC_CONTEXT));
664 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_R1, MONO_SIZEOF_METHOD_RUNTIME_GENERIC_CONTEXT);
665 } else {
666 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_R1, 0);
668 /* is the ptr null? */
669 ARM_CMP_REG_IMM (code, ARMREG_R1, 0, 0);
670 /* if yes, jump to actual trampoline */
671 rgctx_null_jumps [njumps ++] = code;
672 ARM_B_COND (code, ARMCOND_EQ, 0);
675 /* fetch slot */
676 code = mono_arm_emit_load_imm (code, ARMREG_R2, TARGET_SIZEOF_VOID_P * (index + 1));
677 ARM_LDR_REG_REG (code, ARMREG_R1, ARMREG_R1, ARMREG_R2);
678 /* is the slot null? */
679 ARM_CMP_REG_IMM (code, ARMREG_R1, 0, 0);
680 /* if yes, jump to actual trampoline */
681 rgctx_null_jumps [njumps ++] = code;
682 ARM_B_COND (code, ARMCOND_EQ, 0);
683 /* otherwise return, result is in R1 */
684 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_R1);
685 code = emit_bx (code, ARMREG_LR);
687 g_assert (njumps <= depth + 2);
688 for (i = 0; i < njumps; ++i)
689 arm_patch (rgctx_null_jumps [i], code);
691 g_free (rgctx_null_jumps);
693 /* Slowpath */
695 /* The vtable/mrgctx is still in R0 */
697 if (aot) {
698 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_SPECIFIC_TRAMPOLINE_LAZY_FETCH_ADDR, GUINT_TO_POINTER (slot));
699 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_PC, 0);
700 ARM_B (code, 0);
701 *(gpointer*)code = NULL;
702 code += 4;
703 ARM_LDR_REG_REG (code, ARMREG_PC, ARMREG_PC, ARMREG_R1);
704 } else {
705 tramp = (guint8*)mono_arch_create_specific_trampoline (GUINT_TO_POINTER (slot), MONO_TRAMPOLINE_RGCTX_LAZY_FETCH, mono_get_root_domain (), &code_len);
707 /* Jump to the actual trampoline */
708 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_PC, 0); /* temp reg */
709 code = emit_bx (code, ARMREG_R1);
710 *(gpointer*)code = tramp;
711 code += 4;
714 mono_arch_flush_icache (buf, code - buf);
715 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
717 g_assert (code - buf <= tramp_size);
719 char *name = mono_get_rgctx_fetch_trampoline_name (slot);
720 *info = mono_tramp_info_create (name, buf, code - buf, ji, unwind_ops);
721 g_free (name);
723 return buf;
726 gpointer
727 mono_arch_create_general_rgctx_lazy_fetch_trampoline (MonoTrampInfo **info, gboolean aot)
729 guint8 *code, *buf;
730 int tramp_size;
731 MonoJumpInfo *ji = NULL;
732 GSList *unwind_ops = NULL;
734 g_assert (aot);
736 tramp_size = 32;
738 code = buf = mono_global_codeman_reserve (tramp_size);
740 unwind_ops = mono_arch_get_cie_program ();
742 // FIXME: Currently, we always go to the slow path.
743 /* Load trampoline addr */
744 ARM_LDR_IMM (code, ARMREG_R1, MONO_ARCH_RGCTX_REG, 4);
745 /* The vtable/mrgctx is in R0 */
746 g_assert (MONO_ARCH_VTABLE_REG == ARMREG_R0);
747 code = emit_bx (code, ARMREG_R1);
749 mono_arch_flush_icache (buf, code - buf);
750 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
752 g_assert (code - buf <= tramp_size);
754 *info = mono_tramp_info_create ("rgctx_fetch_trampoline_general", buf, code - buf, ji, unwind_ops);
756 return buf;
759 guint8*
760 mono_arch_create_sdb_trampoline (gboolean single_step, MonoTrampInfo **info, gboolean aot)
762 guint8 *buf, *code;
763 GSList *unwind_ops = NULL;
764 MonoJumpInfo *ji = NULL;
765 int frame_size;
767 buf = code = mono_global_codeman_reserve (96);
770 * Construct the MonoContext structure on the stack.
773 frame_size = MONO_ABI_SIZEOF (MonoContext);
774 frame_size = ALIGN_TO (frame_size, MONO_ARCH_FRAME_ALIGNMENT);
775 ARM_SUB_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, frame_size);
777 /* save ip, lr and pc into their correspodings ctx.regs slots. */
778 ARM_STR_IMM (code, ARMREG_IP, ARMREG_SP, MONO_STRUCT_OFFSET (MonoContext, regs) + sizeof (target_mgreg_t) * ARMREG_IP);
779 ARM_STR_IMM (code, ARMREG_LR, ARMREG_SP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_LR);
780 ARM_STR_IMM (code, ARMREG_LR, ARMREG_SP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_PC);
782 /* save r0..r10 and fp */
783 ARM_ADD_REG_IMM8 (code, ARMREG_IP, ARMREG_SP, MONO_STRUCT_OFFSET (MonoContext, regs));
784 ARM_STM (code, ARMREG_IP, 0x0fff);
786 /* now we can update fp. */
787 ARM_MOV_REG_REG (code, ARMREG_FP, ARMREG_SP);
789 /* make ctx.esp hold the actual value of sp at the beginning of this method. */
790 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_FP, frame_size);
791 ARM_STR_IMM (code, ARMREG_R0, ARMREG_IP, 4 * ARMREG_SP);
792 ARM_STR_IMM (code, ARMREG_R0, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_SP);
794 /* make ctx.eip hold the address of the call. */
795 //ARM_SUB_REG_IMM8 (code, ARMREG_LR, ARMREG_LR, 4);
796 ARM_STR_IMM (code, ARMREG_LR, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, pc));
798 /* r0 now points to the MonoContext */
799 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_FP);
801 /* call */
802 if (aot) {
803 if (single_step)
804 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, GUINT_TO_POINTER (MONO_JIT_ICALL_mono_debugger_agent_single_step_from_context));
805 else
806 ji = mono_patch_info_list_prepend (ji, code - buf, MONO_PATCH_INFO_JIT_ICALL_ADDR, GUINT_TO_POINTER (MONO_JIT_ICALL_mono_debugger_agent_breakpoint_from_context));
807 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
808 ARM_B (code, 0);
809 *(gpointer*)code = NULL;
810 code += 4;
811 ARM_LDR_REG_REG (code, ARMREG_IP, ARMREG_PC, ARMREG_IP);
812 ARM_BLX_REG (code, ARMREG_IP);
813 } else {
814 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 0);
815 ARM_B (code, 0);
816 if (single_step)
817 *(gpointer*)code = (gpointer)mini_get_dbg_callbacks ()->single_step_from_context;
818 else
819 *(gpointer*)code = (gpointer)mini_get_dbg_callbacks ()->breakpoint_from_context;
820 code += 4;
821 ARM_BLX_REG (code, ARMREG_IP);
824 /* we're back; save ctx.eip and ctx.esp into the corresponding regs slots. */
825 ARM_LDR_IMM (code, ARMREG_R0, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, pc));
826 ARM_STR_IMM (code, ARMREG_R0, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_LR);
827 ARM_STR_IMM (code, ARMREG_R0, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, regs) + 4 * ARMREG_PC);
829 /* make ip point to the regs array, then restore everything, including pc. */
830 ARM_ADD_REG_IMM8 (code, ARMREG_IP, ARMREG_FP, MONO_STRUCT_OFFSET (MonoContext, regs));
831 ARM_LDM (code, ARMREG_IP, 0xffff);
833 mono_arch_flush_icache (buf, code - buf);
834 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_HELPER, NULL));
836 const char *tramp_name = single_step ? "sdb_single_step_trampoline" : "sdb_breakpoint_trampoline";
837 *info = mono_tramp_info_create (tramp_name, buf, code - buf, ji, unwind_ops);
839 return buf;
843 * mono_arch_get_interp_to_native_trampoline:
845 * See tramp-amd64.c for documentation.
847 gpointer
848 mono_arch_get_interp_to_native_trampoline (MonoTrampInfo **info)
850 #ifndef DISABLE_INTERPRETER
851 guint8 *start = NULL, *code;
852 guint8 *label_start_copy, *label_exit_copy;
853 MonoJumpInfo *ji = NULL;
854 GSList *unwind_ops = NULL;
855 int buf_len, i, off_methodargs, off_targetaddr;
856 const int fp_reg = ARMREG_R7;
857 int framesize;
859 buf_len = 512 + 1024;
860 start = code = (guint8 *) mono_global_codeman_reserve (buf_len);
863 * iOS ABI
865 * FIXME We save rgctx reg here so we don't regress tests. It should
866 * not be clobbered by native->interp transition.
868 ARM_PUSH (code, (1 << MONO_ARCH_RGCTX_REG) | (1 << fp_reg) | (1 << ARMREG_LR));
869 ARM_MOV_REG_REG (code, fp_reg, ARMREG_SP);
871 /* allocate space for saving the target addr and the call context and align stack */
872 framesize = sizeof (target_mgreg_t) + ALIGN_TO (2 * sizeof (target_mgreg_t), MONO_ARCH_FRAME_ALIGNMENT);
873 ARM_SUB_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, framesize);
875 /* save CallContext* onto stack */
876 off_methodargs = -4;
877 ARM_STR_IMM (code, ARMREG_R1, fp_reg, off_methodargs);
879 /* save target address onto stack */
880 off_targetaddr = -8;
881 ARM_STR_IMM (code, ARMREG_R0, fp_reg, off_targetaddr);
883 /* allocate the stack space necessary for the call */
884 ARM_LDR_IMM (code, ARMREG_R3, ARMREG_R1, MONO_STRUCT_OFFSET (CallContext, stack_size));
885 ARM_SUB_REG_REG (code, ARMREG_SP, ARMREG_SP, ARMREG_R3);
887 /* copy stack from the CallContext, R0 = dest, R1 = source */
888 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_SP);
889 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_R1, MONO_STRUCT_OFFSET (CallContext, stack));
891 label_start_copy = code;
893 ARM_CMP_REG_IMM (code, ARMREG_R3, 0, 0);
894 label_exit_copy = code;
895 ARM_B_COND (code, ARMCOND_EQ, 0);
896 ARM_LDR_IMM (code, ARMREG_R2, ARMREG_R1, 0);
897 ARM_STR_IMM (code, ARMREG_R2, ARMREG_R0, 0);
898 ARM_ADD_REG_IMM8 (code, ARMREG_R0, ARMREG_R0, sizeof (target_mgreg_t));
899 ARM_ADD_REG_IMM8 (code, ARMREG_R1, ARMREG_R1, sizeof (target_mgreg_t));
900 ARM_SUB_REG_IMM8 (code, ARMREG_R3, ARMREG_R3, sizeof (target_mgreg_t));
901 ARM_B (code, 0);
902 arm_patch (code - 4, label_start_copy);
903 arm_patch (label_exit_copy, code);
905 ARM_LDR_IMM (code, ARMREG_IP, fp_reg, off_methodargs);
906 /* set all general purpose registers from CallContext */
907 for (i = 0; i < PARAM_REGS; i++)
908 ARM_LDR_IMM (code, i, ARMREG_IP, MONO_STRUCT_OFFSET (CallContext, gregs) + i * sizeof (target_mgreg_t));
910 /* set all floating registers from CallContext */
911 for (i = 0; i < FP_PARAM_REGS; i++)
912 ARM_FLDD (code, i * 2, ARMREG_IP, MONO_STRUCT_OFFSET (CallContext, fregs) + i * sizeof (double));
914 /* load target addr */
915 ARM_LDR_IMM (code, ARMREG_IP, fp_reg, off_targetaddr);
917 /* call into native function */
918 ARM_BLX_REG (code, ARMREG_IP);
920 /* load CallContext*/
921 ARM_LDR_IMM (code, ARMREG_IP, fp_reg, off_methodargs);
923 /* set all general purpose registers to CallContext */
924 for (i = 0; i < PARAM_REGS; i++)
925 ARM_STR_IMM (code, i, ARMREG_IP, MONO_STRUCT_OFFSET (CallContext, gregs) + i * sizeof (target_mgreg_t));
927 /* set all floating registers to CallContext */
928 for (i = 0; i < FP_PARAM_REGS; i++)
929 ARM_FSTD (code, i * 2, ARMREG_IP, MONO_STRUCT_OFFSET (CallContext, fregs) + i * sizeof (double));
931 ARM_MOV_REG_REG (code, ARMREG_SP, fp_reg);
932 ARM_POP (code, (1 << MONO_ARCH_RGCTX_REG) | (1 << fp_reg) | (1 << ARMREG_PC));
934 g_assert (code - start < buf_len);
936 mono_arch_flush_icache (start, code - start);
937 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_HELPER, NULL));
939 if (info)
940 *info = mono_tramp_info_create ("interp_to_native_trampoline", start, code - start, ji, unwind_ops);
942 return start;
943 #else
944 g_assert_not_reached ();
945 return NULL;
946 #endif /* DISABLE_INTERPRETER */
949 gpointer
950 mono_arch_get_native_to_interp_trampoline (MonoTrampInfo **info)
952 #ifndef DISABLE_INTERPRETER
953 guint8 *start = NULL, *code;
954 MonoJumpInfo *ji = NULL;
955 GSList *unwind_ops = NULL;
956 int buf_len, i;
957 const int fp_reg = ARMREG_R7;
958 int framesize;
960 buf_len = 512;
961 start = code = (guint8 *) mono_global_codeman_reserve (buf_len);
963 unwind_ops = mono_arch_get_cie_program ();
965 /* iOS ABI */
966 ARM_PUSH (code, (1 << fp_reg) | (1 << ARMREG_LR));
967 mono_add_unwind_op_def_cfa_offset (unwind_ops, code, start, 2 * sizeof (target_mgreg_t));
968 mono_add_unwind_op_offset (unwind_ops, code, start, ARMREG_LR, -4);
969 mono_add_unwind_op_offset (unwind_ops, code, start, fp_reg, -8);
971 ARM_MOV_REG_REG (code, fp_reg, ARMREG_SP);
972 mono_add_unwind_op_def_cfa_reg (unwind_ops, code, start, fp_reg);
974 /* allocate the CallContext on the stack */
975 framesize = ALIGN_TO (MONO_ABI_SIZEOF (CallContext), MONO_ARCH_FRAME_ALIGNMENT);
976 ARM_SUB_REG_IMM8 (code, ARMREG_SP, ARMREG_SP, framesize);
978 /* save all general purpose registers into the CallContext */
979 for (i = 0; i < PARAM_REGS; i++)
980 ARM_STR_IMM (code, i, ARMREG_SP, MONO_STRUCT_OFFSET (CallContext, gregs) + i * sizeof (target_mgreg_t));
982 /* save all floating registers into the CallContext */
983 for (i = 0; i < FP_PARAM_REGS; i++)
984 ARM_FSTD (code, i * 2, ARMREG_SP, MONO_STRUCT_OFFSET (CallContext, fregs) + i * sizeof (double));
986 /* set the stack pointer to the value at call site */
987 ARM_ADD_REG_IMM8 (code, ARMREG_R0, fp_reg, 2 * sizeof (target_mgreg_t));
988 ARM_STR_IMM (code, ARMREG_R0, ARMREG_SP, MONO_STRUCT_OFFSET (CallContext, stack));
990 /* call interp_entry with the ccontext and rmethod as arguments */
991 ARM_MOV_REG_REG (code, ARMREG_R0, ARMREG_SP);
992 ARM_LDR_IMM (code, ARMREG_R1, ARMREG_IP, MONO_STRUCT_OFFSET (MonoFtnDesc, arg));
993 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_IP, MONO_STRUCT_OFFSET (MonoFtnDesc, addr));
994 ARM_BLX_REG (code, ARMREG_IP);
996 /* load the return values from the context */
997 for (i = 0; i < PARAM_REGS; i++)
998 ARM_LDR_IMM (code, i, ARMREG_SP, MONO_STRUCT_OFFSET (CallContext, gregs) + i * sizeof (target_mgreg_t));
1000 for (i = 0; i < FP_PARAM_REGS; i++)
1001 ARM_FLDD (code, i * 2, ARMREG_SP, MONO_STRUCT_OFFSET (CallContext, fregs) + i * sizeof (double));
1003 /* reset stack and return */
1004 ARM_MOV_REG_REG (code, ARMREG_SP, fp_reg);
1005 ARM_POP (code, (1 << fp_reg) | (1 << ARMREG_PC));
1007 g_assert (code - start < buf_len);
1009 mono_arch_flush_icache (start, code - start);
1010 MONO_PROFILER_RAISE (jit_code_buffer, (start, code - start, MONO_PROFILER_CODE_BUFFER_EXCEPTION_HANDLING, NULL));
1012 if (info)
1013 *info = mono_tramp_info_create ("native_to_interp_trampoline", start, code - start, ji, unwind_ops);
1015 return start;
1016 #else
1017 g_assert_not_reached ();
1018 return NULL;
1019 #endif /* DISABLE_INTERPRETER */
1022 #else
1024 guchar*
1025 mono_arch_create_generic_trampoline (MonoTrampolineType tramp_type, MonoTrampInfo **info, gboolean aot)
1027 g_assert_not_reached ();
1028 return NULL;
1031 gpointer
1032 mono_arch_create_specific_trampoline (gpointer arg1, MonoTrampolineType tramp_type, MonoDomain *domain, guint32 *code_len)
1034 g_assert_not_reached ();
1035 return NULL;
1038 gpointer
1039 mono_arch_get_unbox_trampoline (MonoMethod *m, gpointer addr)
1041 g_assert_not_reached ();
1042 return NULL;
1045 gpointer
1046 mono_arch_get_static_rgctx_trampoline (gpointer arg, gpointer addr)
1048 g_assert_not_reached ();
1049 return NULL;
1052 gpointer
1053 mono_arch_get_ftnptr_arg_trampoline (gpointer arg, gpointer addr)
1055 g_assert_not_reached ();
1056 return NULL;
1059 gpointer
1060 mono_arch_create_rgctx_lazy_fetch_trampoline (guint32 slot, MonoTrampInfo **info, gboolean aot)
1062 g_assert_not_reached ();
1063 return NULL;
1066 guint8*
1067 mono_arch_create_sdb_trampoline (gboolean single_step, MonoTrampInfo **info, gboolean aot)
1069 g_assert_not_reached ();
1070 return NULL;
1073 gpointer
1074 mono_arch_get_interp_to_native_trampoline (MonoTrampInfo **info)
1076 g_assert_not_reached ();
1077 return NULL;
1080 gpointer
1081 mono_arch_get_native_to_interp_trampoline (MonoTrampInfo **info)
1083 g_assert_not_reached ();
1084 return NULL;
1086 #endif /* DISABLE_JIT */
1088 guint8*
1089 mono_arch_get_call_target (guint8 *code)
1091 guint32 ins = ((guint32*)code) [-1];
1093 /* Should be a 'bl' or a 'b' */
1094 if (((ins >> 25) & 0x7) == 0x5) {
1095 gint32 disp = ((((gint32)ins) & 0xffffff) << 8) >> 8;
1096 guint8 *target = code - 4 + 8 + (disp * 4);
1098 return target;
1099 } else {
1100 return NULL;
1104 guint32
1105 mono_arch_get_plt_info_offset (guint8 *plt_entry, host_mgreg_t *regs, guint8 *code)
1107 /* The offset is stored as the 4th word of the plt entry */
1108 return ((guint32*)plt_entry) [3];
1112 * Return the address of the PLT entry called by the thumb code CODE.
1114 guint8*
1115 mono_arm_get_thumb_plt_entry (guint8 *code)
1117 int s, j1, j2, imm10, imm11, i1, i2, imm32;
1118 guint8 *bl, *base;
1119 guint16 t1, t2;
1120 guint8 *target;
1122 /* code should be right after a BL */
1123 code = (guint8*)((gsize)code & ~1);
1124 base = (guint8*)((gsize)code & ~3);
1125 bl = code - 4;
1126 t1 = ((guint16*)bl) [0];
1127 t2 = ((guint16*)bl) [1];
1129 g_assert ((t1 >> 11) == 0x1e);
1131 s = (t1 >> 10) & 0x1;
1132 imm10 = (t1 >> 0) & 0x3ff;
1133 j1 = (t2 >> 13) & 0x1;
1134 j2 = (t2 >> 11) & 0x1;
1135 imm11 = t2 & 0x7ff;
1137 i1 = (s ^ j1) ? 0 : 1;
1138 i2 = (s ^ j2) ? 0 : 1;
1140 imm32 = (imm11 << 1) | (imm10 << 12) | (i2 << 22) | (i1 << 23);
1141 if (s)
1142 /* Sign extend from 24 bits to 32 bits */
1143 imm32 = ((gint32)imm32 << 8) >> 8;
1145 target = code + imm32;
1147 /* target now points to the thumb plt entry */
1148 /* ldr.w r12, [pc, #8] */
1149 g_assert (((guint16*)target) [0] == 0xf8df);
1150 g_assert (((guint16*)target) [1] == 0xc008);
1153 * The PLT info offset is at offset 16, but mono_arch_get_plt_entry_offset () returns
1154 * the 3rd word, so compensate by returning a different value.
1156 target += 4;
1158 return target;
1161 #ifndef DISABLE_JIT
1164 * mono_arch_get_gsharedvt_arg_trampoline:
1166 * See tramp-x86.c for documentation.
1168 gpointer
1169 mono_arch_get_gsharedvt_arg_trampoline (MonoDomain *domain, gpointer arg, gpointer addr)
1171 guint8 *code, *buf;
1172 int buf_len;
1173 gpointer *constants;
1175 buf_len = 24;
1177 buf = code = mono_domain_code_reserve (domain, buf_len);
1179 /* Similar to the specialized trampoline code */
1180 ARM_PUSH (code, (1 << ARMREG_R0) | (1 << ARMREG_R1) | (1 << ARMREG_R2) | (1 << ARMREG_R3) | (1 << ARMREG_LR));
1181 ARM_LDR_IMM (code, ARMREG_IP, ARMREG_PC, 2 * sizeof (target_mgreg_t));
1182 /* arg is passed in LR */
1183 ARM_LDR_IMM (code, ARMREG_LR, ARMREG_PC, 0);
1184 code = emit_bx (code, ARMREG_IP);
1185 constants = (gpointer*)code;
1186 constants [0] = arg;
1187 constants [1] = addr;
1188 code += 2 * sizeof (gpointer);
1190 g_assert ((code - buf) <= buf_len);
1192 mono_arch_flush_icache (buf, code - buf);
1193 MONO_PROFILER_RAISE (jit_code_buffer, (buf, code - buf, MONO_PROFILER_CODE_BUFFER_GENERICS_TRAMPOLINE, NULL));
1195 mono_tramp_info_register (mono_tramp_info_create (NULL, buf, code - buf, NULL, NULL), domain);
1197 return buf;
1200 #else
1202 gpointer
1203 mono_arch_get_gsharedvt_arg_trampoline (MonoDomain *domain, gpointer arg, gpointer addr)
1205 g_assert_not_reached ();
1206 return NULL;
1209 #endif