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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / sound / isa / ad1816a / ad1816a_lib.c
blob4b8dfe2e3dcb69df0767b43df62ef2b9cf0d44a9
1 /*
2 ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
3 Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #include <linux/delay.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/slab.h>
24 #include <linux/ioport.h>
25 #include <sound/core.h>
26 #include <sound/tlv.h>
27 #include <sound/ad1816a.h>
28
29 #include <asm/io.h>
30 #include <asm/dma.h>
31
32 static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
33 {
34 int timeout;
35
36 for (timeout = 1000; timeout-- > 0; udelay(10))
37 if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
38 return 0;
39
40 snd_printk("chip busy.\n");
41 return -EBUSY;
42 }
43
44 static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
45 {
46 snd_ad1816a_busy_wait(chip);
47 return inb(AD1816A_REG(reg));
48 }
49
50 static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
51 unsigned char value)
52 {
53 snd_ad1816a_busy_wait(chip);
54 outb(value, AD1816A_REG(reg));
55 }
56
57 static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
58 unsigned char mask, unsigned char value)
59 {
60 snd_ad1816a_out(chip, reg,
61 (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
62 }
63
64 static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
65 {
66 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
67 return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
68 (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
69 }
70
71 static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
72 unsigned short value)
73 {
74 snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
75 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
76 snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
77 }
78
79 static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
80 unsigned short mask, unsigned short value)
81 {
82 snd_ad1816a_write(chip, reg,
83 (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
84 }
85
86
87 static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
88 unsigned int format, int channels)
89 {
90 unsigned char retval = AD1816A_FMT_LINEAR_8;
91
92 switch (format) {
93 case SNDRV_PCM_FORMAT_MU_LAW:
94 retval = AD1816A_FMT_ULAW_8;
95 break;
96 case SNDRV_PCM_FORMAT_A_LAW:
97 retval = AD1816A_FMT_ALAW_8;
98 break;
99 case SNDRV_PCM_FORMAT_S16_LE:
100 retval = AD1816A_FMT_LINEAR_16_LIT;
101 break;
102 case SNDRV_PCM_FORMAT_S16_BE:
103 retval = AD1816A_FMT_LINEAR_16_BIG;
104 }
105 return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
106 }
107
108 static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
109 {
110 unsigned long flags;
111
112 spin_lock_irqsave(&chip->lock, flags);
113
114 if (chip->mode & mode) {
115 spin_unlock_irqrestore(&chip->lock, flags);
116 return -EAGAIN;
117 }
118
119 switch ((mode &= AD1816A_MODE_OPEN)) {
120 case AD1816A_MODE_PLAYBACK:
121 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
122 AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
123 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
124 AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
125 break;
126 case AD1816A_MODE_CAPTURE:
127 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
128 AD1816A_CAPTURE_IRQ_PENDING, 0x00);
129 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
130 AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
131 break;
132 case AD1816A_MODE_TIMER:
133 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
134 AD1816A_TIMER_IRQ_PENDING, 0x00);
135 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
136 AD1816A_TIMER_IRQ_ENABLE, 0xffff);
137 }
138 chip->mode |= mode;
139
140 spin_unlock_irqrestore(&chip->lock, flags);
141 return 0;
142 }
143
144 static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
145 {
146 unsigned long flags;
147
148 spin_lock_irqsave(&chip->lock, flags);
149
150 switch ((mode &= AD1816A_MODE_OPEN)) {
151 case AD1816A_MODE_PLAYBACK:
152 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
153 AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
154 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
155 AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
156 break;
157 case AD1816A_MODE_CAPTURE:
158 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
159 AD1816A_CAPTURE_IRQ_PENDING, 0x00);
160 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
161 AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
162 break;
163 case AD1816A_MODE_TIMER:
164 snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
165 AD1816A_TIMER_IRQ_PENDING, 0x00);
166 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
167 AD1816A_TIMER_IRQ_ENABLE, 0x0000);
168 }
169 if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN))
170 chip->mode = 0;
171
172 spin_unlock_irqrestore(&chip->lock, flags);
173 }
174
175
176 static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
177 int channel, int cmd, int iscapture)
178 {
179 int error = 0;
180
181 switch (cmd) {
182 case SNDRV_PCM_TRIGGER_START:
183 case SNDRV_PCM_TRIGGER_STOP:
184 spin_lock(&chip->lock);
185 cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
186 /* if (what & AD1816A_PLAYBACK_ENABLE) */
187 /* That is not valid, because playback and capture enable
188 * are the same bit pattern, just to different addresses
189 */
190 if (! iscapture)
191 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
192 AD1816A_PLAYBACK_ENABLE, cmd);
193 else
194 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
195 AD1816A_CAPTURE_ENABLE, cmd);
196 spin_unlock(&chip->lock);
197 break;
198 default:
199 snd_printk("invalid trigger mode 0x%x.\n", what);
200 error = -EINVAL;
201 }
202
203 return error;
204 }
205
206 static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
207 {
208 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
209 return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
210 SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
211 }
212
213 static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
214 {
215 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
216 return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
217 SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
218 }
219
220 static int snd_ad1816a_hw_params(struct snd_pcm_substream *substream,
221 struct snd_pcm_hw_params *hw_params)
222 {
223 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
224 }
225
226 static int snd_ad1816a_hw_free(struct snd_pcm_substream *substream)
227 {
228 return snd_pcm_lib_free_pages(substream);
229 }
230
231 static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
232 {
233 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
234 unsigned long flags;
235 struct snd_pcm_runtime *runtime = substream->runtime;
236 unsigned int size, rate;
237
238 spin_lock_irqsave(&chip->lock, flags);
239
240 chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
241 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
242 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
243
244 snd_dma_program(chip->dma1, runtime->dma_addr, size,
245 DMA_MODE_WRITE | DMA_AUTOINIT);
246
247 rate = runtime->rate;
248 if (chip->clock_freq)
249 rate = (rate * 33000) / chip->clock_freq;
250 snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
251 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
252 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
253 snd_ad1816a_get_format(chip, runtime->format,
254 runtime->channels));
255
256 snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
257 snd_pcm_lib_period_bytes(substream) / 4 - 1);
258
259 spin_unlock_irqrestore(&chip->lock, flags);
260 return 0;
261 }
262
263 static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
264 {
265 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
266 unsigned long flags;
267 struct snd_pcm_runtime *runtime = substream->runtime;
268 unsigned int size, rate;
269
270 spin_lock_irqsave(&chip->lock, flags);
271
272 chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
273 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
274 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
275
276 snd_dma_program(chip->dma2, runtime->dma_addr, size,
277 DMA_MODE_READ | DMA_AUTOINIT);
278
279 rate = runtime->rate;
280 if (chip->clock_freq)
281 rate = (rate * 33000) / chip->clock_freq;
282 snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
283 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
284 AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
285 snd_ad1816a_get_format(chip, runtime->format,
286 runtime->channels));
287
288 snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
289 snd_pcm_lib_period_bytes(substream) / 4 - 1);
290
291 spin_unlock_irqrestore(&chip->lock, flags);
292 return 0;
293 }
294
295
296 static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
297 {
298 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
299 size_t ptr;
300 if (!(chip->mode & AD1816A_MODE_PLAYBACK))
301 return 0;
302 ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
303 return bytes_to_frames(substream->runtime, ptr);
304 }
305
306 static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
307 {
308 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
309 size_t ptr;
310 if (!(chip->mode & AD1816A_MODE_CAPTURE))
311 return 0;
312 ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
313 return bytes_to_frames(substream->runtime, ptr);
314 }
315
316
317 static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
318 {
319 struct snd_ad1816a *chip = dev_id;
320 unsigned char status;
321
322 spin_lock(&chip->lock);
323 status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
324 spin_unlock(&chip->lock);
325
326 if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
327 snd_pcm_period_elapsed(chip->playback_substream);
328
329 if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
330 snd_pcm_period_elapsed(chip->capture_substream);
331
332 if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
333 snd_timer_interrupt(chip->timer, chip->timer->sticks);
334
335 spin_lock(&chip->lock);
336 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
337 spin_unlock(&chip->lock);
338 return IRQ_HANDLED;
339 }
340
341
342 static struct snd_pcm_hardware snd_ad1816a_playback = {
343 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
344 SNDRV_PCM_INFO_MMAP_VALID),
345 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
346 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
347 SNDRV_PCM_FMTBIT_S16_BE),
348 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
349 .rate_min = 4000,
350 .rate_max = 55200,
351 .channels_min = 1,
352 .channels_max = 2,
353 .buffer_bytes_max = (128*1024),
354 .period_bytes_min = 64,
355 .period_bytes_max = (128*1024),
356 .periods_min = 1,
357 .periods_max = 1024,
358 .fifo_size = 0,
359 };
360
361 static struct snd_pcm_hardware snd_ad1816a_capture = {
362 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
363 SNDRV_PCM_INFO_MMAP_VALID),
364 .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
365 SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
366 SNDRV_PCM_FMTBIT_S16_BE),
367 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
368 .rate_min = 4000,
369 .rate_max = 55200,
370 .channels_min = 1,
371 .channels_max = 2,
372 .buffer_bytes_max = (128*1024),
373 .period_bytes_min = 64,
374 .period_bytes_max = (128*1024),
375 .periods_min = 1,
376 .periods_max = 1024,
377 .fifo_size = 0,
378 };
379
380 #if 0 /* not used now */
381 static int snd_ad1816a_timer_close(struct snd_timer *timer)
382 {
383 struct snd_ad1816a *chip = snd_timer_chip(timer);
384 snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
385 return 0;
386 }
387
388 static int snd_ad1816a_timer_open(struct snd_timer *timer)
389 {
390 struct snd_ad1816a *chip = snd_timer_chip(timer);
391 snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
392 return 0;
393 }
394
395 static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
396 {
397 snd_assert(timer != NULL, return 0);
398
399 return 10000;
400 }
401
402 static int snd_ad1816a_timer_start(struct snd_timer *timer)
403 {
404 unsigned short bits;
405 unsigned long flags;
406 struct snd_ad1816a *chip = snd_timer_chip(timer);
407 spin_lock_irqsave(&chip->lock, flags);
408 bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
409
410 if (!(bits & AD1816A_TIMER_ENABLE)) {
411 snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
412 timer->sticks & 0xffff);
413
414 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
415 AD1816A_TIMER_ENABLE, 0xffff);
416 }
417 spin_unlock_irqrestore(&chip->lock, flags);
418 return 0;
419 }
420
421 static int snd_ad1816a_timer_stop(struct snd_timer *timer)
422 {
423 unsigned long flags;
424 struct snd_ad1816a *chip = snd_timer_chip(timer);
425 spin_lock_irqsave(&chip->lock, flags);
426
427 snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
428 AD1816A_TIMER_ENABLE, 0x0000);
429
430 spin_unlock_irqrestore(&chip->lock, flags);
431 return 0;
432 }
433
434 static struct snd_timer_hardware snd_ad1816a_timer_table = {
435 .flags = SNDRV_TIMER_HW_AUTO,
436 .resolution = 10000,
437 .ticks = 65535,
438 .open = snd_ad1816a_timer_open,
439 .close = snd_ad1816a_timer_close,
440 .c_resolution = snd_ad1816a_timer_resolution,
441 .start = snd_ad1816a_timer_start,
442 .stop = snd_ad1816a_timer_stop,
443 };
444 #endif /* not used now */
445
446
447 static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
448 {
449 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
450 struct snd_pcm_runtime *runtime = substream->runtime;
451 int error;
452
453 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0)
454 return error;
455 runtime->hw = snd_ad1816a_playback;
456 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
457 snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
458 chip->playback_substream = substream;
459 return 0;
460 }
461
462 static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
463 {
464 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
465 struct snd_pcm_runtime *runtime = substream->runtime;
466 int error;
467
468 if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0)
469 return error;
470 runtime->hw = snd_ad1816a_capture;
471 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
472 snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
473 chip->capture_substream = substream;
474 return 0;
475 }
476
477 static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
478 {
479 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
480
481 chip->playback_substream = NULL;
482 snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
483 return 0;
484 }
485
486 static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
487 {
488 struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
489
490 chip->capture_substream = NULL;
491 snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
492 return 0;
493 }
494
495
496 static void __devinit snd_ad1816a_init(struct snd_ad1816a *chip)
497 {
498 unsigned long flags;
499
500 spin_lock_irqsave(&chip->lock, flags);
501
502 snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
503 snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
504 AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
505 snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
506 AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
507 snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
508 snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
509 AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
510 snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
511 snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
512
513 spin_unlock_irqrestore(&chip->lock, flags);
514 }
515
516 static int __devinit snd_ad1816a_probe(struct snd_ad1816a *chip)
517 {
518 unsigned long flags;
519
520 spin_lock_irqsave(&chip->lock, flags);
521
522 switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
523 case 0:
524 chip->hardware = AD1816A_HW_AD1815;
525 break;
526 case 1:
527 chip->hardware = AD1816A_HW_AD18MAX10;
528 break;
529 case 3:
530 chip->hardware = AD1816A_HW_AD1816A;
531 break;
532 default:
533 chip->hardware = AD1816A_HW_AUTO;
534 }
535
536 spin_unlock_irqrestore(&chip->lock, flags);
537 return 0;
538 }
539
540 static int snd_ad1816a_free(struct snd_ad1816a *chip)
541 {
542 release_and_free_resource(chip->res_port);
543 if (chip->irq >= 0)
544 free_irq(chip->irq, (void *) chip);
545 if (chip->dma1 >= 0) {
546 snd_dma_disable(chip->dma1);
547 free_dma(chip->dma1);
548 }
549 if (chip->dma2 >= 0) {
550 snd_dma_disable(chip->dma2);
551 free_dma(chip->dma2);
552 }
553 kfree(chip);
554 return 0;
555 }
556
557 static int snd_ad1816a_dev_free(struct snd_device *device)
558 {
559 struct snd_ad1816a *chip = device->device_data;
560 return snd_ad1816a_free(chip);
561 }
562
563 static const char __devinit *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
564 {
565 switch (chip->hardware) {
566 case AD1816A_HW_AD1816A: return "AD1816A";
567 case AD1816A_HW_AD1815: return "AD1815";
568 case AD1816A_HW_AD18MAX10: return "AD18max10";
569 default:
570 snd_printk("Unknown chip version %d:%d.\n",
571 chip->version, chip->hardware);
572 return "AD1816A - unknown";
573 }
574 }
575
576 int __devinit snd_ad1816a_create(struct snd_card *card,
577 unsigned long port, int irq, int dma1, int dma2,
578 struct snd_ad1816a **rchip)
579 {
580 static struct snd_device_ops ops = {
581 .dev_free = snd_ad1816a_dev_free,
582 };
583 int error;
584 struct snd_ad1816a *chip;
585
586 *rchip = NULL;
587
588 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
589 if (chip == NULL)
590 return -ENOMEM;
591 chip->irq = -1;
592 chip->dma1 = -1;
593 chip->dma2 = -1;
594
595 if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) {
596 snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
597 snd_ad1816a_free(chip);
598 return -EBUSY;
599 }
600 if (request_irq(irq, snd_ad1816a_interrupt, IRQF_DISABLED, "AD1816A", (void *) chip)) {
601 snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
602 snd_ad1816a_free(chip);
603 return -EBUSY;
604 }
605 chip->irq = irq;
606 if (request_dma(dma1, "AD1816A - 1")) {
607 snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
608 snd_ad1816a_free(chip);
609 return -EBUSY;
610 }
611 chip->dma1 = dma1;
612 if (request_dma(dma2, "AD1816A - 2")) {
613 snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
614 snd_ad1816a_free(chip);
615 return -EBUSY;
616 }
617 chip->dma2 = dma2;
618
619 chip->card = card;
620 chip->port = port;
621 spin_lock_init(&chip->lock);
622
623 if ((error = snd_ad1816a_probe(chip))) {
624 snd_ad1816a_free(chip);
625 return error;
626 }
627
628 snd_ad1816a_init(chip);
629
630 /* Register device */
631 if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
632 snd_ad1816a_free(chip);
633 return error;
634 }
635
636 *rchip = chip;
637 return 0;
638 }
639
640 static struct snd_pcm_ops snd_ad1816a_playback_ops = {
641 .open = snd_ad1816a_playback_open,
642 .close = snd_ad1816a_playback_close,
643 .ioctl = snd_pcm_lib_ioctl,
644 .hw_params = snd_ad1816a_hw_params,
645 .hw_free = snd_ad1816a_hw_free,
646 .prepare = snd_ad1816a_playback_prepare,
647 .trigger = snd_ad1816a_playback_trigger,
648 .pointer = snd_ad1816a_playback_pointer,
649 };
650
651 static struct snd_pcm_ops snd_ad1816a_capture_ops = {
652 .open = snd_ad1816a_capture_open,
653 .close = snd_ad1816a_capture_close,
654 .ioctl = snd_pcm_lib_ioctl,
655 .hw_params = snd_ad1816a_hw_params,
656 .hw_free = snd_ad1816a_hw_free,
657 .prepare = snd_ad1816a_capture_prepare,
658 .trigger = snd_ad1816a_capture_trigger,
659 .pointer = snd_ad1816a_capture_pointer,
660 };
661
662 int __devinit snd_ad1816a_pcm(struct snd_ad1816a *chip, int device, struct snd_pcm **rpcm)
663 {
664 int error;
665 struct snd_pcm *pcm;
666
667 if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm)))
668 return error;
669
670 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
671 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
672
673 pcm->private_data = chip;
674 pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
675
676 strcpy(pcm->name, snd_ad1816a_chip_id(chip));
677 snd_ad1816a_init(chip);
678
679 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
680 snd_dma_isa_data(),
681 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
682
683 chip->pcm = pcm;
684 if (rpcm)
685 *rpcm = pcm;
686 return 0;
687 }
688
689 #if 0 /* not used now */
690 int __devinit snd_ad1816a_timer(struct snd_ad1816a *chip, int device, struct snd_timer **rtimer)
691 {
692 struct snd_timer *timer;
693 struct snd_timer_id tid;
694 int error;
695
696 tid.dev_class = SNDRV_TIMER_CLASS_CARD;
697 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
698 tid.card = chip->card->number;
699 tid.device = device;
700 tid.subdevice = 0;
701 if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0)
702 return error;
703 strcpy(timer->name, snd_ad1816a_chip_id(chip));
704 timer->private_data = chip;
705 chip->timer = timer;
706 timer->hw = snd_ad1816a_timer_table;
707 if (rtimer)
708 *rtimer = timer;
709 return 0;
710 }
711 #endif /* not used now */
712
713 /*
714 *
715 */
716
717 static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
718 {
719 static char *texts[8] = {
720 "Line", "Mix", "CD", "Synth", "Video",
721 "Mic", "Phone",
722 };
723
724 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
725 uinfo->count = 2;
726 uinfo->value.enumerated.items = 7;
727 if (uinfo->value.enumerated.item > 6)
728 uinfo->value.enumerated.item = 6;
729 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
730 return 0;
731 }
732
733 static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
734 {
735 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
736 unsigned long flags;
737 unsigned short val;
738
739 spin_lock_irqsave(&chip->lock, flags);
740 val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
741 spin_unlock_irqrestore(&chip->lock, flags);
742 ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
743 ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
744 return 0;
745 }
746
747 static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
748 {
749 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
750 unsigned long flags;
751 unsigned short val;
752 int change;
753
754 if (ucontrol->value.enumerated.item[0] > 6 ||
755 ucontrol->value.enumerated.item[1] > 6)
756 return -EINVAL;
757 val = (ucontrol->value.enumerated.item[0] << 12) |
758 (ucontrol->value.enumerated.item[1] << 4);
759 spin_lock_irqsave(&chip->lock, flags);
760 change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
761 snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
762 spin_unlock_irqrestore(&chip->lock, flags);
763 return change;
764 }
765
766 #define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \
767 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
768 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
769 .name = xname, .info = snd_ad1816a_info_single, \
770 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
771 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
772 .tlv = { .p = (xtlv) } }
773 #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
774 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
775 .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
776 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
777
778 static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
779 {
780 int mask = (kcontrol->private_value >> 16) & 0xff;
781
782 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
783 uinfo->count = 1;
784 uinfo->value.integer.min = 0;
785 uinfo->value.integer.max = mask;
786 return 0;
787 }
788
789 static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
790 {
791 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
792 unsigned long flags;
793 int reg = kcontrol->private_value & 0xff;
794 int shift = (kcontrol->private_value >> 8) & 0xff;
795 int mask = (kcontrol->private_value >> 16) & 0xff;
796 int invert = (kcontrol->private_value >> 24) & 0xff;
797
798 spin_lock_irqsave(&chip->lock, flags);
799 ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
800 spin_unlock_irqrestore(&chip->lock, flags);
801 if (invert)
802 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
803 return 0;
804 }
805
806 static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
807 {
808 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
809 unsigned long flags;
810 int reg = kcontrol->private_value & 0xff;
811 int shift = (kcontrol->private_value >> 8) & 0xff;
812 int mask = (kcontrol->private_value >> 16) & 0xff;
813 int invert = (kcontrol->private_value >> 24) & 0xff;
814 int change;
815 unsigned short old_val, val;
816
817 val = (ucontrol->value.integer.value[0] & mask);
818 if (invert)
819 val = mask - val;
820 val <<= shift;
821 spin_lock_irqsave(&chip->lock, flags);
822 old_val = snd_ad1816a_read(chip, reg);
823 val = (old_val & ~(mask << shift)) | val;
824 change = val != old_val;
825 snd_ad1816a_write(chip, reg, val);
826 spin_unlock_irqrestore(&chip->lock, flags);
827 return change;
828 }
829
830 #define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
831 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
832 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
833 .name = xname, .info = snd_ad1816a_info_double, \
834 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
835 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
836 .tlv = { .p = (xtlv) } }
837
838 #define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
839 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
840 .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
841 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
842
843 static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
844 {
845 int mask = (kcontrol->private_value >> 16) & 0xff;
846
847 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
848 uinfo->count = 2;
849 uinfo->value.integer.min = 0;
850 uinfo->value.integer.max = mask;
851 return 0;
852 }
853
854 static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
855 {
856 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
857 unsigned long flags;
858 int reg = kcontrol->private_value & 0xff;
859 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
860 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
861 int mask = (kcontrol->private_value >> 16) & 0xff;
862 int invert = (kcontrol->private_value >> 24) & 0xff;
863 unsigned short val;
864
865 spin_lock_irqsave(&chip->lock, flags);
866 val = snd_ad1816a_read(chip, reg);
867 ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
868 ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
869 spin_unlock_irqrestore(&chip->lock, flags);
870 if (invert) {
871 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
872 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
873 }
874 return 0;
875 }
876
877 static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
878 {
879 struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
880 unsigned long flags;
881 int reg = kcontrol->private_value & 0xff;
882 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
883 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
884 int mask = (kcontrol->private_value >> 16) & 0xff;
885 int invert = (kcontrol->private_value >> 24) & 0xff;
886 int change;
887 unsigned short old_val, val1, val2;
888
889 val1 = ucontrol->value.integer.value[0] & mask;
890 val2 = ucontrol->value.integer.value[1] & mask;
891 if (invert) {
892 val1 = mask - val1;
893 val2 = mask - val2;
894 }
895 val1 <<= shift_left;
896 val2 <<= shift_right;
897 spin_lock_irqsave(&chip->lock, flags);
898 old_val = snd_ad1816a_read(chip, reg);
899 val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
900 change = val1 != old_val;
901 snd_ad1816a_write(chip, reg, val1);
902 spin_unlock_irqrestore(&chip->lock, flags);
903 return change;
904 }
905
906 static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
907 static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
908 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
909 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
910 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
911
912 static struct snd_kcontrol_new snd_ad1816a_controls[] __devinitdata = {
913 AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
914 AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
915 db_scale_5bit),
916 AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
917 AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
918 db_scale_6bit),
919 AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
920 AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
921 db_scale_5bit_12db_max),
922 AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
923 AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
924 db_scale_5bit_12db_max),
925 AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
926 AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
927 db_scale_5bit_12db_max),
928 AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
929 AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
930 db_scale_6bit),
931 AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
932 AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
933 db_scale_5bit_12db_max),
934 AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
935 AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
936 AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
937 db_scale_5bit_12db_max),
938 AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
939 AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
940 db_scale_4bit),
941 AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
942 AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
943 db_scale_5bit),
944 {
945 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
946 .name = "Capture Source",
947 .info = snd_ad1816a_info_mux,
948 .get = snd_ad1816a_get_mux,
949 .put = snd_ad1816a_put_mux,
950 },
951 AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
952 AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
953 db_scale_rec_gain),
954 AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
955 AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
956 };
957
958 int __devinit snd_ad1816a_mixer(struct snd_ad1816a *chip)
959 {
960 struct snd_card *card;
961 unsigned int idx;
962 int err;
963
964 snd_assert(chip != NULL && chip->card != NULL, return -EINVAL);
965
966 card = chip->card;
967
968 strcpy(card->mixername, snd_ad1816a_chip_id(chip));
969
970 for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
971 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0)
972 return err;
973 }
974 return 0;
975 }
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