Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / sound / arm / pxa2xx-ac97.c
blob5d86e6809752e701218531deb29088f2f5517855
1 /*
2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
4 * Author: Nicolas Pitre
5 * Created: Dec 02, 2004
6 * Copyright: MontaVista Software Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/platform_device.h>
17 #include <linux/interrupt.h>
18 #include <linux/wait.h>
19 #include <linux/delay.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/ac97_codec.h>
24 #include <sound/initval.h>
26 #include <asm/irq.h>
27 #include <linux/mutex.h>
28 #include <asm/hardware.h>
29 #include <asm/arch/pxa-regs.h>
30 #include <asm/arch/audio.h>
32 #include "pxa2xx-pcm.h"
35 static DEFINE_MUTEX(car_mutex);
36 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
37 static volatile long gsr_bits;
40 * Beware PXA27x bugs:
42 * o Slot 12 read from modem space will hang controller.
43 * o CDONE, SDONE interrupt fails after any slot 12 IO.
45 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
46 * 1 jiffy timeout if interrupt never comes).
47 */
49 static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
51 unsigned short val = -1;
52 volatile u32 *reg_addr;
54 mutex_lock(&car_mutex);
56 /* set up primary or secondary codec space */
57 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
58 reg_addr += (reg >> 1);
60 /* start read access across the ac97 link */
61 GSR = GSR_CDONE | GSR_SDONE;
62 gsr_bits = 0;
63 val = *reg_addr;
64 if (reg == AC97_GPIO_STATUS)
65 goto out;
66 if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
67 !((GSR | gsr_bits) & GSR_SDONE)) {
68 printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
69 __FUNCTION__, reg, GSR | gsr_bits);
70 val = -1;
71 goto out;
74 /* valid data now */
75 GSR = GSR_CDONE | GSR_SDONE;
76 gsr_bits = 0;
77 val = *reg_addr;
78 /* but we've just started another cycle... */
79 wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);
81 out: mutex_unlock(&car_mutex);
82 return val;
85 static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
87 volatile u32 *reg_addr;
89 mutex_lock(&car_mutex);
91 /* set up primary or secondary codec space */
92 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
93 reg_addr += (reg >> 1);
95 GSR = GSR_CDONE | GSR_SDONE;
96 gsr_bits = 0;
97 *reg_addr = val;
98 if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
99 !((GSR | gsr_bits) & GSR_CDONE))
100 printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
101 __FUNCTION__, reg, GSR | gsr_bits);
103 mutex_unlock(&car_mutex);
106 static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
108 /* First, try cold reset */
109 GCR &= GCR_COLD_RST; /* clear everything but nCRST */
110 GCR &= ~GCR_COLD_RST; /* then assert nCRST */
112 gsr_bits = 0;
113 #ifdef CONFIG_PXA27x
114 /* PXA27x Developers Manual section 13.5.2.2.1 */
115 pxa_set_cken(CKEN_AC97CONF, 1);
116 udelay(5);
117 pxa_set_cken(CKEN_AC97CONF, 0);
118 GCR = GCR_COLD_RST;
119 udelay(50);
120 #else
121 GCR = GCR_COLD_RST;
122 GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
123 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
124 #endif
126 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
127 printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
128 __FUNCTION__, gsr_bits);
130 /* let's try warm reset */
131 gsr_bits = 0;
132 #ifdef CONFIG_PXA27x
133 /* warm reset broken on Bulverde,
134 so manually keep AC97 reset high */
135 pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
136 udelay(10);
137 GCR |= GCR_WARM_RST;
138 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
139 udelay(500);
140 #else
141 GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
142 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
143 #endif
145 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
146 printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
147 __FUNCTION__, gsr_bits);
150 GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
151 GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
154 static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id)
156 long status;
158 status = GSR;
159 if (status) {
160 GSR = status;
161 gsr_bits |= status;
162 wake_up(&gsr_wq);
164 #ifdef CONFIG_PXA27x
165 /* Although we don't use those we still need to clear them
166 since they tend to spuriously trigger when MMC is used
167 (hardware bug? go figure)... */
168 MISR = MISR_EOC;
169 PISR = PISR_EOC;
170 MCSR = MCSR_EOC;
171 #endif
173 return IRQ_HANDLED;
176 return IRQ_NONE;
179 static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
180 .read = pxa2xx_ac97_read,
181 .write = pxa2xx_ac97_write,
182 .reset = pxa2xx_ac97_reset,
185 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
186 .name = "AC97 PCM out",
187 .dev_addr = __PREG(PCDR),
188 .drcmr = &DRCMRTXPCDR,
189 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
190 DCMD_BURST32 | DCMD_WIDTH4,
193 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
194 .name = "AC97 PCM in",
195 .dev_addr = __PREG(PCDR),
196 .drcmr = &DRCMRRXPCDR,
197 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
198 DCMD_BURST32 | DCMD_WIDTH4,
201 static struct snd_pcm *pxa2xx_ac97_pcm;
202 static struct snd_ac97 *pxa2xx_ac97_ac97;
204 static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
206 struct snd_pcm_runtime *runtime = substream->runtime;
207 pxa2xx_audio_ops_t *platform_ops;
208 int r;
210 runtime->hw.channels_min = 2;
211 runtime->hw.channels_max = 2;
213 r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
214 AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
215 runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
216 snd_pcm_limit_hw_rates(runtime);
218 platform_ops = substream->pcm->card->dev->platform_data;
219 if (platform_ops && platform_ops->startup)
220 return platform_ops->startup(substream, platform_ops->priv);
221 else
222 return 0;
225 static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
227 pxa2xx_audio_ops_t *platform_ops;
229 platform_ops = substream->pcm->card->dev->platform_data;
230 if (platform_ops && platform_ops->shutdown)
231 platform_ops->shutdown(substream, platform_ops->priv);
234 static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
236 struct snd_pcm_runtime *runtime = substream->runtime;
237 int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
238 AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
239 return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
242 static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
243 .playback_params = &pxa2xx_ac97_pcm_out,
244 .capture_params = &pxa2xx_ac97_pcm_in,
245 .startup = pxa2xx_ac97_pcm_startup,
246 .shutdown = pxa2xx_ac97_pcm_shutdown,
247 .prepare = pxa2xx_ac97_pcm_prepare,
250 #ifdef CONFIG_PM
252 static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
254 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
256 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
257 snd_pcm_suspend_all(pxa2xx_ac97_pcm);
258 snd_ac97_suspend(pxa2xx_ac97_ac97);
259 if (platform_ops && platform_ops->suspend)
260 platform_ops->suspend(platform_ops->priv);
261 GCR |= GCR_ACLINK_OFF;
262 pxa_set_cken(CKEN_AC97, 0);
264 return 0;
267 static int pxa2xx_ac97_do_resume(struct snd_card *card)
269 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
271 pxa_set_cken(CKEN_AC97, 1);
272 if (platform_ops && platform_ops->resume)
273 platform_ops->resume(platform_ops->priv);
274 snd_ac97_resume(pxa2xx_ac97_ac97);
275 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
277 return 0;
280 static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
282 struct snd_card *card = platform_get_drvdata(dev);
283 int ret = 0;
285 if (card)
286 ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
288 return ret;
291 static int pxa2xx_ac97_resume(struct platform_device *dev)
293 struct snd_card *card = platform_get_drvdata(dev);
294 int ret = 0;
296 if (card)
297 ret = pxa2xx_ac97_do_resume(card);
299 return ret;
302 #else
303 #define pxa2xx_ac97_suspend NULL
304 #define pxa2xx_ac97_resume NULL
305 #endif
307 static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
309 struct snd_card *card;
310 struct snd_ac97_bus *ac97_bus;
311 struct snd_ac97_template ac97_template;
312 int ret;
314 ret = -ENOMEM;
315 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
316 THIS_MODULE, 0);
317 if (!card)
318 goto err;
320 card->dev = &dev->dev;
321 strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
323 ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
324 if (ret)
325 goto err;
327 ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
328 if (ret < 0)
329 goto err;
331 pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
332 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
333 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
334 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
335 #ifdef CONFIG_PXA27x
336 /* Use GPIO 113 as AC97 Reset on Bulverde */
337 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
338 #endif
339 pxa_set_cken(CKEN_AC97, 1);
341 ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
342 if (ret)
343 goto err;
344 memset(&ac97_template, 0, sizeof(ac97_template));
345 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
346 if (ret)
347 goto err;
349 snprintf(card->shortname, sizeof(card->shortname),
350 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
351 snprintf(card->longname, sizeof(card->longname),
352 "%s (%s)", dev->dev.driver->name, card->mixername);
354 snd_card_set_dev(card, &dev->dev);
355 ret = snd_card_register(card);
356 if (ret == 0) {
357 platform_set_drvdata(dev, card);
358 return 0;
361 err:
362 if (card)
363 snd_card_free(card);
364 if (CKEN & (1 << CKEN_AC97)) {
365 GCR |= GCR_ACLINK_OFF;
366 free_irq(IRQ_AC97, NULL);
367 pxa_set_cken(CKEN_AC97, 0);
369 return ret;
372 static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
374 struct snd_card *card = platform_get_drvdata(dev);
376 if (card) {
377 snd_card_free(card);
378 platform_set_drvdata(dev, NULL);
379 GCR |= GCR_ACLINK_OFF;
380 free_irq(IRQ_AC97, NULL);
381 pxa_set_cken(CKEN_AC97, 0);
384 return 0;
387 static struct platform_driver pxa2xx_ac97_driver = {
388 .probe = pxa2xx_ac97_probe,
389 .remove = __devexit_p(pxa2xx_ac97_remove),
390 .suspend = pxa2xx_ac97_suspend,
391 .resume = pxa2xx_ac97_resume,
392 .driver = {
393 .name = "pxa2xx-ac97",
397 static int __init pxa2xx_ac97_init(void)
399 return platform_driver_register(&pxa2xx_ac97_driver);
402 static void __exit pxa2xx_ac97_exit(void)
404 platform_driver_unregister(&pxa2xx_ac97_driver);
407 module_init(pxa2xx_ac97_init);
408 module_exit(pxa2xx_ac97_exit);
410 MODULE_AUTHOR("Nicolas Pitre");
411 MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
412 MODULE_LICENSE("GPL");