Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / lib / swiotlb.c
blob025922807e6e648bb7dc4eda61bfd8fa609a221c
1 /*
2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
19 #include <linux/cache.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/mm.h>
22 #include <linux/module.h>
23 #include <linux/spinlock.h>
24 #include <linux/string.h>
25 #include <linux/types.h>
26 #include <linux/ctype.h>
28 #include <asm/io.h>
29 #include <asm/dma.h>
30 #include <asm/scatterlist.h>
32 #include <linux/init.h>
33 #include <linux/bootmem.h>
35 #define OFFSET(val,align) ((unsigned long) \
36 ( (val) & ( (align) - 1)))
38 #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
39 #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
42 * Maximum allowable number of contiguous slabs to map,
43 * must be a power of 2. What is the appropriate value ?
44 * The complexity of {map,unmap}_single is linearly dependent on this value.
46 #define IO_TLB_SEGSIZE 128
49 * log of the size of each IO TLB slab. The number of slabs is command line
50 * controllable.
52 #define IO_TLB_SHIFT 11
54 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
57 * Minimum IO TLB size to bother booting with. Systems with mainly
58 * 64bit capable cards will only lightly use the swiotlb. If we can't
59 * allocate a contiguous 1MB, we're probably in trouble anyway.
61 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
64 * Enumeration for sync targets
66 enum dma_sync_target {
67 SYNC_FOR_CPU = 0,
68 SYNC_FOR_DEVICE = 1,
71 int swiotlb_force;
74 * Used to do a quick range check in swiotlb_unmap_single and
75 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
76 * API.
78 static char *io_tlb_start, *io_tlb_end;
81 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
82 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
84 static unsigned long io_tlb_nslabs;
87 * When the IOMMU overflows we return a fallback buffer. This sets the size.
89 static unsigned long io_tlb_overflow = 32*1024;
91 void *io_tlb_overflow_buffer;
94 * This is a free list describing the number of free entries available from
95 * each index
97 static unsigned int *io_tlb_list;
98 static unsigned int io_tlb_index;
101 * We need to save away the original address corresponding to a mapped entry
102 * for the sync operations.
104 static unsigned char **io_tlb_orig_addr;
107 * Protect the above data structures in the map and unmap calls
109 static DEFINE_SPINLOCK(io_tlb_lock);
111 static int __init
112 setup_io_tlb_npages(char *str)
114 if (isdigit(*str)) {
115 io_tlb_nslabs = simple_strtoul(str, &str, 0);
116 /* avoid tail segment of size < IO_TLB_SEGSIZE */
117 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
119 if (*str == ',')
120 ++str;
121 if (!strcmp(str, "force"))
122 swiotlb_force = 1;
123 return 1;
125 __setup("swiotlb=", setup_io_tlb_npages);
126 /* make io_tlb_overflow tunable too? */
129 * Statically reserve bounce buffer space and initialize bounce buffer data
130 * structures for the software IO TLB used to implement the DMA API.
132 void __init
133 swiotlb_init_with_default_size(size_t default_size)
135 unsigned long i, bytes;
137 if (!io_tlb_nslabs) {
138 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
139 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
142 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
145 * Get IO TLB memory from the low pages
147 io_tlb_start = alloc_bootmem_low_pages(bytes);
148 if (!io_tlb_start)
149 panic("Cannot allocate SWIOTLB buffer");
150 io_tlb_end = io_tlb_start + bytes;
153 * Allocate and initialize the free list array. This array is used
154 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
155 * between io_tlb_start and io_tlb_end.
157 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
158 for (i = 0; i < io_tlb_nslabs; i++)
159 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
160 io_tlb_index = 0;
161 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
164 * Get the overflow emergency buffer
166 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
167 if (!io_tlb_overflow_buffer)
168 panic("Cannot allocate SWIOTLB overflow buffer!\n");
170 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
171 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
174 void __init
175 swiotlb_init(void)
177 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
181 * Systems with larger DMA zones (those that don't support ISA) can
182 * initialize the swiotlb later using the slab allocator if needed.
183 * This should be just like above, but with some error catching.
186 swiotlb_late_init_with_default_size(size_t default_size)
188 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
189 unsigned int order;
191 if (!io_tlb_nslabs) {
192 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
193 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
197 * Get IO TLB memory from the low pages
199 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
200 io_tlb_nslabs = SLABS_PER_PAGE << order;
201 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
203 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
204 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
205 order);
206 if (io_tlb_start)
207 break;
208 order--;
211 if (!io_tlb_start)
212 goto cleanup1;
214 if (order != get_order(bytes)) {
215 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
216 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
217 io_tlb_nslabs = SLABS_PER_PAGE << order;
218 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
220 io_tlb_end = io_tlb_start + bytes;
221 memset(io_tlb_start, 0, bytes);
224 * Allocate and initialize the free list array. This array is used
225 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
226 * between io_tlb_start and io_tlb_end.
228 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
229 get_order(io_tlb_nslabs * sizeof(int)));
230 if (!io_tlb_list)
231 goto cleanup2;
233 for (i = 0; i < io_tlb_nslabs; i++)
234 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
235 io_tlb_index = 0;
237 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
238 get_order(io_tlb_nslabs * sizeof(char *)));
239 if (!io_tlb_orig_addr)
240 goto cleanup3;
242 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
245 * Get the overflow emergency buffer
247 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
248 get_order(io_tlb_overflow));
249 if (!io_tlb_overflow_buffer)
250 goto cleanup4;
252 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
253 "0x%lx\n", bytes >> 20,
254 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
256 return 0;
258 cleanup4:
259 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
260 sizeof(char *)));
261 io_tlb_orig_addr = NULL;
262 cleanup3:
263 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
264 sizeof(int)));
265 io_tlb_list = NULL;
266 cleanup2:
267 io_tlb_end = NULL;
268 free_pages((unsigned long)io_tlb_start, order);
269 io_tlb_start = NULL;
270 cleanup1:
271 io_tlb_nslabs = req_nslabs;
272 return -ENOMEM;
275 static int
276 address_needs_mapping(struct device *hwdev, dma_addr_t addr)
278 dma_addr_t mask = 0xffffffff;
279 /* If the device has a mask, use it, otherwise default to 32 bits */
280 if (hwdev && hwdev->dma_mask)
281 mask = *hwdev->dma_mask;
282 return (addr & ~mask) != 0;
285 static inline unsigned int is_span_boundary(unsigned int index,
286 unsigned int nslots,
287 unsigned long offset_slots,
288 unsigned long max_slots)
290 unsigned long offset = (offset_slots + index) & (max_slots - 1);
291 return offset + nslots > max_slots;
295 * Allocates bounce buffer and returns its kernel virtual address.
297 static void *
298 map_single(struct device *hwdev, char *buffer, size_t size, int dir)
300 unsigned long flags;
301 char *dma_addr;
302 unsigned int nslots, stride, index, wrap;
303 int i;
304 unsigned long start_dma_addr;
305 unsigned long mask;
306 unsigned long offset_slots;
307 unsigned long max_slots;
309 mask = dma_get_seg_boundary(hwdev);
310 start_dma_addr = virt_to_bus(io_tlb_start) & mask;
312 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
313 max_slots = mask + 1
314 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
315 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
318 * For mappings greater than a page, we limit the stride (and
319 * hence alignment) to a page size.
321 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
322 if (size > PAGE_SIZE)
323 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
324 else
325 stride = 1;
327 BUG_ON(!nslots);
330 * Find suitable number of IO TLB entries size that will fit this
331 * request and allocate a buffer from that IO TLB pool.
333 spin_lock_irqsave(&io_tlb_lock, flags);
335 index = ALIGN(io_tlb_index, stride);
336 if (index >= io_tlb_nslabs)
337 index = 0;
338 wrap = index;
340 do {
341 while (is_span_boundary(index, nslots, offset_slots,
342 max_slots)) {
343 index += stride;
344 if (index >= io_tlb_nslabs)
345 index = 0;
346 if (index == wrap)
347 goto not_found;
351 * If we find a slot that indicates we have 'nslots'
352 * number of contiguous buffers, we allocate the
353 * buffers from that slot and mark the entries as '0'
354 * indicating unavailable.
356 if (io_tlb_list[index] >= nslots) {
357 int count = 0;
359 for (i = index; i < (int) (index + nslots); i++)
360 io_tlb_list[i] = 0;
361 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
362 io_tlb_list[i] = ++count;
363 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
366 * Update the indices to avoid searching in
367 * the next round.
369 io_tlb_index = ((index + nslots) < io_tlb_nslabs
370 ? (index + nslots) : 0);
372 goto found;
374 index += stride;
375 if (index >= io_tlb_nslabs)
376 index = 0;
377 } while (index != wrap);
379 not_found:
380 spin_unlock_irqrestore(&io_tlb_lock, flags);
381 return NULL;
383 found:
384 spin_unlock_irqrestore(&io_tlb_lock, flags);
387 * Save away the mapping from the original address to the DMA address.
388 * This is needed when we sync the memory. Then we sync the buffer if
389 * needed.
391 for (i = 0; i < nslots; i++)
392 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
393 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
394 memcpy(dma_addr, buffer, size);
396 return dma_addr;
400 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
402 static void
403 unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
405 unsigned long flags;
406 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
407 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
408 char *buffer = io_tlb_orig_addr[index];
411 * First, sync the memory before unmapping the entry
413 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
415 * bounce... copy the data back into the original buffer * and
416 * delete the bounce buffer.
418 memcpy(buffer, dma_addr, size);
421 * Return the buffer to the free list by setting the corresponding
422 * entries to indicate the number of contigous entries available.
423 * While returning the entries to the free list, we merge the entries
424 * with slots below and above the pool being returned.
426 spin_lock_irqsave(&io_tlb_lock, flags);
428 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
429 io_tlb_list[index + nslots] : 0);
431 * Step 1: return the slots to the free list, merging the
432 * slots with superceeding slots
434 for (i = index + nslots - 1; i >= index; i--)
435 io_tlb_list[i] = ++count;
437 * Step 2: merge the returned slots with the preceding slots,
438 * if available (non zero)
440 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
441 io_tlb_list[i] = ++count;
443 spin_unlock_irqrestore(&io_tlb_lock, flags);
446 static void
447 sync_single(struct device *hwdev, char *dma_addr, size_t size,
448 int dir, int target)
450 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
451 char *buffer = io_tlb_orig_addr[index];
453 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
455 switch (target) {
456 case SYNC_FOR_CPU:
457 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
458 memcpy(buffer, dma_addr, size);
459 else
460 BUG_ON(dir != DMA_TO_DEVICE);
461 break;
462 case SYNC_FOR_DEVICE:
463 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
464 memcpy(dma_addr, buffer, size);
465 else
466 BUG_ON(dir != DMA_FROM_DEVICE);
467 break;
468 default:
469 BUG();
473 void *
474 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
475 dma_addr_t *dma_handle, gfp_t flags)
477 dma_addr_t dev_addr;
478 void *ret;
479 int order = get_order(size);
482 * XXX fix me: the DMA API should pass us an explicit DMA mask
483 * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
484 * bit range instead of a 16MB one).
486 flags |= GFP_DMA;
488 ret = (void *)__get_free_pages(flags, order);
489 if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
491 * The allocated memory isn't reachable by the device.
492 * Fall back on swiotlb_map_single().
494 free_pages((unsigned long) ret, order);
495 ret = NULL;
497 if (!ret) {
499 * We are either out of memory or the device can't DMA
500 * to GFP_DMA memory; fall back on
501 * swiotlb_map_single(), which will grab memory from
502 * the lowest available address range.
504 dma_addr_t handle;
505 handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
506 if (swiotlb_dma_mapping_error(handle))
507 return NULL;
509 ret = bus_to_virt(handle);
512 memset(ret, 0, size);
513 dev_addr = virt_to_bus(ret);
515 /* Confirm address can be DMA'd by device */
516 if (address_needs_mapping(hwdev, dev_addr)) {
517 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
518 (unsigned long long)*hwdev->dma_mask,
519 (unsigned long long)dev_addr);
520 panic("swiotlb_alloc_coherent: allocated memory is out of "
521 "range for device");
523 *dma_handle = dev_addr;
524 return ret;
527 void
528 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
529 dma_addr_t dma_handle)
531 WARN_ON(irqs_disabled());
532 if (!(vaddr >= (void *)io_tlb_start
533 && vaddr < (void *)io_tlb_end))
534 free_pages((unsigned long) vaddr, get_order(size));
535 else
536 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
537 swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
540 static void
541 swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
544 * Ran out of IOMMU space for this operation. This is very bad.
545 * Unfortunately the drivers cannot handle this operation properly.
546 * unless they check for dma_mapping_error (most don't)
547 * When the mapping is small enough return a static buffer to limit
548 * the damage, or panic when the transfer is too big.
550 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
551 "device %s\n", size, dev ? dev->bus_id : "?");
553 if (size > io_tlb_overflow && do_panic) {
554 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
555 panic("DMA: Memory would be corrupted\n");
556 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
557 panic("DMA: Random memory would be DMAed\n");
562 * Map a single buffer of the indicated size for DMA in streaming mode. The
563 * physical address to use is returned.
565 * Once the device is given the dma address, the device owns this memory until
566 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
568 dma_addr_t
569 swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
571 dma_addr_t dev_addr = virt_to_bus(ptr);
572 void *map;
574 BUG_ON(dir == DMA_NONE);
576 * If the pointer passed in happens to be in the device's DMA window,
577 * we can safely return the device addr and not worry about bounce
578 * buffering it.
580 if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
581 return dev_addr;
584 * Oh well, have to allocate and map a bounce buffer.
586 map = map_single(hwdev, ptr, size, dir);
587 if (!map) {
588 swiotlb_full(hwdev, size, dir, 1);
589 map = io_tlb_overflow_buffer;
592 dev_addr = virt_to_bus(map);
595 * Ensure that the address returned is DMA'ble
597 if (address_needs_mapping(hwdev, dev_addr))
598 panic("map_single: bounce buffer is not DMA'ble");
600 return dev_addr;
604 * Unmap a single streaming mode DMA translation. The dma_addr and size must
605 * match what was provided for in a previous swiotlb_map_single call. All
606 * other usages are undefined.
608 * After this call, reads by the cpu to the buffer are guaranteed to see
609 * whatever the device wrote there.
611 void
612 swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
613 int dir)
615 char *dma_addr = bus_to_virt(dev_addr);
617 BUG_ON(dir == DMA_NONE);
618 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
619 unmap_single(hwdev, dma_addr, size, dir);
620 else if (dir == DMA_FROM_DEVICE)
621 dma_mark_clean(dma_addr, size);
625 * Make physical memory consistent for a single streaming mode DMA translation
626 * after a transfer.
628 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
629 * using the cpu, yet do not wish to teardown the dma mapping, you must
630 * call this function before doing so. At the next point you give the dma
631 * address back to the card, you must first perform a
632 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
634 static void
635 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
636 size_t size, int dir, int target)
638 char *dma_addr = bus_to_virt(dev_addr);
640 BUG_ON(dir == DMA_NONE);
641 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
642 sync_single(hwdev, dma_addr, size, dir, target);
643 else if (dir == DMA_FROM_DEVICE)
644 dma_mark_clean(dma_addr, size);
647 void
648 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
649 size_t size, int dir)
651 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
654 void
655 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
656 size_t size, int dir)
658 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
662 * Same as above, but for a sub-range of the mapping.
664 static void
665 swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
666 unsigned long offset, size_t size,
667 int dir, int target)
669 char *dma_addr = bus_to_virt(dev_addr) + offset;
671 BUG_ON(dir == DMA_NONE);
672 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
673 sync_single(hwdev, dma_addr, size, dir, target);
674 else if (dir == DMA_FROM_DEVICE)
675 dma_mark_clean(dma_addr, size);
678 void
679 swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
680 unsigned long offset, size_t size, int dir)
682 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
683 SYNC_FOR_CPU);
686 void
687 swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
688 unsigned long offset, size_t size, int dir)
690 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
691 SYNC_FOR_DEVICE);
695 * Map a set of buffers described by scatterlist in streaming mode for DMA.
696 * This is the scatter-gather version of the above swiotlb_map_single
697 * interface. Here the scatter gather list elements are each tagged with the
698 * appropriate dma address and length. They are obtained via
699 * sg_dma_{address,length}(SG).
701 * NOTE: An implementation may be able to use a smaller number of
702 * DMA address/length pairs than there are SG table elements.
703 * (for example via virtual mapping capabilities)
704 * The routine returns the number of addr/length pairs actually
705 * used, at most nents.
707 * Device ownership issues as mentioned above for swiotlb_map_single are the
708 * same here.
711 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
712 int dir)
714 struct scatterlist *sg;
715 void *addr;
716 dma_addr_t dev_addr;
717 int i;
719 BUG_ON(dir == DMA_NONE);
721 for_each_sg(sgl, sg, nelems, i) {
722 addr = SG_ENT_VIRT_ADDRESS(sg);
723 dev_addr = virt_to_bus(addr);
724 if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
725 void *map = map_single(hwdev, addr, sg->length, dir);
726 if (!map) {
727 /* Don't panic here, we expect map_sg users
728 to do proper error handling. */
729 swiotlb_full(hwdev, sg->length, dir, 0);
730 swiotlb_unmap_sg(hwdev, sgl, i, dir);
731 sgl[0].dma_length = 0;
732 return 0;
734 sg->dma_address = virt_to_bus(map);
735 } else
736 sg->dma_address = dev_addr;
737 sg->dma_length = sg->length;
739 return nelems;
743 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
744 * concerning calls here are the same as for swiotlb_unmap_single() above.
746 void
747 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
748 int dir)
750 struct scatterlist *sg;
751 int i;
753 BUG_ON(dir == DMA_NONE);
755 for_each_sg(sgl, sg, nelems, i) {
756 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
757 unmap_single(hwdev, bus_to_virt(sg->dma_address),
758 sg->dma_length, dir);
759 else if (dir == DMA_FROM_DEVICE)
760 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
765 * Make physical memory consistent for a set of streaming mode DMA translations
766 * after a transfer.
768 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
769 * and usage.
771 static void
772 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
773 int nelems, int dir, int target)
775 struct scatterlist *sg;
776 int i;
778 BUG_ON(dir == DMA_NONE);
780 for_each_sg(sgl, sg, nelems, i) {
781 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
782 sync_single(hwdev, bus_to_virt(sg->dma_address),
783 sg->dma_length, dir, target);
784 else if (dir == DMA_FROM_DEVICE)
785 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
789 void
790 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
791 int nelems, int dir)
793 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
796 void
797 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
798 int nelems, int dir)
800 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
804 swiotlb_dma_mapping_error(dma_addr_t dma_addr)
806 return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
810 * Return whether the given device DMA address mask can be supported
811 * properly. For example, if your device can only drive the low 24-bits
812 * during bus mastering, then you would pass 0x00ffffff as the mask to
813 * this function.
816 swiotlb_dma_supported(struct device *hwdev, u64 mask)
818 return virt_to_bus(io_tlb_end - 1) <= mask;
821 EXPORT_SYMBOL(swiotlb_map_single);
822 EXPORT_SYMBOL(swiotlb_unmap_single);
823 EXPORT_SYMBOL(swiotlb_map_sg);
824 EXPORT_SYMBOL(swiotlb_unmap_sg);
825 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
826 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
827 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
828 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
829 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
830 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
831 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
832 EXPORT_SYMBOL(swiotlb_alloc_coherent);
833 EXPORT_SYMBOL(swiotlb_free_coherent);
834 EXPORT_SYMBOL(swiotlb_dma_supported);