Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-x86 / numaq.h
blob38f710dc37f27aed38cdd71b7f2cbb37e1a72255
1 /*
2 * Written by: Patricia Gaughen, IBM Corporation
4 * Copyright (C) 2002, IBM Corp.
6 * All rights reserved.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16 * NON INFRINGEMENT. See the GNU General Public License for more
17 * details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * Send feedback to <gone@us.ibm.com>
26 #ifndef NUMAQ_H
27 #define NUMAQ_H
29 #ifdef CONFIG_X86_NUMAQ
31 extern int get_memcfg_numaq(void);
34 * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the
36 #define SYS_CFG_DATA_PRIV_ADDR 0x0009d000 /* place for scd in private quad space */
39 * Communication area for each processor on lynxer-processor tests.
41 * NOTE: If you change the size of this eachproc structure you need
42 * to change the definition for EACH_QUAD_SIZE.
44 struct eachquadmem {
45 unsigned int priv_mem_start; /* Starting address of this */
46 /* quad's private memory. */
47 /* This is always 0. */
48 /* In MB. */
49 unsigned int priv_mem_size; /* Size of this quad's */
50 /* private memory. */
51 /* In MB. */
52 unsigned int low_shrd_mem_strp_start;/* Starting address of this */
53 /* quad's low shared block */
54 /* (untranslated). */
55 /* In MB. */
56 unsigned int low_shrd_mem_start; /* Starting address of this */
57 /* quad's low shared memory */
58 /* (untranslated). */
59 /* In MB. */
60 unsigned int low_shrd_mem_size; /* Size of this quad's low */
61 /* shared memory. */
62 /* In MB. */
63 unsigned int lmmio_copb_start; /* Starting address of this */
64 /* quad's local memory */
65 /* mapped I/O in the */
66 /* compatibility OPB. */
67 /* In MB. */
68 unsigned int lmmio_copb_size; /* Size of this quad's local */
69 /* memory mapped I/O in the */
70 /* compatibility OPB. */
71 /* In MB. */
72 unsigned int lmmio_nopb_start; /* Starting address of this */
73 /* quad's local memory */
74 /* mapped I/O in the */
75 /* non-compatibility OPB. */
76 /* In MB. */
77 unsigned int lmmio_nopb_size; /* Size of this quad's local */
78 /* memory mapped I/O in the */
79 /* non-compatibility OPB. */
80 /* In MB. */
81 unsigned int io_apic_0_start; /* Starting address of I/O */
82 /* APIC 0. */
83 unsigned int io_apic_0_sz; /* Size I/O APIC 0. */
84 unsigned int io_apic_1_start; /* Starting address of I/O */
85 /* APIC 1. */
86 unsigned int io_apic_1_sz; /* Size I/O APIC 1. */
87 unsigned int hi_shrd_mem_start; /* Starting address of this */
88 /* quad's high shared memory.*/
89 /* In MB. */
90 unsigned int hi_shrd_mem_size; /* Size of this quad's high */
91 /* shared memory. */
92 /* In MB. */
93 unsigned int mps_table_addr; /* Address of this quad's */
94 /* MPS tables from BIOS, */
95 /* in system space.*/
96 unsigned int lcl_MDC_pio_addr; /* Port-I/O address for */
97 /* local access of MDC. */
98 unsigned int rmt_MDC_mmpio_addr; /* MM-Port-I/O address for */
99 /* remote access of MDC. */
100 unsigned int mm_port_io_start; /* Starting address of this */
101 /* quad's memory mapped Port */
102 /* I/O space. */
103 unsigned int mm_port_io_size; /* Size of this quad's memory*/
104 /* mapped Port I/O space. */
105 unsigned int mm_rmt_io_apic_start; /* Starting address of this */
106 /* quad's memory mapped */
107 /* remote I/O APIC space. */
108 unsigned int mm_rmt_io_apic_size; /* Size of this quad's memory*/
109 /* mapped remote I/O APIC */
110 /* space. */
111 unsigned int mm_isa_start; /* Starting address of this */
112 /* quad's memory mapped ISA */
113 /* space (contains MDC */
114 /* memory space). */
115 unsigned int mm_isa_size; /* Size of this quad's memory*/
116 /* mapped ISA space (contains*/
117 /* MDC memory space). */
118 unsigned int rmt_qmi_addr; /* Remote addr to access QMI.*/
119 unsigned int lcl_qmi_addr; /* Local addr to access QMI. */
123 * Note: This structure must be NOT be changed unless the multiproc and
124 * OS are changed to reflect the new structure.
126 struct sys_cfg_data {
127 unsigned int quad_id;
128 unsigned int bsp_proc_id; /* Boot Strap Processor in this quad. */
129 unsigned int scd_version; /* Version number of this table. */
130 unsigned int first_quad_id;
131 unsigned int quads_present31_0; /* 1 bit for each quad */
132 unsigned int quads_present63_32; /* 1 bit for each quad */
133 unsigned int config_flags;
134 unsigned int boot_flags;
135 unsigned int csr_start_addr; /* Absolute value (not in MB) */
136 unsigned int csr_size; /* Absolute value (not in MB) */
137 unsigned int lcl_apic_start_addr; /* Absolute value (not in MB) */
138 unsigned int lcl_apic_size; /* Absolute value (not in MB) */
139 unsigned int low_shrd_mem_base; /* 0 or 512MB or 1GB */
140 unsigned int low_shrd_mem_quad_offset; /* 0,128M,256M,512M,1G */
141 /* may not be totally populated */
142 unsigned int split_mem_enbl; /* 0 for no low shared memory */
143 unsigned int mmio_sz; /* Size of total system memory mapped I/O */
144 /* (in MB). */
145 unsigned int quad_spin_lock; /* Spare location used for quad */
146 /* bringup. */
147 unsigned int nonzero55; /* For checksumming. */
148 unsigned int nonzeroaa; /* For checksumming. */
149 unsigned int scd_magic_number;
150 unsigned int system_type;
151 unsigned int checksum;
153 * memory configuration area for each quad
155 struct eachquadmem eq[MAX_NUMNODES]; /* indexed by quad id */
158 static inline unsigned long *get_zholes_size(int nid)
160 return NULL;
162 #endif /* CONFIG_X86_NUMAQ */
163 #endif /* NUMAQ_H */