Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-sparc / memreg.h
blob5fb95c828da6760582fe95f93ff5ddf683fc73c7
1 /* $Id: memreg.h,v 1.8 1996/08/29 09:48:23 davem Exp $ */
2 #ifndef _SPARC_MEMREG_H
3 #define _SPARC_MEMREG_H
4 /* memreg.h: Definitions of the values found in the synchronous
5 * and asynchronous memory error registers when a fault
6 * occurs on the sun4c.
8 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
9 */
11 /* First the synchronous error codes, these are usually just
12 * normal page faults.
15 #define SUN4C_SYNC_WDRESET 0x0001 /* watchdog reset */
16 #define SUN4C_SYNC_SIZE 0x0002 /* bad access size? whuz this? */
17 #define SUN4C_SYNC_PARITY 0x0008 /* bad ram chips caused a parity error */
18 #define SUN4C_SYNC_SBUS 0x0010 /* the SBUS had some problems... */
19 #define SUN4C_SYNC_NOMEM 0x0020 /* translation to non-existent ram */
20 #define SUN4C_SYNC_PROT 0x0040 /* access violated pte protections */
21 #define SUN4C_SYNC_NPRESENT 0x0080 /* pte said that page was not present */
22 #define SUN4C_SYNC_BADWRITE 0x8000 /* while writing something went bogus */
24 #define SUN4C_SYNC_BOLIXED \
25 (SUN4C_SYNC_WDRESET | SUN4C_SYNC_SIZE | SUN4C_SYNC_SBUS | \
26 SUN4C_SYNC_NOMEM | SUN4C_SYNC_PARITY)
28 /* Now the asynchronous error codes, these are almost always produced
29 * by the cache writing things back to memory and getting a bad translation.
30 * Bad DVMA transactions can cause these faults too.
33 #define SUN4C_ASYNC_BADDVMA 0x0010 /* error during DVMA access */
34 #define SUN4C_ASYNC_NOMEM 0x0020 /* write back pointed to bad phys addr */
35 #define SUN4C_ASYNC_BADWB 0x0080 /* write back points to non-present page */
37 /* Memory parity error register with associated bit constants. */
38 #ifndef __ASSEMBLY__
39 extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;
40 #endif
42 #define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */
43 #define SUN4C_MPE_MULTI 0x40 /* Multiple parity errors detected. (ro) */
44 #define SUN4C_MPE_TEST 0x20 /* Write inverse parity. (rw) */
45 #define SUN4C_MPE_CHECK 0x10 /* Enable parity checking. (rw) */
46 #define SUN4C_MPE_ERR00 0x08 /* Parity error in bits 0-7. (ro) */
47 #define SUN4C_MPE_ERR08 0x04 /* Parity error in bits 8-15. (ro) */
48 #define SUN4C_MPE_ERR16 0x02 /* Parity error in bits 16-23. (ro) */
49 #define SUN4C_MPE_ERR24 0x01 /* Parity error in bits 24-31. (ro) */
50 #define SUN4C_MPE_ERRS 0x0F /* Bit mask for the error bits. (ro) */
52 #endif /* !(_SPARC_MEMREG_H) */