Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-mn10300 / unit-asb2303 / timex.h
blob7e54b0cfdd0371d225d3ce639bb4fe7b0b660df4
1 /* ASB2303-specific timer specifcations
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
11 #ifndef _ASM_UNIT_TIMEX_H
12 #define _ASM_UNIT_TIMEX_H
14 #ifndef __ASSEMBLY__
15 #include <linux/irq.h>
16 #endif /* __ASSEMBLY__ */
18 #include <asm/timer-regs.h>
19 #include <asm/unit/clock.h>
22 * jiffies counter specifications
25 #define TMJCBR_MAX 0xffff
26 #define TMJCBC TM01BC
28 #define TMJCMD TM01MD
29 #define TMJCBR TM01BR
30 #define TMJCIRQ TM1IRQ
31 #define TMJCICR TM1ICR
32 #define TMJCICR_LEVEL GxICR_LEVEL_5
34 #ifndef __ASSEMBLY__
36 static inline void startup_jiffies_counter(void)
38 unsigned rate;
39 u16 md, t16;
41 /* use as little prescaling as possible to avoid losing accuracy */
42 md = TM0MD_SRC_IOCLK;
43 rate = MN10300_JCCLK / HZ;
45 if (rate > TMJCBR_MAX) {
46 md = TM0MD_SRC_IOCLK_8;
47 rate = MN10300_JCCLK / 8 / HZ;
49 if (rate > TMJCBR_MAX) {
50 md = TM0MD_SRC_IOCLK_32;
51 rate = MN10300_JCCLK / 32 / HZ;
53 if (rate > TMJCBR_MAX)
54 BUG();
58 TMJCBR = rate - 1;
59 t16 = TMJCBR;
61 TMJCMD =
62 md |
63 TM1MD_SRC_TM0CASCADE << 8 |
64 TM0MD_INIT_COUNTER |
65 TM1MD_INIT_COUNTER << 8;
67 TMJCMD =
68 md |
69 TM1MD_SRC_TM0CASCADE << 8 |
70 TM0MD_COUNT_ENABLE |
71 TM1MD_COUNT_ENABLE << 8;
73 t16 = TMJCMD;
75 TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
76 t16 = TMJCICR;
79 static inline void shutdown_jiffies_counter(void)
83 #endif /* !__ASSEMBLY__ */
87 * timestamp counter specifications
90 #define TMTSCBR_MAX 0xffffffff
91 #define TMTSCBC TM45BC
93 #ifndef __ASSEMBLY__
95 static inline void startup_timestamp_counter(void)
97 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
98 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
100 TM45BR = TMTSCBR_MAX;
102 TM4MD = TM4MD_SRC_IOCLK;
103 TM4MD |= TM4MD_INIT_COUNTER;
104 TM4MD &= ~TM4MD_INIT_COUNTER;
105 TM4ICR = 0;
107 TM5MD = TM5MD_SRC_TM4CASCADE;
108 TM5MD |= TM5MD_INIT_COUNTER;
109 TM5MD &= ~TM5MD_INIT_COUNTER;
110 TM5ICR = 0;
112 TM5MD |= TM5MD_COUNT_ENABLE;
113 TM4MD |= TM4MD_COUNT_ENABLE;
116 static inline void shutdown_timestamp_counter(void)
118 TM4MD = 0;
119 TM5MD = 0;
123 * we use a cascaded pair of 16-bit down-counting timers to count I/O
124 * clock cycles for the purposes of time keeping
126 typedef unsigned long cycles_t;
128 static inline cycles_t read_timestamp_counter(void)
130 return (cycles_t)TMTSCBC;
133 #endif /* !__ASSEMBLY__ */
135 #endif /* _ASM_UNIT_TIMEX_H */