Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-frv / dma-mapping.h
blob2e8966ca030d46cd4b7514a3a0c4589aeba667b7
1 #ifndef _ASM_DMA_MAPPING_H
2 #define _ASM_DMA_MAPPING_H
4 #include <linux/device.h>
5 #include <asm/cache.h>
6 #include <asm/cacheflush.h>
7 #include <asm/scatterlist.h>
8 #include <asm/io.h>
10 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
11 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
13 extern unsigned long __nongprelbss dma_coherent_mem_start;
14 extern unsigned long __nongprelbss dma_coherent_mem_end;
16 void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp);
17 void dma_free_coherent(struct device *dev, size_t size, void *vaddr, dma_addr_t dma_handle);
20 * Map a single buffer of the indicated size for DMA in streaming mode.
21 * The 32-bit bus address to use is returned.
23 * Once the device is given the dma address, the device owns this memory
24 * until either pci_unmap_single or pci_dma_sync_single is performed.
26 extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
27 enum dma_data_direction direction);
30 * Unmap a single streaming mode DMA translation. The dma_addr and size
31 * must match what was provided for in a previous pci_map_single call. All
32 * other usages are undefined.
34 * After this call, reads by the cpu to the buffer are guarenteed to see
35 * whatever the device wrote there.
37 static inline
38 void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
39 enum dma_data_direction direction)
41 BUG_ON(direction == DMA_NONE);
45 * Map a set of buffers described by scatterlist in streaming
46 * mode for DMA. This is the scather-gather version of the
47 * above pci_map_single interface. Here the scatter gather list
48 * elements are each tagged with the appropriate dma address
49 * and length. They are obtained via sg_dma_{address,length}(SG).
51 * NOTE: An implementation may be able to use a smaller number of
52 * DMA address/length pairs than there are SG table elements.
53 * (for example via virtual mapping capabilities)
54 * The routine returns the number of addr/length pairs actually
55 * used, at most nents.
57 * Device ownership issues as mentioned above for pci_map_single are
58 * the same here.
60 extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
61 enum dma_data_direction direction);
64 * Unmap a set of streaming mode DMA translations.
65 * Again, cpu read rules concerning calls here are the same as for
66 * pci_unmap_single() above.
68 static inline
69 void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
70 enum dma_data_direction direction)
72 BUG_ON(direction == DMA_NONE);
75 extern
76 dma_addr_t dma_map_page(struct device *dev, struct page *page, unsigned long offset,
77 size_t size, enum dma_data_direction direction);
79 static inline
80 void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
81 enum dma_data_direction direction)
83 BUG_ON(direction == DMA_NONE);
87 static inline
88 void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
89 enum dma_data_direction direction)
93 static inline
94 void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
95 enum dma_data_direction direction)
97 flush_write_buffers();
100 static inline
101 void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
102 unsigned long offset, size_t size,
103 enum dma_data_direction direction)
107 static inline
108 void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
109 unsigned long offset, size_t size,
110 enum dma_data_direction direction)
112 flush_write_buffers();
115 static inline
116 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
117 enum dma_data_direction direction)
121 static inline
122 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
123 enum dma_data_direction direction)
125 flush_write_buffers();
128 static inline
129 int dma_mapping_error(dma_addr_t dma_addr)
131 return 0;
134 static inline
135 int dma_supported(struct device *dev, u64 mask)
138 * we fall back to GFP_DMA when the mask isn't all 1s,
139 * so we can't guarantee allocations that must be
140 * within a tighter range than GFP_DMA..
142 if (mask < 0x00ffffff)
143 return 0;
145 return 1;
148 static inline
149 int dma_set_mask(struct device *dev, u64 mask)
151 if (!dev->dma_mask || !dma_supported(dev, mask))
152 return -EIO;
154 *dev->dma_mask = mask;
156 return 0;
159 static inline
160 int dma_get_cache_alignment(void)
162 return 1 << L1_CACHE_SHIFT;
165 #define dma_is_consistent(d, h) (1)
167 static inline
168 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
169 enum dma_data_direction direction)
171 flush_write_buffers();
174 #endif /* _ASM_DMA_MAPPING_H */