Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-cris / arch-v32 / mach-a3 / hwregs / strmux_defs.h
blob14f718a4ecc36b1821cb82c5f3c72c64c6bca54b
1 #ifndef __strmux_defs_h
2 #define __strmux_defs_h
4 /*
5 * This file is autogenerated from
6 * file: strmux.r
7 *
8 * by ../../../tools/rdesc/bin/rdes2c -outfile strmux_defs.h strmux.r
9 * Any changes here will be lost.
11 * -*- buffer-read-only: t -*-
13 /* Main access macros */
14 #ifndef REG_RD
15 #define REG_RD( scope, inst, reg ) \
16 REG_READ( reg_##scope##_##reg, \
17 (inst) + REG_RD_ADDR_##scope##_##reg )
18 #endif
20 #ifndef REG_WR
21 #define REG_WR( scope, inst, reg, val ) \
22 REG_WRITE( reg_##scope##_##reg, \
23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
24 #endif
26 #ifndef REG_RD_VECT
27 #define REG_RD_VECT( scope, inst, reg, index ) \
28 REG_READ( reg_##scope##_##reg, \
29 (inst) + REG_RD_ADDR_##scope##_##reg + \
30 (index) * STRIDE_##scope##_##reg )
31 #endif
33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \
35 REG_WRITE( reg_##scope##_##reg, \
36 (inst) + REG_WR_ADDR_##scope##_##reg + \
37 (index) * STRIDE_##scope##_##reg, (val) )
38 #endif
40 #ifndef REG_RD_INT
41 #define REG_RD_INT( scope, inst, reg ) \
42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
43 #endif
45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \
47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
48 #endif
50 #ifndef REG_RD_INT_VECT
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
53 (index) * STRIDE_##scope##_##reg )
54 #endif
56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
59 (index) * STRIDE_##scope##_##reg, (val) )
60 #endif
62 #ifndef REG_TYPE_CONV
63 #define REG_TYPE_CONV( type, orgtype, val ) \
64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
65 #endif
67 #ifndef reg_page_size
68 #define reg_page_size 8192
69 #endif
71 #ifndef REG_ADDR
72 #define REG_ADDR( scope, inst, reg ) \
73 ( (inst) + REG_RD_ADDR_##scope##_##reg )
74 #endif
76 #ifndef REG_ADDR_VECT
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \
78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
79 (index) * STRIDE_##scope##_##reg )
80 #endif
82 /* C-code for register scope strmux */
84 /* Register rw_cfg, scope strmux, type rw */
85 typedef struct {
86 unsigned int dma0 : 2;
87 unsigned int dma1 : 2;
88 unsigned int dma2 : 2;
89 unsigned int dma3 : 2;
90 unsigned int dma4 : 2;
91 unsigned int dma5 : 2;
92 unsigned int dma6 : 2;
93 unsigned int dma7 : 2;
94 unsigned int dummy1 : 2;
95 unsigned int dma9 : 2;
96 unsigned int dummy2 : 2;
97 unsigned int dma11 : 2;
98 unsigned int dummy3 : 8;
99 } reg_strmux_rw_cfg;
100 #define REG_RD_ADDR_strmux_rw_cfg 0
101 #define REG_WR_ADDR_strmux_rw_cfg 0
104 /* Constants */
105 enum {
106 regk_strmux_eth = 0x00000001,
107 regk_strmux_h264 = 0x00000001,
108 regk_strmux_iop = 0x00000001,
109 regk_strmux_jpeg = 0x00000001,
110 regk_strmux_off = 0x00000000,
111 regk_strmux_rw_cfg_default = 0x00000000,
112 regk_strmux_ser0 = 0x00000002,
113 regk_strmux_ser1 = 0x00000002,
114 regk_strmux_ser2 = 0x00000002,
115 regk_strmux_ser3 = 0x00000002,
116 regk_strmux_ser4 = 0x00000002,
117 regk_strmux_sser = 0x00000001,
118 regk_strmux_strcop = 0x00000001
120 #endif /* __strmux_defs_h */