Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-cris / arch-v32 / hwregs / iop / iop_version_defs.h
blobb8d6a910c71cf053ff3d9fa0d5d67b521911ab4a
1 #ifndef __iop_version_defs_h
2 #define __iop_version_defs_h
4 /*
5 * This file is autogenerated from
6 * file: ../../inst/io_proc/rtl/guinness/iop_version.r
7 * id: iop_version.r,v 1.3 2004/04/22 12:37:54 jonaso Exp
8 * last modfied: Mon Apr 11 16:08:44 2005
10 * by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_version_defs.h ../../inst/io_proc/rtl/guinness/iop_version.r
11 * id: $Id: iop_version_defs.h,v 1.4 2005/04/24 18:31:05 starvik Exp $
12 * Any changes here will be lost.
14 * -*- buffer-read-only: t -*-
16 /* Main access macros */
17 #ifndef REG_RD
18 #define REG_RD( scope, inst, reg ) \
19 REG_READ( reg_##scope##_##reg, \
20 (inst) + REG_RD_ADDR_##scope##_##reg )
21 #endif
23 #ifndef REG_WR
24 #define REG_WR( scope, inst, reg, val ) \
25 REG_WRITE( reg_##scope##_##reg, \
26 (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27 #endif
29 #ifndef REG_RD_VECT
30 #define REG_RD_VECT( scope, inst, reg, index ) \
31 REG_READ( reg_##scope##_##reg, \
32 (inst) + REG_RD_ADDR_##scope##_##reg + \
33 (index) * STRIDE_##scope##_##reg )
34 #endif
36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \
38 REG_WRITE( reg_##scope##_##reg, \
39 (inst) + REG_WR_ADDR_##scope##_##reg + \
40 (index) * STRIDE_##scope##_##reg, (val) )
41 #endif
43 #ifndef REG_RD_INT
44 #define REG_RD_INT( scope, inst, reg ) \
45 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46 #endif
48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \
50 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51 #endif
53 #ifndef REG_RD_INT_VECT
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
55 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56 (index) * STRIDE_##scope##_##reg )
57 #endif
59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62 (index) * STRIDE_##scope##_##reg, (val) )
63 #endif
65 #ifndef REG_TYPE_CONV
66 #define REG_TYPE_CONV( type, orgtype, val ) \
67 ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68 #endif
70 #ifndef reg_page_size
71 #define reg_page_size 8192
72 #endif
74 #ifndef REG_ADDR
75 #define REG_ADDR( scope, inst, reg ) \
76 ( (inst) + REG_RD_ADDR_##scope##_##reg )
77 #endif
79 #ifndef REG_ADDR_VECT
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \
81 ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82 (index) * STRIDE_##scope##_##reg )
83 #endif
85 /* C-code for register scope iop_version */
87 /* Register r_version, scope iop_version, type r */
88 typedef struct {
89 unsigned int nr : 8;
90 unsigned int dummy1 : 24;
91 } reg_iop_version_r_version;
92 #define REG_RD_ADDR_iop_version_r_version 0
95 /* Constants */
96 enum {
97 regk_iop_version_v1_0 = 0x00000001
99 #endif /* __iop_version_defs_h */