Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-cris / arch-v32 / hwregs / iop / asm / iop_scrc_out_defs_asm.h
blob640a25725f209305b30f9a510c2609b85e956aca
1 #ifndef __iop_scrc_out_defs_asm_h
2 #define __iop_scrc_out_defs_asm_h
4 /*
5 * This file is autogenerated from
6 * file: ../../inst/io_proc/rtl/iop_scrc_out.r
7 * id: iop_scrc_out.r,v 1.11 2005/02/16 09:13:38 niklaspa Exp
8 * last modfied: Mon Apr 11 16:08:46 2005
10 * by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/iop_scrc_out_defs_asm.h ../../inst/io_proc/rtl/iop_scrc_out.r
11 * id: $Id: iop_scrc_out_defs_asm.h,v 1.5 2005/04/24 18:31:06 starvik Exp $
12 * Any changes here will be lost.
14 * -*- buffer-read-only: t -*-
17 #ifndef REG_FIELD
18 #define REG_FIELD( scope, reg, field, value ) \
19 REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
20 #define REG_FIELD_X_( value, shift ) ((value) << shift)
21 #endif
23 #ifndef REG_STATE
24 #define REG_STATE( scope, reg, field, symbolic_value ) \
25 REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
26 #define REG_STATE_X_( k, shift ) (k << shift)
27 #endif
29 #ifndef REG_MASK
30 #define REG_MASK( scope, reg, field ) \
31 REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
32 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
33 #endif
35 #ifndef REG_LSB
36 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
37 #endif
39 #ifndef REG_BIT
40 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
41 #endif
43 #ifndef REG_ADDR
44 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
45 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
46 #endif
48 #ifndef REG_ADDR_VECT
49 #define REG_ADDR_VECT( scope, inst, reg, index ) \
50 REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
51 STRIDE_##scope##_##reg )
52 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
53 ((inst) + offs + (index) * stride)
54 #endif
56 /* Register rw_cfg, scope iop_scrc_out, type rw */
57 #define reg_iop_scrc_out_rw_cfg___trig___lsb 0
58 #define reg_iop_scrc_out_rw_cfg___trig___width 2
59 #define reg_iop_scrc_out_rw_cfg___inv_crc___lsb 2
60 #define reg_iop_scrc_out_rw_cfg___inv_crc___width 1
61 #define reg_iop_scrc_out_rw_cfg___inv_crc___bit 2
62 #define reg_iop_scrc_out_rw_cfg_offset 0
64 /* Register rw_ctrl, scope iop_scrc_out, type rw */
65 #define reg_iop_scrc_out_rw_ctrl___strb_src___lsb 0
66 #define reg_iop_scrc_out_rw_ctrl___strb_src___width 1
67 #define reg_iop_scrc_out_rw_ctrl___strb_src___bit 0
68 #define reg_iop_scrc_out_rw_ctrl___out_src___lsb 1
69 #define reg_iop_scrc_out_rw_ctrl___out_src___width 1
70 #define reg_iop_scrc_out_rw_ctrl___out_src___bit 1
71 #define reg_iop_scrc_out_rw_ctrl_offset 4
73 /* Register rw_init_crc, scope iop_scrc_out, type rw */
74 #define reg_iop_scrc_out_rw_init_crc_offset 8
76 /* Register rw_crc, scope iop_scrc_out, type rw */
77 #define reg_iop_scrc_out_rw_crc_offset 12
79 /* Register rw_data, scope iop_scrc_out, type rw */
80 #define reg_iop_scrc_out_rw_data___val___lsb 0
81 #define reg_iop_scrc_out_rw_data___val___width 1
82 #define reg_iop_scrc_out_rw_data___val___bit 0
83 #define reg_iop_scrc_out_rw_data_offset 16
85 /* Register r_computed_crc, scope iop_scrc_out, type r */
86 #define reg_iop_scrc_out_r_computed_crc_offset 20
89 /* Constants */
90 #define regk_iop_scrc_out_crc 0x00000001
91 #define regk_iop_scrc_out_data 0x00000000
92 #define regk_iop_scrc_out_dif 0x00000001
93 #define regk_iop_scrc_out_hi 0x00000000
94 #define regk_iop_scrc_out_neg 0x00000002
95 #define regk_iop_scrc_out_no 0x00000000
96 #define regk_iop_scrc_out_pos 0x00000001
97 #define regk_iop_scrc_out_pos_neg 0x00000003
98 #define regk_iop_scrc_out_reg 0x00000000
99 #define regk_iop_scrc_out_rw_cfg_default 0x00000000
100 #define regk_iop_scrc_out_rw_crc_default 0x00000000
101 #define regk_iop_scrc_out_rw_ctrl_default 0x00000000
102 #define regk_iop_scrc_out_rw_data_default 0x00000000
103 #define regk_iop_scrc_out_rw_init_crc_default 0x00000000
104 #define regk_iop_scrc_out_yes 0x00000001
105 #endif /* __iop_scrc_out_defs_asm_h */