Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-arm / plat-s3c / regs-rtc.h
blob93b03c49710a561783ef47d1742ba1678d78d4f7
1 /* linux/include/asm-arm/arch-s3c2410/regs-rtc.h
3 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * S3C2410 Internal RTC register definition
13 #ifndef __ASM_ARCH_REGS_RTC_H
14 #define __ASM_ARCH_REGS_RTC_H __FILE__
16 #define S3C2410_RTCREG(x) (x)
18 #define S3C2410_RTCCON S3C2410_RTCREG(0x40)
19 #define S3C2410_RTCCON_RTCEN (1<<0)
20 #define S3C2410_RTCCON_CLKSEL (1<<1)
21 #define S3C2410_RTCCON_CNTSEL (1<<2)
22 #define S3C2410_RTCCON_CLKRST (1<<3)
24 #define S3C2410_TICNT S3C2410_RTCREG(0x44)
25 #define S3C2410_TICNT_ENABLE (1<<7)
27 #define S3C2410_RTCALM S3C2410_RTCREG(0x50)
28 #define S3C2410_RTCALM_ALMEN (1<<6)
29 #define S3C2410_RTCALM_YEAREN (1<<5)
30 #define S3C2410_RTCALM_MONEN (1<<4)
31 #define S3C2410_RTCALM_DAYEN (1<<3)
32 #define S3C2410_RTCALM_HOUREN (1<<2)
33 #define S3C2410_RTCALM_MINEN (1<<1)
34 #define S3C2410_RTCALM_SECEN (1<<0)
36 #define S3C2410_RTCALM_ALL \
37 S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
38 S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
39 S3C2410_RTCALM_SECEN
42 #define S3C2410_ALMSEC S3C2410_RTCREG(0x54)
43 #define S3C2410_ALMMIN S3C2410_RTCREG(0x58)
44 #define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c)
46 #define S3C2410_ALMDATE S3C2410_RTCREG(0x60)
47 #define S3C2410_ALMMON S3C2410_RTCREG(0x64)
48 #define S3C2410_ALMYEAR S3C2410_RTCREG(0x68)
50 #define S3C2410_RTCRST S3C2410_RTCREG(0x6c)
52 #define S3C2410_RTCSEC S3C2410_RTCREG(0x70)
53 #define S3C2410_RTCMIN S3C2410_RTCREG(0x74)
54 #define S3C2410_RTCHOUR S3C2410_RTCREG(0x78)
55 #define S3C2410_RTCDATE S3C2410_RTCREG(0x7c)
56 #define S3C2410_RTCDAY S3C2410_RTCREG(0x80)
57 #define S3C2410_RTCMON S3C2410_RTCREG(0x84)
58 #define S3C2410_RTCYEAR S3C2410_RTCREG(0x88)
61 #endif /* __ASM_ARCH_REGS_RTC_H */