Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-arm / arch-s3c2410 / regs-power.h
blob13d13b7cfe98165473a74b02fd8d0e868452c2b7
1 /* linux/include/asm-arm/arch-s3c2410/regs-power.h
3 * Copyright (c) 2003,2004,2005,2006 Simtec Electronics <linux@simtec.co.uk>
4 * http://armlinux.simtec.co.uk/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * S3C24XX power control register definitions
13 #ifndef __ASM_ARM_REGS_PWR
14 #define __ASM_ARM_REGS_PWR __FILE__
16 #define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR)
18 #define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20)
19 #define S3C2412_PWRCFG S3C24XX_PWRREG(0x24)
21 #define S3C2412_INFORM0 S3C24XX_PWRREG(0x70)
22 #define S3C2412_INFORM1 S3C24XX_PWRREG(0x74)
23 #define S3C2412_INFORM2 S3C24XX_PWRREG(0x78)
24 #define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C)
26 #define S3C2412_PWRCFG_BATF_IRQ (1<<0)
27 #define S3C2412_PWRCFG_BATF_IGNORE (2<<0)
28 #define S3C2412_PWRCFG_BATF_SLEEP (3<<0)
29 #define S3C2412_PWRCFG_BATF_MASK (3<<0)
31 #define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0<<6)
32 #define S3C2412_PWRCFG_STANDBYWFI_IDLE (1<<6)
33 #define S3C2412_PWRCFG_STANDBYWFI_STOP (2<<6)
34 #define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3<<6)
35 #define S3C2412_PWRCFG_STANDBYWFI_MASK (3<<6)
37 #define S3C2412_PWRCFG_RTC_MASKIRQ (1<<8)
38 #define S3C2412_PWRCFG_NAND_NORST (1<<9)
40 #endif /* __ASM_ARM_REGS_PWR */