Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / include / asm-arm / arch-l7200 / time.h
blobea22f7fff9cd7131401fa67695486dea82d4e6bc
1 /*
2 * linux/include/asm-arm/arch-l7200/time.h
4 * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net)
5 * Steve Hill (sjhill@cotw.com)
7 * Changelog:
8 * 01-02-2000 RS Created l7200 version, derived from rpc code
9 * 05-03-2000 SJH Complete rewrite
11 #ifndef _ASM_ARCH_TIME_H
12 #define _ASM_ARCH_TIME_H
14 #include <asm/arch/irqs.h>
17 * RTC base register address
19 #define RTC_BASE (IO_BASE_2 + 0x2000)
22 * RTC registers
24 #define RTC_RTCDR (*(volatile unsigned char *) (RTC_BASE + 0x000))
25 #define RTC_RTCMR (*(volatile unsigned char *) (RTC_BASE + 0x004))
26 #define RTC_RTCS (*(volatile unsigned char *) (RTC_BASE + 0x008))
27 #define RTC_RTCC (*(volatile unsigned char *) (RTC_BASE + 0x008))
28 #define RTC_RTCDV (*(volatile unsigned char *) (RTC_BASE + 0x00c))
29 #define RTC_RTCCR (*(volatile unsigned char *) (RTC_BASE + 0x010))
32 * RTCCR register values
34 #define RTC_RATE_32 0x00 /* 32 Hz tick */
35 #define RTC_RATE_64 0x10 /* 64 Hz tick */
36 #define RTC_RATE_128 0x20 /* 128 Hz tick */
37 #define RTC_RATE_256 0x30 /* 256 Hz tick */
38 #define RTC_EN_ALARM 0x01 /* Enable alarm */
39 #define RTC_EN_TIC 0x04 /* Enable counter */
40 #define RTC_EN_STWDOG 0x08 /* Enable watchdog */
43 * Handler for RTC timer interrupt
45 static irqreturn_t
46 timer_interrupt(int irq, void *dev_id)
48 struct pt_regs *regs = get_irq_regs();
49 do_timer(1);
50 #ifndef CONFIG_SMP
51 update_process_times(user_mode(regs));
52 #endif
53 do_profile(regs);
54 RTC_RTCC = 0; /* Clear interrupt */
56 return IRQ_HANDLED;
60 * Set up RTC timer interrupt, and return the current time in seconds.
62 void __init time_init(void)
64 RTC_RTCC = 0; /* Clear interrupt */
66 timer_irq.handler = timer_interrupt;
68 setup_irq(IRQ_RTC_TICK, &timer_irq);
70 RTC_RTCCR = RTC_RATE_128 | RTC_EN_TIC; /* Set rate and enable timer */
73 #endif