Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / watchdog / davinci_wdt.c
blob1782c79eff0646ad9b2aa5b4eb63b36e100d2cca
1 /*
2 * drivers/char/watchdog/davinci_wdt.c
4 * Watchdog driver for DaVinci DM644x/DM646x processors
6 * Copyright (C) 2006 Texas Instruments.
8 * 2007 (c) MontaVista Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/fs.h>
19 #include <linux/miscdevice.h>
20 #include <linux/watchdog.h>
21 #include <linux/init.h>
22 #include <linux/bitops.h>
23 #include <linux/platform_device.h>
24 #include <linux/spinlock.h>
26 #include <asm/hardware.h>
27 #include <asm/uaccess.h>
28 #include <asm/io.h>
30 #define MODULE_NAME "DAVINCI-WDT: "
32 #define DEFAULT_HEARTBEAT 60
33 #define MAX_HEARTBEAT 600 /* really the max margin is 264/27MHz*/
35 /* Timer register set definition */
36 #define PID12 (0x0)
37 #define EMUMGT (0x4)
38 #define TIM12 (0x10)
39 #define TIM34 (0x14)
40 #define PRD12 (0x18)
41 #define PRD34 (0x1C)
42 #define TCR (0x20)
43 #define TGCR (0x24)
44 #define WDTCR (0x28)
46 /* TCR bit definitions */
47 #define ENAMODE12_DISABLED (0 << 6)
48 #define ENAMODE12_ONESHOT (1 << 6)
49 #define ENAMODE12_PERIODIC (2 << 6)
51 /* TGCR bit definitions */
52 #define TIM12RS_UNRESET (1 << 0)
53 #define TIM34RS_UNRESET (1 << 1)
54 #define TIMMODE_64BIT_WDOG (2 << 2)
56 /* WDTCR bit definitions */
57 #define WDEN (1 << 14)
58 #define WDFLAG (1 << 15)
59 #define WDKEY_SEQ0 (0xa5c6 << 16)
60 #define WDKEY_SEQ1 (0xda7e << 16)
62 static int heartbeat = DEFAULT_HEARTBEAT;
64 static DEFINE_SPINLOCK(io_lock);
65 static unsigned long wdt_status;
66 #define WDT_IN_USE 0
67 #define WDT_OK_TO_CLOSE 1
68 #define WDT_REGION_INITED 2
69 #define WDT_DEVICE_INITED 3
71 static struct resource *wdt_mem;
72 static void __iomem *wdt_base;
74 static void wdt_service(void)
76 spin_lock(&io_lock);
78 /* put watchdog in service state */
79 davinci_writel(WDKEY_SEQ0, wdt_base + WDTCR);
80 /* put watchdog in active state */
81 davinci_writel(WDKEY_SEQ1, wdt_base + WDTCR);
83 spin_unlock(&io_lock);
86 static void wdt_enable(void)
88 u32 tgcr;
89 u32 timer_margin;
91 spin_lock(&io_lock);
93 /* disable, internal clock source */
94 davinci_writel(0, wdt_base + TCR);
95 /* reset timer, set mode to 64-bit watchdog, and unreset */
96 davinci_writel(0, wdt_base + TGCR);
97 tgcr = TIMMODE_64BIT_WDOG | TIM12RS_UNRESET | TIM34RS_UNRESET;
98 davinci_writel(tgcr, wdt_base + TGCR);
99 /* clear counter regs */
100 davinci_writel(0, wdt_base + TIM12);
101 davinci_writel(0, wdt_base + TIM34);
102 /* set timeout period */
103 timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) & 0xffffffff);
104 davinci_writel(timer_margin, wdt_base + PRD12);
105 timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) >> 32);
106 davinci_writel(timer_margin, wdt_base + PRD34);
107 /* enable run continuously */
108 davinci_writel(ENAMODE12_PERIODIC, wdt_base + TCR);
109 /* Once the WDT is in pre-active state write to
110 * TIM12, TIM34, PRD12, PRD34, TCR, TGCR, WDTCR are
111 * write protected (except for the WDKEY field)
113 /* put watchdog in pre-active state */
114 davinci_writel(WDKEY_SEQ0 | WDEN, wdt_base + WDTCR);
115 /* put watchdog in active state */
116 davinci_writel(WDKEY_SEQ1 | WDEN, wdt_base + WDTCR);
118 spin_unlock(&io_lock);
121 static int davinci_wdt_open(struct inode *inode, struct file *file)
123 if (test_and_set_bit(WDT_IN_USE, &wdt_status))
124 return -EBUSY;
126 wdt_enable();
128 return nonseekable_open(inode, file);
131 static ssize_t
132 davinci_wdt_write(struct file *file, const char *data, size_t len,
133 loff_t *ppos)
135 if (len)
136 wdt_service();
138 return len;
141 static struct watchdog_info ident = {
142 .options = WDIOF_KEEPALIVEPING,
143 .identity = "DaVinci Watchdog",
146 static int
147 davinci_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
148 unsigned long arg)
150 int ret = -ENOTTY;
152 switch (cmd) {
153 case WDIOC_GETSUPPORT:
154 ret = copy_to_user((struct watchdog_info *)arg, &ident,
155 sizeof(ident)) ? -EFAULT : 0;
156 break;
158 case WDIOC_GETSTATUS:
159 case WDIOC_GETBOOTSTATUS:
160 ret = put_user(0, (int *)arg);
161 break;
163 case WDIOC_GETTIMEOUT:
164 ret = put_user(heartbeat, (int *)arg);
165 break;
167 case WDIOC_KEEPALIVE:
168 wdt_service();
169 ret = 0;
170 break;
172 return ret;
175 static int davinci_wdt_release(struct inode *inode, struct file *file)
177 wdt_service();
178 clear_bit(WDT_IN_USE, &wdt_status);
180 return 0;
183 static const struct file_operations davinci_wdt_fops = {
184 .owner = THIS_MODULE,
185 .llseek = no_llseek,
186 .write = davinci_wdt_write,
187 .ioctl = davinci_wdt_ioctl,
188 .open = davinci_wdt_open,
189 .release = davinci_wdt_release,
192 static struct miscdevice davinci_wdt_miscdev = {
193 .minor = WATCHDOG_MINOR,
194 .name = "watchdog",
195 .fops = &davinci_wdt_fops,
198 static int davinci_wdt_probe(struct platform_device *pdev)
200 int ret = 0, size;
201 struct resource *res;
203 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
204 heartbeat = DEFAULT_HEARTBEAT;
206 printk(KERN_INFO MODULE_NAME
207 "DaVinci Watchdog Timer: heartbeat %d sec\n", heartbeat);
209 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
210 if (res == NULL) {
211 printk(KERN_INFO MODULE_NAME
212 "failed to get memory region resource\n");
213 return -ENOENT;
216 size = res->end - res->start + 1;
217 wdt_mem = request_mem_region(res->start, size, pdev->name);
219 if (wdt_mem == NULL) {
220 printk(KERN_INFO MODULE_NAME "failed to get memory region\n");
221 return -ENOENT;
223 wdt_base = (void __iomem *)(res->start);
225 ret = misc_register(&davinci_wdt_miscdev);
226 if (ret < 0) {
227 printk(KERN_ERR MODULE_NAME "cannot register misc device\n");
228 release_resource(wdt_mem);
229 kfree(wdt_mem);
230 } else {
231 set_bit(WDT_DEVICE_INITED, &wdt_status);
234 return ret;
237 static int davinci_wdt_remove(struct platform_device *pdev)
239 misc_deregister(&davinci_wdt_miscdev);
240 if (wdt_mem) {
241 release_resource(wdt_mem);
242 kfree(wdt_mem);
243 wdt_mem = NULL;
245 return 0;
248 static struct platform_driver platform_wdt_driver = {
249 .driver = {
250 .name = "watchdog",
251 .owner = THIS_MODULE,
253 .probe = davinci_wdt_probe,
254 .remove = davinci_wdt_remove,
257 static int __init davinci_wdt_init(void)
259 return platform_driver_register(&platform_wdt_driver);
262 static void __exit davinci_wdt_exit(void)
264 platform_driver_unregister(&platform_wdt_driver);
267 module_init(davinci_wdt_init);
268 module_exit(davinci_wdt_exit);
270 MODULE_AUTHOR("Texas Instruments");
271 MODULE_DESCRIPTION("DaVinci Watchdog Driver");
273 module_param(heartbeat, int, 0);
274 MODULE_PARM_DESC(heartbeat,
275 "Watchdog heartbeat period in seconds from 1 to "
276 __MODULE_STRING(MAX_HEARTBEAT) ", default "
277 __MODULE_STRING(DEFAULT_HEARTBEAT));
279 MODULE_LICENSE("GPL");
280 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
281 MODULE_ALIAS("platform:watchdog");