Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / usb / host / ohci-omap.c
blob611bc9f3a8ae98eb3c63e1bb10b1866b2d861d15
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2005 David Brownell
6 * (C) Copyright 2002 Hewlett-Packard Company
8 * OMAP Bus Glue
10 * Modified for OMAP by Tony Lindgren <tony@atomide.com>
11 * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
12 * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
14 * This file is licenced under the GPL.
17 #include <linux/signal.h> /* IRQF_DISABLED */
18 #include <linux/jiffies.h>
19 #include <linux/platform_device.h>
20 #include <linux/clk.h>
22 #include <asm/hardware.h>
23 #include <asm/io.h>
24 #include <asm/mach-types.h>
26 #include <asm/arch/mux.h>
27 #include <asm/arch/irqs.h>
28 #include <asm/arch/gpio.h>
29 #include <asm/arch/fpga.h>
30 #include <asm/arch/usb.h>
33 /* OMAP-1510 OHCI has its own MMU for DMA */
34 #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
35 #define OMAP1510_LB_CLOCK_DIV 0xfffec10c
36 #define OMAP1510_LB_MMU_CTL 0xfffec208
37 #define OMAP1510_LB_MMU_LCK 0xfffec224
38 #define OMAP1510_LB_MMU_LD_TLB 0xfffec228
39 #define OMAP1510_LB_MMU_CAM_H 0xfffec22c
40 #define OMAP1510_LB_MMU_CAM_L 0xfffec230
41 #define OMAP1510_LB_MMU_RAM_H 0xfffec234
42 #define OMAP1510_LB_MMU_RAM_L 0xfffec238
45 #ifndef CONFIG_ARCH_OMAP
46 #error "This file is OMAP bus glue. CONFIG_OMAP must be defined."
47 #endif
49 #ifdef CONFIG_TPS65010
50 #include <linux/i2c/tps65010.h>
51 #else
53 #define LOW 0
54 #define HIGH 1
56 #define GPIO1 1
58 static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value)
60 return 0;
63 #endif
65 extern int usb_disabled(void);
66 extern int ocpi_enable(void);
68 static struct clk *usb_host_ck;
69 static struct clk *usb_dc_ck;
70 static int host_enabled;
71 static int host_initialized;
73 static void omap_ohci_clock_power(int on)
75 if (on) {
76 clk_enable(usb_dc_ck);
77 clk_enable(usb_host_ck);
78 /* guesstimate for T5 == 1x 32K clock + APLL lock time */
79 udelay(100);
80 } else {
81 clk_disable(usb_host_ck);
82 clk_disable(usb_dc_ck);
87 * Board specific gang-switched transceiver power on/off.
88 * NOTE: OSK supplies power from DC, not battery.
90 static int omap_ohci_transceiver_power(int on)
92 if (on) {
93 if (machine_is_omap_innovator() && cpu_is_omap1510())
94 fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
95 | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
96 INNOVATOR_FPGA_CAM_USB_CONTROL);
97 else if (machine_is_omap_osk())
98 tps65010_set_gpio_out_value(GPIO1, LOW);
99 } else {
100 if (machine_is_omap_innovator() && cpu_is_omap1510())
101 fpga_write(fpga_read(INNOVATOR_FPGA_CAM_USB_CONTROL)
102 & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
103 INNOVATOR_FPGA_CAM_USB_CONTROL);
104 else if (machine_is_omap_osk())
105 tps65010_set_gpio_out_value(GPIO1, HIGH);
108 return 0;
111 #ifdef CONFIG_ARCH_OMAP15XX
113 * OMAP-1510 specific Local Bus clock on/off
115 static int omap_1510_local_bus_power(int on)
117 if (on) {
118 omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
119 udelay(200);
120 } else {
121 omap_writel(0, OMAP1510_LB_MMU_CTL);
124 return 0;
128 * OMAP-1510 specific Local Bus initialization
129 * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
130 * See also arch/mach-omap/memory.h for __virt_to_dma() and
131 * __dma_to_virt() which need to match with the physical
132 * Local Bus address below.
134 static int omap_1510_local_bus_init(void)
136 unsigned int tlb;
137 unsigned long lbaddr, physaddr;
139 omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
140 OMAP1510_LB_CLOCK_DIV);
142 /* Configure the Local Bus MMU table */
143 for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
144 lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
145 physaddr = tlb * 0x00100000 + PHYS_OFFSET;
146 omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
147 omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
148 OMAP1510_LB_MMU_CAM_L);
149 omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
150 omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
151 omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
152 omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
155 /* Enable the walking table */
156 omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
157 udelay(200);
159 return 0;
161 #else
162 #define omap_1510_local_bus_power(x) {}
163 #define omap_1510_local_bus_init() {}
164 #endif
166 #ifdef CONFIG_USB_OTG
168 static void start_hnp(struct ohci_hcd *ohci)
170 const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1;
171 unsigned long flags;
173 otg_start_hnp(ohci->transceiver);
175 local_irq_save(flags);
176 ohci->transceiver->state = OTG_STATE_A_SUSPEND;
177 writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
178 OTG_CTRL_REG &= ~OTG_A_BUSREQ;
179 local_irq_restore(flags);
182 #endif
184 /*-------------------------------------------------------------------------*/
186 static int ohci_omap_init(struct usb_hcd *hcd)
188 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
189 struct omap_usb_config *config = hcd->self.controller->platform_data;
190 int need_transceiver = (config->otg != 0);
191 int ret;
193 dev_dbg(hcd->self.controller, "starting USB Controller\n");
195 if (config->otg) {
196 ohci_to_hcd(ohci)->self.otg_port = config->otg;
197 /* default/minimum OTG power budget: 8 mA */
198 ohci_to_hcd(ohci)->power_budget = 8;
201 /* boards can use OTG transceivers in non-OTG modes */
202 need_transceiver = need_transceiver
203 || machine_is_omap_h2() || machine_is_omap_h3();
205 if (cpu_is_omap16xx())
206 ocpi_enable();
208 #ifdef CONFIG_ARCH_OMAP_OTG
209 if (need_transceiver) {
210 ohci->transceiver = otg_get_transceiver();
211 if (ohci->transceiver) {
212 int status = otg_set_host(ohci->transceiver,
213 &ohci_to_hcd(ohci)->self);
214 dev_dbg(hcd->self.controller, "init %s transceiver, status %d\n",
215 ohci->transceiver->label, status);
216 if (status) {
217 if (ohci->transceiver)
218 put_device(ohci->transceiver->dev);
219 return status;
221 } else {
222 dev_err(hcd->self.controller, "can't find transceiver\n");
223 return -ENODEV;
226 #endif
228 omap_ohci_clock_power(1);
230 if (cpu_is_omap1510()) {
231 omap_1510_local_bus_power(1);
232 omap_1510_local_bus_init();
235 if ((ret = ohci_init(ohci)) < 0)
236 return ret;
238 /* board-specific power switching and overcurrent support */
239 if (machine_is_omap_osk() || machine_is_omap_innovator()) {
240 u32 rh = roothub_a (ohci);
242 /* power switching (ganged by default) */
243 rh &= ~RH_A_NPS;
245 /* TPS2045 switch for internal transceiver (port 1) */
246 if (machine_is_omap_osk()) {
247 ohci_to_hcd(ohci)->power_budget = 250;
249 rh &= ~RH_A_NOCP;
251 /* gpio9 for overcurrent detction */
252 omap_cfg_reg(W8_1610_GPIO9);
253 omap_request_gpio(9);
254 omap_set_gpio_direction(9, 1 /* IN */);
256 /* for paranoia's sake: disable USB.PUEN */
257 omap_cfg_reg(W4_USB_HIGHZ);
259 ohci_writel(ohci, rh, &ohci->regs->roothub.a);
260 distrust_firmware = 0;
261 } else if (machine_is_nokia770()) {
262 /* We require a self-powered hub, which should have
263 * plenty of power. */
264 ohci_to_hcd(ohci)->power_budget = 0;
267 /* FIXME khubd hub requests should manage power switching */
268 omap_ohci_transceiver_power(1);
270 /* board init will have already handled HMC and mux setup.
271 * any external transceiver should already be initialized
272 * too, so all configured ports use the right signaling now.
275 return 0;
278 static void ohci_omap_stop(struct usb_hcd *hcd)
280 dev_dbg(hcd->self.controller, "stopping USB Controller\n");
281 omap_ohci_clock_power(0);
285 /*-------------------------------------------------------------------------*/
288 * usb_hcd_omap_probe - initialize OMAP-based HCDs
289 * Context: !in_interrupt()
291 * Allocates basic resources for this USB host controller, and
292 * then invokes the start() method for the HCD associated with it
293 * through the hotplug entry's driver_data.
295 static int usb_hcd_omap_probe (const struct hc_driver *driver,
296 struct platform_device *pdev)
298 int retval, irq;
299 struct usb_hcd *hcd = 0;
300 struct ohci_hcd *ohci;
302 if (pdev->num_resources != 2) {
303 printk(KERN_ERR "hcd probe: invalid num_resources: %i\n",
304 pdev->num_resources);
305 return -ENODEV;
308 if (pdev->resource[0].flags != IORESOURCE_MEM
309 || pdev->resource[1].flags != IORESOURCE_IRQ) {
310 printk(KERN_ERR "hcd probe: invalid resource type\n");
311 return -ENODEV;
314 usb_host_ck = clk_get(0, "usb_hhc_ck");
315 if (IS_ERR(usb_host_ck))
316 return PTR_ERR(usb_host_ck);
318 if (!cpu_is_omap1510())
319 usb_dc_ck = clk_get(0, "usb_dc_ck");
320 else
321 usb_dc_ck = clk_get(0, "lb_ck");
323 if (IS_ERR(usb_dc_ck)) {
324 clk_put(usb_host_ck);
325 return PTR_ERR(usb_dc_ck);
329 hcd = usb_create_hcd (driver, &pdev->dev, pdev->dev.bus_id);
330 if (!hcd) {
331 retval = -ENOMEM;
332 goto err0;
334 hcd->rsrc_start = pdev->resource[0].start;
335 hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
337 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
338 dev_dbg(&pdev->dev, "request_mem_region failed\n");
339 retval = -EBUSY;
340 goto err1;
343 hcd->regs = (void __iomem *) (int) IO_ADDRESS(hcd->rsrc_start);
345 ohci = hcd_to_ohci(hcd);
346 ohci_hcd_init(ohci);
348 host_initialized = 0;
349 host_enabled = 1;
351 irq = platform_get_irq(pdev, 0);
352 if (irq < 0) {
353 retval = -ENXIO;
354 goto err2;
356 retval = usb_add_hcd(hcd, irq, IRQF_DISABLED);
357 if (retval)
358 goto err2;
360 host_initialized = 1;
362 if (!host_enabled)
363 omap_ohci_clock_power(0);
365 return 0;
366 err2:
367 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
368 err1:
369 usb_put_hcd(hcd);
370 err0:
371 clk_put(usb_dc_ck);
372 clk_put(usb_host_ck);
373 return retval;
377 /* may be called with controller, bus, and devices active */
380 * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
381 * @dev: USB Host Controller being removed
382 * Context: !in_interrupt()
384 * Reverses the effect of usb_hcd_omap_probe(), first invoking
385 * the HCD's stop() method. It is always called from a thread
386 * context, normally "rmmod", "apmd", or something similar.
388 static inline void
389 usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
391 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
393 usb_remove_hcd(hcd);
394 if (ohci->transceiver) {
395 (void) otg_set_host(ohci->transceiver, 0);
396 put_device(ohci->transceiver->dev);
398 if (machine_is_omap_osk())
399 omap_free_gpio(9);
400 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
401 usb_put_hcd(hcd);
402 clk_put(usb_dc_ck);
403 clk_put(usb_host_ck);
406 /*-------------------------------------------------------------------------*/
408 static int
409 ohci_omap_start (struct usb_hcd *hcd)
411 struct omap_usb_config *config;
412 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
413 int ret;
415 if (!host_enabled)
416 return 0;
417 config = hcd->self.controller->platform_data;
418 if (config->otg || config->rwc) {
419 ohci->hc_control = OHCI_CTRL_RWC;
420 writel(OHCI_CTRL_RWC, &ohci->regs->control);
423 if ((ret = ohci_run (ohci)) < 0) {
424 dev_err(hcd->self.controller, "can't start\n");
425 ohci_stop (hcd);
426 return ret;
428 return 0;
431 /*-------------------------------------------------------------------------*/
433 static const struct hc_driver ohci_omap_hc_driver = {
434 .description = hcd_name,
435 .product_desc = "OMAP OHCI",
436 .hcd_priv_size = sizeof(struct ohci_hcd),
439 * generic hardware linkage
441 .irq = ohci_irq,
442 .flags = HCD_USB11 | HCD_MEMORY,
445 * basic lifecycle operations
447 .reset = ohci_omap_init,
448 .start = ohci_omap_start,
449 .stop = ohci_omap_stop,
450 .shutdown = ohci_shutdown,
453 * managing i/o requests and associated device resources
455 .urb_enqueue = ohci_urb_enqueue,
456 .urb_dequeue = ohci_urb_dequeue,
457 .endpoint_disable = ohci_endpoint_disable,
460 * scheduling support
462 .get_frame_number = ohci_get_frame,
465 * root hub support
467 .hub_status_data = ohci_hub_status_data,
468 .hub_control = ohci_hub_control,
469 .hub_irq_enable = ohci_rhsc_enable,
470 #ifdef CONFIG_PM
471 .bus_suspend = ohci_bus_suspend,
472 .bus_resume = ohci_bus_resume,
473 #endif
474 .start_port_reset = ohci_start_port_reset,
477 /*-------------------------------------------------------------------------*/
479 static int ohci_hcd_omap_drv_probe(struct platform_device *dev)
481 return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev);
484 static int ohci_hcd_omap_drv_remove(struct platform_device *dev)
486 struct usb_hcd *hcd = platform_get_drvdata(dev);
488 usb_hcd_omap_remove(hcd, dev);
489 platform_set_drvdata(dev, NULL);
491 return 0;
494 /*-------------------------------------------------------------------------*/
496 #ifdef CONFIG_PM
498 static int ohci_omap_suspend(struct platform_device *dev, pm_message_t message)
500 struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev));
502 if (time_before(jiffies, ohci->next_statechange))
503 msleep(5);
504 ohci->next_statechange = jiffies;
506 omap_ohci_clock_power(0);
507 ohci_to_hcd(ohci)->state = HC_STATE_SUSPENDED;
508 dev->dev.power.power_state = PMSG_SUSPEND;
509 return 0;
512 static int ohci_omap_resume(struct platform_device *dev)
514 struct ohci_hcd *ohci = hcd_to_ohci(platform_get_drvdata(dev));
516 if (time_before(jiffies, ohci->next_statechange))
517 msleep(5);
518 ohci->next_statechange = jiffies;
520 omap_ohci_clock_power(1);
521 dev->dev.power.power_state = PMSG_ON;
522 ohci_finish_controller_resume(hcd);
523 return 0;
526 #endif
528 /*-------------------------------------------------------------------------*/
531 * Driver definition to register with the OMAP bus
533 static struct platform_driver ohci_hcd_omap_driver = {
534 .probe = ohci_hcd_omap_drv_probe,
535 .remove = ohci_hcd_omap_drv_remove,
536 .shutdown = usb_hcd_platform_shutdown,
537 #ifdef CONFIG_PM
538 .suspend = ohci_omap_suspend,
539 .resume = ohci_omap_resume,
540 #endif
541 .driver = {
542 .owner = THIS_MODULE,
543 .name = "ohci",
547 MODULE_ALIAS("platform:ohci");