Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / serial / cpm_uart / cpm_uart.h
blob32b9737759c45fdd3045cba8db1318d4d711ed86
1 /*
2 * linux/drivers/serial/cpm_uart.h
4 * Driver for CPM (SCC/SMC) serial ports
6 * Copyright (C) 2004 Freescale Semiconductor, Inc.
8 * 2006 (c) MontaVista Software, Inc.
9 * Vitaly Bordug <vbordug@ru.mvista.com>
11 * This file is licensed under the terms of the GNU General Public License
12 * version 2. This program is licensed "as is" without any warranty of any
13 * kind, whether express or implied.
16 #ifndef CPM_UART_H
17 #define CPM_UART_H
19 #include <linux/platform_device.h>
20 #include <linux/fs_uart_pd.h>
22 #if defined(CONFIG_CPM2)
23 #include "cpm_uart_cpm2.h"
24 #elif defined(CONFIG_8xx)
25 #include "cpm_uart_cpm1.h"
26 #endif
28 #define SERIAL_CPM_MAJOR 204
29 #define SERIAL_CPM_MINOR 46
31 #define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC)
32 #define IS_DISCARDING(pinfo) (pinfo->flags & FLAG_DISCARDING)
33 #define FLAG_DISCARDING 0x00000004 /* when set, don't discard */
34 #define FLAG_SMC 0x00000002
35 #define FLAG_CONSOLE 0x00000001
37 #define UART_SMC1 fsid_smc1_uart
38 #define UART_SMC2 fsid_smc2_uart
39 #define UART_SCC1 fsid_scc1_uart
40 #define UART_SCC2 fsid_scc2_uart
41 #define UART_SCC3 fsid_scc3_uart
42 #define UART_SCC4 fsid_scc4_uart
44 #define UART_NR fs_uart_nr
46 #define RX_NUM_FIFO 4
47 #define RX_BUF_SIZE 32
48 #define TX_NUM_FIFO 4
49 #define TX_BUF_SIZE 32
51 #define SCC_WAIT_CLOSING 100
53 struct uart_cpm_port {
54 struct uart_port port;
55 u16 rx_nrfifos;
56 u16 rx_fifosize;
57 u16 tx_nrfifos;
58 u16 tx_fifosize;
59 smc_t __iomem *smcp;
60 smc_uart_t __iomem *smcup;
61 scc_t __iomem *sccp;
62 scc_uart_t __iomem *sccup;
63 cbd_t __iomem *rx_bd_base;
64 cbd_t __iomem *rx_cur;
65 cbd_t __iomem *tx_bd_base;
66 cbd_t __iomem *tx_cur;
67 unsigned char *tx_buf;
68 unsigned char *rx_buf;
69 u32 flags;
70 void (*set_lineif)(struct uart_cpm_port *);
71 u8 brg;
72 uint dp_addr;
73 void *mem_addr;
74 dma_addr_t dma_addr;
75 u32 mem_size;
76 /* helpers */
77 int baud;
78 int bits;
79 /* Keep track of 'odd' SMC2 wirings */
80 int is_portb;
81 /* wait on close if needed */
82 int wait_closing;
83 /* value to combine with opcode to form cpm command */
84 u32 command;
87 #ifndef CONFIG_PPC_CPM_NEW_BINDING
88 extern int cpm_uart_port_map[UART_NR];
89 #endif
90 extern int cpm_uart_nr;
91 extern struct uart_cpm_port cpm_uart_ports[UART_NR];
93 /* these are located in their respective files */
94 void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
95 int cpm_uart_init_portdesc(void);
96 int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
97 void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
99 void smc1_lineif(struct uart_cpm_port *pinfo);
100 void smc2_lineif(struct uart_cpm_port *pinfo);
101 void scc1_lineif(struct uart_cpm_port *pinfo);
102 void scc2_lineif(struct uart_cpm_port *pinfo);
103 void scc3_lineif(struct uart_cpm_port *pinfo);
104 void scc4_lineif(struct uart_cpm_port *pinfo);
107 virtual to phys transtalion
109 static inline unsigned long cpu2cpm_addr(void *addr,
110 struct uart_cpm_port *pinfo)
112 int offset;
113 u32 val = (u32)addr;
114 u32 mem = (u32)pinfo->mem_addr;
115 /* sane check */
116 if (likely(val >= mem && val < mem + pinfo->mem_size)) {
117 offset = val - mem;
118 return pinfo->dma_addr + offset;
120 /* something nasty happened */
121 BUG();
122 return 0;
125 static inline void *cpm2cpu_addr(unsigned long addr,
126 struct uart_cpm_port *pinfo)
128 int offset;
129 u32 val = addr;
130 u32 dma = (u32)pinfo->dma_addr;
131 /* sane check */
132 if (likely(val >= dma && val < dma + pinfo->mem_size)) {
133 offset = val - dma;
134 return pinfo->mem_addr + offset;
136 /* something nasty happened */
137 BUG();
138 return NULL;
142 #endif /* CPM_UART_H */