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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / serial / amba-pl010.c
blobe88da72f8304e9a6abc00daa73590e409e76e88b
1 /*
2 * linux/drivers/char/amba.c
3 *
4 * Driver for AMBA serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
26 *
27 * This is a generic driver for ARM AMBA-type serial ports. They
28 * have a lot of 16550-like features, but are not register compatible.
29 * Note that although they do have CTS, DCD and DSR inputs, they do
30 * not have an RI input, nor do they have DTR or RTS outputs. If
31 * required, these have to be supplied via some other means (eg, GPIO)
32 * and hooked into this driver.
33 */
34
35 #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
36 #define SUPPORT_SYSRQ
37 #endif
38
39 #include <linux/module.h>
40 #include <linux/ioport.h>
41 #include <linux/init.h>
42 #include <linux/console.h>
43 #include <linux/sysrq.h>
44 #include <linux/device.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial_core.h>
48 #include <linux/serial.h>
49 #include <linux/amba/bus.h>
50 #include <linux/amba/serial.h>
51 #include <linux/clk.h>
52
53 #include <asm/io.h>
54
55 #define UART_NR 8
56
57 #define SERIAL_AMBA_MAJOR 204
58 #define SERIAL_AMBA_MINOR 16
59 #define SERIAL_AMBA_NR UART_NR
60
61 #define AMBA_ISR_PASS_LIMIT 256
62
63 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
64 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
65
66 #define UART_DUMMY_RSR_RX 256
67 #define UART_PORT_SIZE 64
68
69 /*
70 * We wrap our port structure around the generic uart_port.
71 */
72 struct uart_amba_port {
73 struct uart_port port;
74 struct clk *clk;
75 struct amba_device *dev;
76 struct amba_pl010_data *data;
77 unsigned int old_status;
78 };
79
80 static void pl010_stop_tx(struct uart_port *port)
81 {
82 struct uart_amba_port *uap = (struct uart_amba_port *)port;
83 unsigned int cr;
84
85 cr = readb(uap->port.membase + UART010_CR);
86 cr &= ~UART010_CR_TIE;
87 writel(cr, uap->port.membase + UART010_CR);
88 }
89
90 static void pl010_start_tx(struct uart_port *port)
91 {
92 struct uart_amba_port *uap = (struct uart_amba_port *)port;
93 unsigned int cr;
94
95 cr = readb(uap->port.membase + UART010_CR);
96 cr |= UART010_CR_TIE;
97 writel(cr, uap->port.membase + UART010_CR);
98 }
99
100 static void pl010_stop_rx(struct uart_port *port)
101 {
102 struct uart_amba_port *uap = (struct uart_amba_port *)port;
103 unsigned int cr;
104
105 cr = readb(uap->port.membase + UART010_CR);
106 cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
107 writel(cr, uap->port.membase + UART010_CR);
108 }
109
110 static void pl010_enable_ms(struct uart_port *port)
111 {
112 struct uart_amba_port *uap = (struct uart_amba_port *)port;
113 unsigned int cr;
114
115 cr = readb(uap->port.membase + UART010_CR);
116 cr |= UART010_CR_MSIE;
117 writel(cr, uap->port.membase + UART010_CR);
118 }
119
120 static void pl010_rx_chars(struct uart_amba_port *uap)
121 {
122 struct tty_struct *tty = uap->port.info->tty;
123 unsigned int status, ch, flag, rsr, max_count = 256;
124
125 status = readb(uap->port.membase + UART01x_FR);
126 while (UART_RX_DATA(status) && max_count--) {
127 ch = readb(uap->port.membase + UART01x_DR);
128 flag = TTY_NORMAL;
129
130 uap->port.icount.rx++;
131
132 /*
133 * Note that the error handling code is
134 * out of the main execution path
135 */
136 rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
137 if (unlikely(rsr & UART01x_RSR_ANY)) {
138 writel(0, uap->port.membase + UART01x_ECR);
139
140 if (rsr & UART01x_RSR_BE) {
141 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
142 uap->port.icount.brk++;
143 if (uart_handle_break(&uap->port))
144 goto ignore_char;
145 } else if (rsr & UART01x_RSR_PE)
146 uap->port.icount.parity++;
147 else if (rsr & UART01x_RSR_FE)
148 uap->port.icount.frame++;
149 if (rsr & UART01x_RSR_OE)
150 uap->port.icount.overrun++;
151
152 rsr &= uap->port.read_status_mask;
153
154 if (rsr & UART01x_RSR_BE)
155 flag = TTY_BREAK;
156 else if (rsr & UART01x_RSR_PE)
157 flag = TTY_PARITY;
158 else if (rsr & UART01x_RSR_FE)
159 flag = TTY_FRAME;
160 }
161
162 if (uart_handle_sysrq_char(&uap->port, ch))
163 goto ignore_char;
164
165 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
166
167 ignore_char:
168 status = readb(uap->port.membase + UART01x_FR);
169 }
170 spin_unlock(&uap->port.lock);
171 tty_flip_buffer_push(tty);
172 spin_lock(&uap->port.lock);
173 }
174
175 static void pl010_tx_chars(struct uart_amba_port *uap)
176 {
177 struct circ_buf *xmit = &uap->port.info->xmit;
178 int count;
179
180 if (uap->port.x_char) {
181 writel(uap->port.x_char, uap->port.membase + UART01x_DR);
182 uap->port.icount.tx++;
183 uap->port.x_char = 0;
184 return;
185 }
186 if (uart_circ_empty(xmit) || uart_tx_stopped(&uap->port)) {
187 pl010_stop_tx(&uap->port);
188 return;
189 }
190
191 count = uap->port.fifosize >> 1;
192 do {
193 writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
194 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
195 uap->port.icount.tx++;
196 if (uart_circ_empty(xmit))
197 break;
198 } while (--count > 0);
199
200 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
201 uart_write_wakeup(&uap->port);
202
203 if (uart_circ_empty(xmit))
204 pl010_stop_tx(&uap->port);
205 }
206
207 static void pl010_modem_status(struct uart_amba_port *uap)
208 {
209 unsigned int status, delta;
210
211 writel(0, uap->port.membase + UART010_ICR);
212
213 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
214
215 delta = status ^ uap->old_status;
216 uap->old_status = status;
217
218 if (!delta)
219 return;
220
221 if (delta & UART01x_FR_DCD)
222 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
223
224 if (delta & UART01x_FR_DSR)
225 uap->port.icount.dsr++;
226
227 if (delta & UART01x_FR_CTS)
228 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
229
230 wake_up_interruptible(&uap->port.info->delta_msr_wait);
231 }
232
233 static irqreturn_t pl010_int(int irq, void *dev_id)
234 {
235 struct uart_amba_port *uap = dev_id;
236 unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
237 int handled = 0;
238
239 spin_lock(&uap->port.lock);
240
241 status = readb(uap->port.membase + UART010_IIR);
242 if (status) {
243 do {
244 if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
245 pl010_rx_chars(uap);
246 if (status & UART010_IIR_MIS)
247 pl010_modem_status(uap);
248 if (status & UART010_IIR_TIS)
249 pl010_tx_chars(uap);
250
251 if (pass_counter-- == 0)
252 break;
253
254 status = readb(uap->port.membase + UART010_IIR);
255 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
256 UART010_IIR_TIS));
257 handled = 1;
258 }
259
260 spin_unlock(&uap->port.lock);
261
262 return IRQ_RETVAL(handled);
263 }
264
265 static unsigned int pl010_tx_empty(struct uart_port *port)
266 {
267 struct uart_amba_port *uap = (struct uart_amba_port *)port;
268 unsigned int status = readb(uap->port.membase + UART01x_FR);
269 return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
270 }
271
272 static unsigned int pl010_get_mctrl(struct uart_port *port)
273 {
274 struct uart_amba_port *uap = (struct uart_amba_port *)port;
275 unsigned int result = 0;
276 unsigned int status;
277
278 status = readb(uap->port.membase + UART01x_FR);
279 if (status & UART01x_FR_DCD)
280 result |= TIOCM_CAR;
281 if (status & UART01x_FR_DSR)
282 result |= TIOCM_DSR;
283 if (status & UART01x_FR_CTS)
284 result |= TIOCM_CTS;
285
286 return result;
287 }
288
289 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
290 {
291 struct uart_amba_port *uap = (struct uart_amba_port *)port;
292
293 if (uap->data)
294 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
295 }
296
297 static void pl010_break_ctl(struct uart_port *port, int break_state)
298 {
299 struct uart_amba_port *uap = (struct uart_amba_port *)port;
300 unsigned long flags;
301 unsigned int lcr_h;
302
303 spin_lock_irqsave(&uap->port.lock, flags);
304 lcr_h = readb(uap->port.membase + UART010_LCRH);
305 if (break_state == -1)
306 lcr_h |= UART01x_LCRH_BRK;
307 else
308 lcr_h &= ~UART01x_LCRH_BRK;
309 writel(lcr_h, uap->port.membase + UART010_LCRH);
310 spin_unlock_irqrestore(&uap->port.lock, flags);
311 }
312
313 static int pl010_startup(struct uart_port *port)
314 {
315 struct uart_amba_port *uap = (struct uart_amba_port *)port;
316 int retval;
317
318 /*
319 * Try to enable the clock producer.
320 */
321 retval = clk_enable(uap->clk);
322 if (retval)
323 goto out;
324
325 uap->port.uartclk = clk_get_rate(uap->clk);
326
327 /*
328 * Allocate the IRQ
329 */
330 retval = request_irq(uap->port.irq, pl010_int, 0, "uart-pl010", uap);
331 if (retval)
332 goto clk_dis;
333
334 /*
335 * initialise the old status of the modem signals
336 */
337 uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
338
339 /*
340 * Finally, enable interrupts
341 */
342 writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
343 uap->port.membase + UART010_CR);
344
345 return 0;
346
347 clk_dis:
348 clk_disable(uap->clk);
349 out:
350 return retval;
351 }
352
353 static void pl010_shutdown(struct uart_port *port)
354 {
355 struct uart_amba_port *uap = (struct uart_amba_port *)port;
356
357 /*
358 * Free the interrupt
359 */
360 free_irq(uap->port.irq, uap);
361
362 /*
363 * disable all interrupts, disable the port
364 */
365 writel(0, uap->port.membase + UART010_CR);
366
367 /* disable break condition and fifos */
368 writel(readb(uap->port.membase + UART010_LCRH) &
369 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
370 uap->port.membase + UART010_LCRH);
371
372 /*
373 * Shut down the clock producer
374 */
375 clk_disable(uap->clk);
376 }
377
378 static void
379 pl010_set_termios(struct uart_port *port, struct ktermios *termios,
380 struct ktermios *old)
381 {
382 struct uart_amba_port *uap = (struct uart_amba_port *)port;
383 unsigned int lcr_h, old_cr;
384 unsigned long flags;
385 unsigned int baud, quot;
386
387 /*
388 * Ask the core to calculate the divisor for us.
389 */
390 baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
391 quot = uart_get_divisor(port, baud);
392
393 switch (termios->c_cflag & CSIZE) {
394 case CS5:
395 lcr_h = UART01x_LCRH_WLEN_5;
396 break;
397 case CS6:
398 lcr_h = UART01x_LCRH_WLEN_6;
399 break;
400 case CS7:
401 lcr_h = UART01x_LCRH_WLEN_7;
402 break;
403 default: // CS8
404 lcr_h = UART01x_LCRH_WLEN_8;
405 break;
406 }
407 if (termios->c_cflag & CSTOPB)
408 lcr_h |= UART01x_LCRH_STP2;
409 if (termios->c_cflag & PARENB) {
410 lcr_h |= UART01x_LCRH_PEN;
411 if (!(termios->c_cflag & PARODD))
412 lcr_h |= UART01x_LCRH_EPS;
413 }
414 if (uap->port.fifosize > 1)
415 lcr_h |= UART01x_LCRH_FEN;
416
417 spin_lock_irqsave(&uap->port.lock, flags);
418
419 /*
420 * Update the per-port timeout.
421 */
422 uart_update_timeout(port, termios->c_cflag, baud);
423
424 uap->port.read_status_mask = UART01x_RSR_OE;
425 if (termios->c_iflag & INPCK)
426 uap->port.read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
427 if (termios->c_iflag & (BRKINT | PARMRK))
428 uap->port.read_status_mask |= UART01x_RSR_BE;
429
430 /*
431 * Characters to ignore
432 */
433 uap->port.ignore_status_mask = 0;
434 if (termios->c_iflag & IGNPAR)
435 uap->port.ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
436 if (termios->c_iflag & IGNBRK) {
437 uap->port.ignore_status_mask |= UART01x_RSR_BE;
438 /*
439 * If we're ignoring parity and break indicators,
440 * ignore overruns too (for real raw support).
441 */
442 if (termios->c_iflag & IGNPAR)
443 uap->port.ignore_status_mask |= UART01x_RSR_OE;
444 }
445
446 /*
447 * Ignore all characters if CREAD is not set.
448 */
449 if ((termios->c_cflag & CREAD) == 0)
450 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
451
452 /* first, disable everything */
453 old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
454
455 if (UART_ENABLE_MS(port, termios->c_cflag))
456 old_cr |= UART010_CR_MSIE;
457
458 writel(0, uap->port.membase + UART010_CR);
459
460 /* Set baud rate */
461 quot -= 1;
462 writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
463 writel(quot & 0xff, uap->port.membase + UART010_LCRL);
464
465 /*
466 * ----------v----------v----------v----------v-----
467 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
468 * ----------^----------^----------^----------^-----
469 */
470 writel(lcr_h, uap->port.membase + UART010_LCRH);
471 writel(old_cr, uap->port.membase + UART010_CR);
472
473 spin_unlock_irqrestore(&uap->port.lock, flags);
474 }
475
476 static const char *pl010_type(struct uart_port *port)
477 {
478 return port->type == PORT_AMBA ? "AMBA" : NULL;
479 }
480
481 /*
482 * Release the memory region(s) being used by 'port'
483 */
484 static void pl010_release_port(struct uart_port *port)
485 {
486 release_mem_region(port->mapbase, UART_PORT_SIZE);
487 }
488
489 /*
490 * Request the memory region(s) being used by 'port'
491 */
492 static int pl010_request_port(struct uart_port *port)
493 {
494 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
495 != NULL ? 0 : -EBUSY;
496 }
497
498 /*
499 * Configure/autoconfigure the port.
500 */
501 static void pl010_config_port(struct uart_port *port, int flags)
502 {
503 if (flags & UART_CONFIG_TYPE) {
504 port->type = PORT_AMBA;
505 pl010_request_port(port);
506 }
507 }
508
509 /*
510 * verify the new serial_struct (for TIOCSSERIAL).
511 */
512 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
513 {
514 int ret = 0;
515 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
516 ret = -EINVAL;
517 if (ser->irq < 0 || ser->irq >= NR_IRQS)
518 ret = -EINVAL;
519 if (ser->baud_base < 9600)
520 ret = -EINVAL;
521 return ret;
522 }
523
524 static struct uart_ops amba_pl010_pops = {
525 .tx_empty = pl010_tx_empty,
526 .set_mctrl = pl010_set_mctrl,
527 .get_mctrl = pl010_get_mctrl,
528 .stop_tx = pl010_stop_tx,
529 .start_tx = pl010_start_tx,
530 .stop_rx = pl010_stop_rx,
531 .enable_ms = pl010_enable_ms,
532 .break_ctl = pl010_break_ctl,
533 .startup = pl010_startup,
534 .shutdown = pl010_shutdown,
535 .set_termios = pl010_set_termios,
536 .type = pl010_type,
537 .release_port = pl010_release_port,
538 .request_port = pl010_request_port,
539 .config_port = pl010_config_port,
540 .verify_port = pl010_verify_port,
541 };
542
543 static struct uart_amba_port *amba_ports[UART_NR];
544
545 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
546
547 static void pl010_console_putchar(struct uart_port *port, int ch)
548 {
549 struct uart_amba_port *uap = (struct uart_amba_port *)port;
550 unsigned int status;
551
552 do {
553 status = readb(uap->port.membase + UART01x_FR);
554 barrier();
555 } while (!UART_TX_READY(status));
556 writel(ch, uap->port.membase + UART01x_DR);
557 }
558
559 static void
560 pl010_console_write(struct console *co, const char *s, unsigned int count)
561 {
562 struct uart_amba_port *uap = amba_ports[co->index];
563 unsigned int status, old_cr;
564
565 clk_enable(uap->clk);
566
567 /*
568 * First save the CR then disable the interrupts
569 */
570 old_cr = readb(uap->port.membase + UART010_CR);
571 writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
572
573 uart_console_write(&uap->port, s, count, pl010_console_putchar);
574
575 /*
576 * Finally, wait for transmitter to become empty
577 * and restore the TCR
578 */
579 do {
580 status = readb(uap->port.membase + UART01x_FR);
581 barrier();
582 } while (status & UART01x_FR_BUSY);
583 writel(old_cr, uap->port.membase + UART010_CR);
584
585 clk_disable(uap->clk);
586 }
587
588 static void __init
589 pl010_console_get_options(struct uart_amba_port *uap, int *baud,
590 int *parity, int *bits)
591 {
592 if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
593 unsigned int lcr_h, quot;
594 lcr_h = readb(uap->port.membase + UART010_LCRH);
595
596 *parity = 'n';
597 if (lcr_h & UART01x_LCRH_PEN) {
598 if (lcr_h & UART01x_LCRH_EPS)
599 *parity = 'e';
600 else
601 *parity = 'o';
602 }
603
604 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
605 *bits = 7;
606 else
607 *bits = 8;
608
609 quot = readb(uap->port.membase + UART010_LCRL) |
610 readb(uap->port.membase + UART010_LCRM) << 8;
611 *baud = uap->port.uartclk / (16 * (quot + 1));
612 }
613 }
614
615 static int __init pl010_console_setup(struct console *co, char *options)
616 {
617 struct uart_amba_port *uap;
618 int baud = 38400;
619 int bits = 8;
620 int parity = 'n';
621 int flow = 'n';
622
623 /*
624 * Check whether an invalid uart number has been specified, and
625 * if so, search for the first available port that does have
626 * console support.
627 */
628 if (co->index >= UART_NR)
629 co->index = 0;
630 uap = amba_ports[co->index];
631 if (!uap)
632 return -ENODEV;
633
634 uap->port.uartclk = clk_get_rate(uap->clk);
635
636 if (options)
637 uart_parse_options(options, &baud, &parity, &bits, &flow);
638 else
639 pl010_console_get_options(uap, &baud, &parity, &bits);
640
641 return uart_set_options(&uap->port, co, baud, parity, bits, flow);
642 }
643
644 static struct uart_driver amba_reg;
645 static struct console amba_console = {
646 .name = "ttyAM",
647 .write = pl010_console_write,
648 .device = uart_console_device,
649 .setup = pl010_console_setup,
650 .flags = CON_PRINTBUFFER,
651 .index = -1,
652 .data = &amba_reg,
653 };
654
655 #define AMBA_CONSOLE &amba_console
656 #else
657 #define AMBA_CONSOLE NULL
658 #endif
659
660 static struct uart_driver amba_reg = {
661 .owner = THIS_MODULE,
662 .driver_name = "ttyAM",
663 .dev_name = "ttyAM",
664 .major = SERIAL_AMBA_MAJOR,
665 .minor = SERIAL_AMBA_MINOR,
666 .nr = UART_NR,
667 .cons = AMBA_CONSOLE,
668 };
669
670 static int pl010_probe(struct amba_device *dev, void *id)
671 {
672 struct uart_amba_port *uap;
673 void __iomem *base;
674 int i, ret;
675
676 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
677 if (amba_ports[i] == NULL)
678 break;
679
680 if (i == ARRAY_SIZE(amba_ports)) {
681 ret = -EBUSY;
682 goto out;
683 }
684
685 uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
686 if (!uap) {
687 ret = -ENOMEM;
688 goto out;
689 }
690
691 base = ioremap(dev->res.start, PAGE_SIZE);
692 if (!base) {
693 ret = -ENOMEM;
694 goto free;
695 }
696
697 uap->clk = clk_get(&dev->dev, "UARTCLK");
698 if (IS_ERR(uap->clk)) {
699 ret = PTR_ERR(uap->clk);
700 goto unmap;
701 }
702
703 uap->port.dev = &dev->dev;
704 uap->port.mapbase = dev->res.start;
705 uap->port.membase = base;
706 uap->port.iotype = UPIO_MEM;
707 uap->port.irq = dev->irq[0];
708 uap->port.fifosize = 16;
709 uap->port.ops = &amba_pl010_pops;
710 uap->port.flags = UPF_BOOT_AUTOCONF;
711 uap->port.line = i;
712 uap->dev = dev;
713 uap->data = dev->dev.platform_data;
714
715 amba_ports[i] = uap;
716
717 amba_set_drvdata(dev, uap);
718 ret = uart_add_one_port(&amba_reg, &uap->port);
719 if (ret) {
720 amba_set_drvdata(dev, NULL);
721 amba_ports[i] = NULL;
722 clk_put(uap->clk);
723 unmap:
724 iounmap(base);
725 free:
726 kfree(uap);
727 }
728 out:
729 return ret;
730 }
731
732 static int pl010_remove(struct amba_device *dev)
733 {
734 struct uart_amba_port *uap = amba_get_drvdata(dev);
735 int i;
736
737 amba_set_drvdata(dev, NULL);
738
739 uart_remove_one_port(&amba_reg, &uap->port);
740
741 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
742 if (amba_ports[i] == uap)
743 amba_ports[i] = NULL;
744
745 iounmap(uap->port.membase);
746 clk_put(uap->clk);
747 kfree(uap);
748 return 0;
749 }
750
751 static int pl010_suspend(struct amba_device *dev, pm_message_t state)
752 {
753 struct uart_amba_port *uap = amba_get_drvdata(dev);
754
755 if (uap)
756 uart_suspend_port(&amba_reg, &uap->port);
757
758 return 0;
759 }
760
761 static int pl010_resume(struct amba_device *dev)
762 {
763 struct uart_amba_port *uap = amba_get_drvdata(dev);
764
765 if (uap)
766 uart_resume_port(&amba_reg, &uap->port);
767
768 return 0;
769 }
770
771 static struct amba_id pl010_ids[] __initdata = {
772 {
773 .id = 0x00041010,
774 .mask = 0x000fffff,
775 },
776 { 0, 0 },
777 };
778
779 static struct amba_driver pl010_driver = {
780 .drv = {
781 .name = "uart-pl010",
782 },
783 .id_table = pl010_ids,
784 .probe = pl010_probe,
785 .remove = pl010_remove,
786 .suspend = pl010_suspend,
787 .resume = pl010_resume,
788 };
789
790 static int __init pl010_init(void)
791 {
792 int ret;
793
794 printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n");
795
796 ret = uart_register_driver(&amba_reg);
797 if (ret == 0) {
798 ret = amba_driver_register(&pl010_driver);
799 if (ret)
800 uart_unregister_driver(&amba_reg);
801 }
802 return ret;
803 }
804
805 static void __exit pl010_exit(void)
806 {
807 amba_driver_unregister(&pl010_driver);
808 uart_unregister_driver(&amba_reg);
809 }
810
811 module_init(pl010_init);
812 module_exit(pl010_exit);
813
814 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
815 MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
816 MODULE_LICENSE("GPL");
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