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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / scsi / arcmsr / arcmsr_hba.c
blobf91f79c8007d50f69d4b99f22fdc711d970ad1b2
1 /*
2 *******************************************************************************
3 ** O.S : Linux
4 ** FILE NAME : arcmsr_hba.c
5 ** BY : Erich Chen
6 ** Description: SCSI RAID Device Driver for
7 ** ARECA RAID Host adapter
8 *******************************************************************************
9 ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10 **
11 ** Web site: www.areca.com.tw
12 ** E-mail: support@areca.com.tw
13 **
14 ** This program is free software; you can redistribute it and/or modify
15 ** it under the terms of the GNU General Public License version 2 as
16 ** published by the Free Software Foundation.
17 ** This program is distributed in the hope that it will be useful,
18 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
19 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 ** GNU General Public License for more details.
21 *******************************************************************************
22 ** Redistribution and use in source and binary forms, with or without
23 ** modification, are permitted provided that the following conditions
24 ** are met:
25 ** 1. Redistributions of source code must retain the above copyright
26 ** notice, this list of conditions and the following disclaimer.
27 ** 2. Redistributions in binary form must reproduce the above copyright
28 ** notice, this list of conditions and the following disclaimer in the
29 ** documentation and/or other materials provided with the distribution.
30 ** 3. The name of the author may not be used to endorse or promote products
31 ** derived from this software without specific prior written permission.
32 **
33 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 *******************************************************************************
44 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46 *******************************************************************************
47 */
48 #include <linux/module.h>
49 #include <linux/reboot.h>
50 #include <linux/spinlock.h>
51 #include <linux/pci_ids.h>
52 #include <linux/interrupt.h>
53 #include <linux/moduleparam.h>
54 #include <linux/errno.h>
55 #include <linux/types.h>
56 #include <linux/delay.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/timer.h>
59 #include <linux/pci.h>
60 #include <linux/aer.h>
61 #include <asm/dma.h>
62 #include <asm/io.h>
63 #include <asm/system.h>
64 #include <asm/uaccess.h>
65 #include <scsi/scsi_host.h>
66 #include <scsi/scsi.h>
67 #include <scsi/scsi_cmnd.h>
68 #include <scsi/scsi_tcq.h>
69 #include <scsi/scsi_device.h>
70 #include <scsi/scsi_transport.h>
71 #include <scsi/scsicam.h>
72 #include "arcmsr.h"
73
74 MODULE_AUTHOR("Erich Chen <support@areca.com.tw>");
75 MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID HOST Adapter");
76 MODULE_LICENSE("Dual BSD/GPL");
77 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
78
79 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
80 struct scsi_cmnd *cmd);
81 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
82 static int arcmsr_abort(struct scsi_cmnd *);
83 static int arcmsr_bus_reset(struct scsi_cmnd *);
84 static int arcmsr_bios_param(struct scsi_device *sdev,
85 struct block_device *bdev, sector_t capacity, int *info);
86 static int arcmsr_queue_command(struct scsi_cmnd *cmd,
87 void (*done) (struct scsi_cmnd *));
88 static int arcmsr_probe(struct pci_dev *pdev,
89 const struct pci_device_id *id);
90 static void arcmsr_remove(struct pci_dev *pdev);
91 static void arcmsr_shutdown(struct pci_dev *pdev);
92 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
93 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
94 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
95 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
96 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
97 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
98 static const char *arcmsr_info(struct Scsi_Host *);
99 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
100 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
101 int queue_depth)
102 {
103 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
104 queue_depth = ARCMSR_MAX_CMD_PERLUN;
105 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
106 return queue_depth;
107 }
108
109 static struct scsi_host_template arcmsr_scsi_host_template = {
110 .module = THIS_MODULE,
111 .name = "ARCMSR ARECA SATA/SAS RAID HOST Adapter"
112 ARCMSR_DRIVER_VERSION,
113 .info = arcmsr_info,
114 .queuecommand = arcmsr_queue_command,
115 .eh_abort_handler = arcmsr_abort,
116 .eh_bus_reset_handler = arcmsr_bus_reset,
117 .bios_param = arcmsr_bios_param,
118 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
119 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
120 .this_id = ARCMSR_SCSI_INITIATOR_ID,
121 .sg_tablesize = ARCMSR_MAX_SG_ENTRIES,
122 .max_sectors = ARCMSR_MAX_XFER_SECTORS,
123 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
124 .use_clustering = ENABLE_CLUSTERING,
125 .shost_attrs = arcmsr_host_attrs,
126 };
127 #ifdef CONFIG_SCSI_ARCMSR_AER
128 static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev);
129 static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev,
130 pci_channel_state_t state);
131
132 static struct pci_error_handlers arcmsr_pci_error_handlers = {
133 .error_detected = arcmsr_pci_error_detected,
134 .slot_reset = arcmsr_pci_slot_reset,
135 };
136 #endif
137 static struct pci_device_id arcmsr_device_id_table[] = {
138 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
139 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
140 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
141 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
156 {0, 0}, /* Terminating entry */
157 };
158 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
159 static struct pci_driver arcmsr_pci_driver = {
160 .name = "arcmsr",
161 .id_table = arcmsr_device_id_table,
162 .probe = arcmsr_probe,
163 .remove = arcmsr_remove,
164 .shutdown = arcmsr_shutdown,
165 #ifdef CONFIG_SCSI_ARCMSR_AER
166 .err_handler = &arcmsr_pci_error_handlers,
167 #endif
168 };
169
170 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
171 {
172 irqreturn_t handle_state;
173 struct AdapterControlBlock *acb = dev_id;
174
175 spin_lock(acb->host->host_lock);
176 handle_state = arcmsr_interrupt(acb);
177 spin_unlock(acb->host->host_lock);
178
179 return handle_state;
180 }
181
182 static int arcmsr_bios_param(struct scsi_device *sdev,
183 struct block_device *bdev, sector_t capacity, int *geom)
184 {
185 int ret, heads, sectors, cylinders, total_capacity;
186 unsigned char *buffer;/* return copy of block device's partition table */
187
188 buffer = scsi_bios_ptable(bdev);
189 if (buffer) {
190 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
191 kfree(buffer);
192 if (ret != -1)
193 return ret;
194 }
195 total_capacity = capacity;
196 heads = 64;
197 sectors = 32;
198 cylinders = total_capacity / (heads * sectors);
199 if (cylinders > 1024) {
200 heads = 255;
201 sectors = 63;
202 cylinders = total_capacity / (heads * sectors);
203 }
204 geom[0] = heads;
205 geom[1] = sectors;
206 geom[2] = cylinders;
207 return 0;
208 }
209
210 static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
211 {
212 struct pci_dev *pdev = acb->pdev;
213 u16 dev_id;
214 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
215 switch (dev_id) {
216 case 0x1201 : {
217 acb->adapter_type = ACB_ADAPTER_TYPE_B;
218 }
219 break;
220
221 default : acb->adapter_type = ACB_ADAPTER_TYPE_A;
222 }
223 }
224
225 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
226 {
227
228 switch (acb->adapter_type) {
229
230 case ACB_ADAPTER_TYPE_A: {
231 struct pci_dev *pdev = acb->pdev;
232 void *dma_coherent;
233 dma_addr_t dma_coherent_handle, dma_addr;
234 struct CommandControlBlock *ccb_tmp;
235 uint32_t intmask_org;
236 int i, j;
237
238 acb->pmuA = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
239 if (!acb->pmuA) {
240 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n",
241 acb->host->host_no);
242 return -ENOMEM;
243 }
244
245 dma_coherent = dma_alloc_coherent(&pdev->dev,
246 ARCMSR_MAX_FREECCB_NUM *
247 sizeof (struct CommandControlBlock) + 0x20,
248 &dma_coherent_handle, GFP_KERNEL);
249
250 if (!dma_coherent) {
251 iounmap(acb->pmuA);
252 return -ENOMEM;
253 }
254
255 acb->dma_coherent = dma_coherent;
256 acb->dma_coherent_handle = dma_coherent_handle;
257
258 if (((unsigned long)dma_coherent & 0x1F)) {
259 dma_coherent = dma_coherent +
260 (0x20 - ((unsigned long)dma_coherent & 0x1F));
261 dma_coherent_handle = dma_coherent_handle +
262 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
263 }
264
265 dma_addr = dma_coherent_handle;
266 ccb_tmp = (struct CommandControlBlock *)dma_coherent;
267 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
268 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
269 ccb_tmp->acb = acb;
270 acb->pccb_pool[i] = ccb_tmp;
271 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
272 dma_addr = dma_addr + sizeof(struct CommandControlBlock);
273 ccb_tmp++;
274 }
275
276 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
277 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
278 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
279 acb->devstate[i][j] = ARECA_RAID_GONE;
280
281 /*
282 ** here we need to tell iop 331 our ccb_tmp.HighPart
283 ** if ccb_tmp.HighPart is not zero
284 */
285 intmask_org = arcmsr_disable_outbound_ints(acb);
286 }
287 break;
288
289 case ACB_ADAPTER_TYPE_B: {
290
291 struct pci_dev *pdev = acb->pdev;
292 struct MessageUnit_B *reg;
293 void __iomem *mem_base0, *mem_base1;
294 void *dma_coherent;
295 dma_addr_t dma_coherent_handle, dma_addr;
296 uint32_t intmask_org;
297 struct CommandControlBlock *ccb_tmp;
298 int i, j;
299
300 dma_coherent = dma_alloc_coherent(&pdev->dev,
301 ((ARCMSR_MAX_FREECCB_NUM *
302 sizeof(struct CommandControlBlock) + 0x20) +
303 sizeof(struct MessageUnit_B)),
304 &dma_coherent_handle, GFP_KERNEL);
305 if (!dma_coherent)
306 return -ENOMEM;
307
308 acb->dma_coherent = dma_coherent;
309 acb->dma_coherent_handle = dma_coherent_handle;
310
311 if (((unsigned long)dma_coherent & 0x1F)) {
312 dma_coherent = dma_coherent +
313 (0x20 - ((unsigned long)dma_coherent & 0x1F));
314 dma_coherent_handle = dma_coherent_handle +
315 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
316 }
317
318 dma_addr = dma_coherent_handle;
319 ccb_tmp = (struct CommandControlBlock *)dma_coherent;
320 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
321 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
322 ccb_tmp->acb = acb;
323 acb->pccb_pool[i] = ccb_tmp;
324 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
325 dma_addr = dma_addr + sizeof(struct CommandControlBlock);
326 ccb_tmp++;
327 }
328
329 reg = (struct MessageUnit_B *)(dma_coherent +
330 ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock));
331 acb->pmuB = reg;
332 mem_base0 = ioremap(pci_resource_start(pdev, 0),
333 pci_resource_len(pdev, 0));
334 if (!mem_base0)
335 goto out;
336
337 mem_base1 = ioremap(pci_resource_start(pdev, 2),
338 pci_resource_len(pdev, 2));
339 if (!mem_base1) {
340 iounmap(mem_base0);
341 goto out;
342 }
343
344 reg->drv2iop_doorbell_reg = mem_base0 + ARCMSR_DRV2IOP_DOORBELL;
345 reg->drv2iop_doorbell_mask_reg = mem_base0 +
346 ARCMSR_DRV2IOP_DOORBELL_MASK;
347 reg->iop2drv_doorbell_reg = mem_base0 + ARCMSR_IOP2DRV_DOORBELL;
348 reg->iop2drv_doorbell_mask_reg = mem_base0 +
349 ARCMSR_IOP2DRV_DOORBELL_MASK;
350 reg->ioctl_wbuffer_reg = mem_base1 + ARCMSR_IOCTL_WBUFFER;
351 reg->ioctl_rbuffer_reg = mem_base1 + ARCMSR_IOCTL_RBUFFER;
352 reg->msgcode_rwbuffer_reg = mem_base1 + ARCMSR_MSGCODE_RWBUFFER;
353
354 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
355 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
356 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
357 acb->devstate[i][j] = ARECA_RAID_GOOD;
358
359 /*
360 ** here we need to tell iop 331 our ccb_tmp.HighPart
361 ** if ccb_tmp.HighPart is not zero
362 */
363 intmask_org = arcmsr_disable_outbound_ints(acb);
364 }
365 break;
366 }
367 return 0;
368
369 out:
370 dma_free_coherent(&acb->pdev->dev,
371 (ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 +
372 sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle);
373 return -ENOMEM;
374 }
375
376 static int arcmsr_probe(struct pci_dev *pdev,
377 const struct pci_device_id *id)
378 {
379 struct Scsi_Host *host;
380 struct AdapterControlBlock *acb;
381 uint8_t bus, dev_fun;
382 int error;
383
384 error = pci_enable_device(pdev);
385 if (error)
386 goto out;
387 pci_set_master(pdev);
388
389 host = scsi_host_alloc(&arcmsr_scsi_host_template,
390 sizeof(struct AdapterControlBlock));
391 if (!host) {
392 error = -ENOMEM;
393 goto out_disable_device;
394 }
395 acb = (struct AdapterControlBlock *)host->hostdata;
396 memset(acb, 0, sizeof (struct AdapterControlBlock));
397
398 error = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
399 if (error) {
400 error = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
401 if (error) {
402 printk(KERN_WARNING
403 "scsi%d: No suitable DMA mask available\n",
404 host->host_no);
405 goto out_host_put;
406 }
407 }
408 bus = pdev->bus->number;
409 dev_fun = pdev->devfn;
410 acb->host = host;
411 acb->pdev = pdev;
412 host->max_sectors = ARCMSR_MAX_XFER_SECTORS;
413 host->max_lun = ARCMSR_MAX_TARGETLUN;
414 host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/
415 host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/
416 host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES;
417 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
418 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
419 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
420 host->unique_id = (bus << 8) | dev_fun;
421 host->irq = pdev->irq;
422 error = pci_request_regions(pdev, "arcmsr");
423 if (error) {
424 goto out_host_put;
425 }
426 arcmsr_define_adapter_type(acb);
427
428 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
429 ACB_F_MESSAGE_RQBUFFER_CLEARED |
430 ACB_F_MESSAGE_WQBUFFER_READED);
431 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
432 INIT_LIST_HEAD(&acb->ccb_free_list);
433
434 error = arcmsr_alloc_ccb_pool(acb);
435 if (error)
436 goto out_release_regions;
437
438 error = request_irq(pdev->irq, arcmsr_do_interrupt,
439 IRQF_SHARED, "arcmsr", acb);
440 if (error)
441 goto out_free_ccb_pool;
442
443 arcmsr_iop_init(acb);
444 pci_set_drvdata(pdev, host);
445 if (strncmp(acb->firm_version, "V1.42", 5) >= 0)
446 host->max_sectors= ARCMSR_MAX_XFER_SECTORS_B;
447
448 error = scsi_add_host(host, &pdev->dev);
449 if (error)
450 goto out_free_irq;
451
452 error = arcmsr_alloc_sysfs_attr(acb);
453 if (error)
454 goto out_free_sysfs;
455
456 scsi_scan_host(host);
457 #ifdef CONFIG_SCSI_ARCMSR_AER
458 pci_enable_pcie_error_reporting(pdev);
459 #endif
460 return 0;
461 out_free_sysfs:
462 out_free_irq:
463 free_irq(pdev->irq, acb);
464 out_free_ccb_pool:
465 arcmsr_free_ccb_pool(acb);
466 out_release_regions:
467 pci_release_regions(pdev);
468 out_host_put:
469 scsi_host_put(host);
470 out_disable_device:
471 pci_disable_device(pdev);
472 out:
473 return error;
474 }
475
476 static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
477 {
478 struct MessageUnit_A __iomem *reg = acb->pmuA;
479 uint32_t Index;
480 uint8_t Retries = 0x00;
481
482 do {
483 for (Index = 0; Index < 100; Index++) {
484 if (readl(&reg->outbound_intstatus) &
485 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
486 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
487 &reg->outbound_intstatus);
488 return 0x00;
489 }
490 msleep(10);
491 }/*max 1 seconds*/
492
493 } while (Retries++ < 20);/*max 20 sec*/
494 return 0xff;
495 }
496
497 static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
498 {
499 struct MessageUnit_B *reg = acb->pmuB;
500 uint32_t Index;
501 uint8_t Retries = 0x00;
502
503 do {
504 for (Index = 0; Index < 100; Index++) {
505 if (readl(reg->iop2drv_doorbell_reg)
506 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
507 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
508 , reg->iop2drv_doorbell_reg);
509 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg);
510 return 0x00;
511 }
512 msleep(10);
513 }/*max 1 seconds*/
514
515 } while (Retries++ < 20);/*max 20 sec*/
516 return 0xff;
517 }
518
519 static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
520 {
521 struct MessageUnit_A __iomem *reg = acb->pmuA;
522
523 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
524 if (arcmsr_hba_wait_msgint_ready(acb))
525 printk(KERN_NOTICE
526 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
527 , acb->host->host_no);
528 }
529
530 static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
531 {
532 struct MessageUnit_B *reg = acb->pmuB;
533
534 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell_reg);
535 if (arcmsr_hbb_wait_msgint_ready(acb))
536 printk(KERN_NOTICE
537 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
538 , acb->host->host_no);
539 }
540
541 static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
542 {
543 switch (acb->adapter_type) {
544 case ACB_ADAPTER_TYPE_A: {
545 arcmsr_abort_hba_allcmd(acb);
546 }
547 break;
548
549 case ACB_ADAPTER_TYPE_B: {
550 arcmsr_abort_hbb_allcmd(acb);
551 }
552 }
553 }
554
555 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
556 {
557 struct scsi_cmnd *pcmd = ccb->pcmd;
558
559 scsi_dma_unmap(pcmd);
560 }
561
562 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag)
563 {
564 struct AdapterControlBlock *acb = ccb->acb;
565 struct scsi_cmnd *pcmd = ccb->pcmd;
566
567 arcmsr_pci_unmap_dma(ccb);
568 if (stand_flag == 1)
569 atomic_dec(&acb->ccboutstandingcount);
570 ccb->startdone = ARCMSR_CCB_DONE;
571 ccb->ccb_flags = 0;
572 list_add_tail(&ccb->list, &acb->ccb_free_list);
573 pcmd->scsi_done(pcmd);
574 }
575
576 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
577 {
578 struct MessageUnit_A __iomem *reg = acb->pmuA;
579 int retry_count = 30;
580
581 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
582 do {
583 if (!arcmsr_hba_wait_msgint_ready(acb))
584 break;
585 else {
586 retry_count--;
587 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
588 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
589 }
590 } while (retry_count != 0);
591 }
592
593 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
594 {
595 struct MessageUnit_B *reg = acb->pmuB;
596 int retry_count = 30;
597
598 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell_reg);
599 do {
600 if (!arcmsr_hbb_wait_msgint_ready(acb))
601 break;
602 else {
603 retry_count--;
604 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
605 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
606 }
607 } while (retry_count != 0);
608 }
609
610 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
611 {
612 switch (acb->adapter_type) {
613
614 case ACB_ADAPTER_TYPE_A: {
615 arcmsr_flush_hba_cache(acb);
616 }
617 break;
618
619 case ACB_ADAPTER_TYPE_B: {
620 arcmsr_flush_hbb_cache(acb);
621 }
622 }
623 }
624
625 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
626 {
627
628 struct scsi_cmnd *pcmd = ccb->pcmd;
629 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
630
631 pcmd->result = DID_OK << 16;
632 if (sensebuffer) {
633 int sense_data_length =
634 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
635 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
636 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
637 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
638 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
639 sensebuffer->Valid = 1;
640 }
641 }
642
643 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
644 {
645 u32 orig_mask = 0;
646 switch (acb->adapter_type) {
647
648 case ACB_ADAPTER_TYPE_A : {
649 struct MessageUnit_A __iomem *reg = acb->pmuA;
650 orig_mask = readl(&reg->outbound_intmask)|\
651 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE;
652 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
653 &reg->outbound_intmask);
654 }
655 break;
656
657 case ACB_ADAPTER_TYPE_B : {
658 struct MessageUnit_B *reg = acb->pmuB;
659 orig_mask = readl(reg->iop2drv_doorbell_mask_reg) & \
660 (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
661 writel(0, reg->iop2drv_doorbell_mask_reg);
662 }
663 break;
664 }
665 return orig_mask;
666 }
667
668 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \
669 struct CommandControlBlock *ccb, uint32_t flag_ccb)
670 {
671
672 uint8_t id, lun;
673 id = ccb->pcmd->device->id;
674 lun = ccb->pcmd->device->lun;
675 if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
676 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
677 acb->devstate[id][lun] = ARECA_RAID_GOOD;
678 ccb->pcmd->result = DID_OK << 16;
679 arcmsr_ccb_complete(ccb, 1);
680 } else {
681 switch (ccb->arcmsr_cdb.DeviceStatus) {
682 case ARCMSR_DEV_SELECT_TIMEOUT: {
683 acb->devstate[id][lun] = ARECA_RAID_GONE;
684 ccb->pcmd->result = DID_NO_CONNECT << 16;
685 arcmsr_ccb_complete(ccb, 1);
686 }
687 break;
688
689 case ARCMSR_DEV_ABORTED:
690
691 case ARCMSR_DEV_INIT_FAIL: {
692 acb->devstate[id][lun] = ARECA_RAID_GONE;
693 ccb->pcmd->result = DID_BAD_TARGET << 16;
694 arcmsr_ccb_complete(ccb, 1);
695 }
696 break;
697
698 case ARCMSR_DEV_CHECK_CONDITION: {
699 acb->devstate[id][lun] = ARECA_RAID_GOOD;
700 arcmsr_report_sense_info(ccb);
701 arcmsr_ccb_complete(ccb, 1);
702 }
703 break;
704
705 default:
706 printk(KERN_NOTICE
707 "arcmsr%d: scsi id = %d lun = %d"
708 " isr get command error done, "
709 "but got unknown DeviceStatus = 0x%x \n"
710 , acb->host->host_no
711 , id
712 , lun
713 , ccb->arcmsr_cdb.DeviceStatus);
714 acb->devstate[id][lun] = ARECA_RAID_GONE;
715 ccb->pcmd->result = DID_NO_CONNECT << 16;
716 arcmsr_ccb_complete(ccb, 1);
717 break;
718 }
719 }
720 }
721
722 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, uint32_t flag_ccb)
723
724 {
725 struct CommandControlBlock *ccb;
726
727 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5));
728 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
729 if (ccb->startdone == ARCMSR_CCB_ABORTED) {
730 struct scsi_cmnd *abortcmd = ccb->pcmd;
731 if (abortcmd) {
732 abortcmd->result |= DID_ABORT << 16;
733 arcmsr_ccb_complete(ccb, 1);
734 printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \
735 isr got aborted command \n", acb->host->host_no, ccb);
736 }
737 }
738 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
739 done acb = '0x%p'"
740 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
741 " ccboutstandingcount = %d \n"
742 , acb->host->host_no
743 , acb
744 , ccb
745 , ccb->acb
746 , ccb->startdone
747 , atomic_read(&acb->ccboutstandingcount));
748 }
749 else
750 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
751 }
752
753 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
754 {
755 int i = 0;
756 uint32_t flag_ccb;
757
758 switch (acb->adapter_type) {
759
760 case ACB_ADAPTER_TYPE_A: {
761 struct MessageUnit_A __iomem *reg = acb->pmuA;
762 uint32_t outbound_intstatus;
763 outbound_intstatus = readl(&reg->outbound_intstatus) &
764 acb->outbound_int_enable;
765 /*clear and abort all outbound posted Q*/
766 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
767 while (((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
768 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
769 arcmsr_drain_donequeue(acb, flag_ccb);
770 }
771 }
772 break;
773
774 case ACB_ADAPTER_TYPE_B: {
775 struct MessageUnit_B *reg = acb->pmuB;
776 /*clear all outbound posted Q*/
777 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
778 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
779 writel(0, &reg->done_qbuffer[i]);
780 arcmsr_drain_donequeue(acb, flag_ccb);
781 }
782 writel(0, &reg->post_qbuffer[i]);
783 }
784 reg->doneq_index = 0;
785 reg->postq_index = 0;
786 }
787 break;
788 }
789 }
790 static void arcmsr_remove(struct pci_dev *pdev)
791 {
792 struct Scsi_Host *host = pci_get_drvdata(pdev);
793 struct AdapterControlBlock *acb =
794 (struct AdapterControlBlock *) host->hostdata;
795 int poll_count = 0;
796
797 arcmsr_free_sysfs_attr(acb);
798 scsi_remove_host(host);
799 arcmsr_stop_adapter_bgrb(acb);
800 arcmsr_flush_adapter_cache(acb);
801 arcmsr_disable_outbound_ints(acb);
802 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
803 acb->acb_flags &= ~ACB_F_IOP_INITED;
804
805 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++) {
806 if (!atomic_read(&acb->ccboutstandingcount))
807 break;
808 arcmsr_interrupt(acb);/* FIXME: need spinlock */
809 msleep(25);
810 }
811
812 if (atomic_read(&acb->ccboutstandingcount)) {
813 int i;
814
815 arcmsr_abort_allcmd(acb);
816 arcmsr_done4abort_postqueue(acb);
817 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
818 struct CommandControlBlock *ccb = acb->pccb_pool[i];
819 if (ccb->startdone == ARCMSR_CCB_START) {
820 ccb->startdone = ARCMSR_CCB_ABORTED;
821 ccb->pcmd->result = DID_ABORT << 16;
822 arcmsr_ccb_complete(ccb, 1);
823 }
824 }
825 }
826
827 free_irq(pdev->irq, acb);
828 arcmsr_free_ccb_pool(acb);
829 pci_release_regions(pdev);
830
831 scsi_host_put(host);
832
833 pci_disable_device(pdev);
834 pci_set_drvdata(pdev, NULL);
835 }
836
837 static void arcmsr_shutdown(struct pci_dev *pdev)
838 {
839 struct Scsi_Host *host = pci_get_drvdata(pdev);
840 struct AdapterControlBlock *acb =
841 (struct AdapterControlBlock *)host->hostdata;
842
843 arcmsr_stop_adapter_bgrb(acb);
844 arcmsr_flush_adapter_cache(acb);
845 }
846
847 static int arcmsr_module_init(void)
848 {
849 int error = 0;
850
851 error = pci_register_driver(&arcmsr_pci_driver);
852 return error;
853 }
854
855 static void arcmsr_module_exit(void)
856 {
857 pci_unregister_driver(&arcmsr_pci_driver);
858 }
859 module_init(arcmsr_module_init);
860 module_exit(arcmsr_module_exit);
861
862 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, \
863 u32 intmask_org)
864 {
865 u32 mask;
866
867 switch (acb->adapter_type) {
868
869 case ACB_ADAPTER_TYPE_A : {
870 struct MessageUnit_A __iomem *reg = acb->pmuA;
871 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
872 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
873 writel(mask, &reg->outbound_intmask);
874 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
875 }
876 break;
877
878 case ACB_ADAPTER_TYPE_B : {
879 struct MessageUnit_B *reg = acb->pmuB;
880 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | \
881 ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE);
882 writel(mask, reg->iop2drv_doorbell_mask_reg);
883 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
884 }
885 }
886 }
887
888 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
889 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
890 {
891 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
892 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
893 __le32 address_lo, address_hi;
894 int arccdbsize = 0x30;
895 int nseg;
896
897 ccb->pcmd = pcmd;
898 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
899 arcmsr_cdb->Bus = 0;
900 arcmsr_cdb->TargetID = pcmd->device->id;
901 arcmsr_cdb->LUN = pcmd->device->lun;
902 arcmsr_cdb->Function = 1;
903 arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len;
904 arcmsr_cdb->Context = (unsigned long)arcmsr_cdb;
905 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
906
907 nseg = scsi_dma_map(pcmd);
908 if (nseg > ARCMSR_MAX_SG_ENTRIES)
909 return FAILED;
910 BUG_ON(nseg < 0);
911
912 if (nseg) {
913 __le32 length;
914 int i, cdb_sgcount = 0;
915 struct scatterlist *sg;
916
917 /* map stor port SG list to our iop SG List. */
918 scsi_for_each_sg(pcmd, sg, nseg, i) {
919 /* Get the physical address of the current data pointer */
920 length = cpu_to_le32(sg_dma_len(sg));
921 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
922 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
923 if (address_hi == 0) {
924 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
925
926 pdma_sg->address = address_lo;
927 pdma_sg->length = length;
928 psge += sizeof (struct SG32ENTRY);
929 arccdbsize += sizeof (struct SG32ENTRY);
930 } else {
931 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
932
933 pdma_sg->addresshigh = address_hi;
934 pdma_sg->address = address_lo;
935 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
936 psge += sizeof (struct SG64ENTRY);
937 arccdbsize += sizeof (struct SG64ENTRY);
938 }
939 cdb_sgcount++;
940 }
941 arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount;
942 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
943 if ( arccdbsize > 256)
944 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
945 }
946 if (pcmd->sc_data_direction == DMA_TO_DEVICE ) {
947 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
948 ccb->ccb_flags |= CCB_FLAG_WRITE;
949 }
950 return SUCCESS;
951 }
952
953 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
954 {
955 uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr;
956 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
957 atomic_inc(&acb->ccboutstandingcount);
958 ccb->startdone = ARCMSR_CCB_START;
959
960 switch (acb->adapter_type) {
961 case ACB_ADAPTER_TYPE_A: {
962 struct MessageUnit_A __iomem *reg = acb->pmuA;
963
964 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
965 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
966 &reg->inbound_queueport);
967 else {
968 writel(cdb_shifted_phyaddr, &reg->inbound_queueport);
969 }
970 }
971 break;
972
973 case ACB_ADAPTER_TYPE_B: {
974 struct MessageUnit_B *reg = acb->pmuB;
975 uint32_t ending_index, index = reg->postq_index;
976
977 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
978 writel(0, &reg->post_qbuffer[ending_index]);
979 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
980 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
981 &reg->post_qbuffer[index]);
982 }
983 else {
984 writel(cdb_shifted_phyaddr, &reg->post_qbuffer[index]);
985 }
986 index++;
987 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
988 reg->postq_index = index;
989 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell_reg);
990 }
991 break;
992 }
993 }
994
995 static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
996 {
997 struct MessageUnit_A __iomem *reg = acb->pmuA;
998 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
999 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1000
1001 if (arcmsr_hba_wait_msgint_ready(acb)) {
1002 printk(KERN_NOTICE
1003 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1004 , acb->host->host_no);
1005 }
1006 }
1007
1008 static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1009 {
1010 struct MessageUnit_B *reg = acb->pmuB;
1011 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1012 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell_reg);
1013
1014 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1015 printk(KERN_NOTICE
1016 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1017 , acb->host->host_no);
1018 }
1019 }
1020
1021 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1022 {
1023 switch (acb->adapter_type) {
1024 case ACB_ADAPTER_TYPE_A: {
1025 arcmsr_stop_hba_bgrb(acb);
1026 }
1027 break;
1028
1029 case ACB_ADAPTER_TYPE_B: {
1030 arcmsr_stop_hbb_bgrb(acb);
1031 }
1032 break;
1033 }
1034 }
1035
1036 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1037 {
1038 switch (acb->adapter_type) {
1039 case ACB_ADAPTER_TYPE_A: {
1040 iounmap(acb->pmuA);
1041 dma_free_coherent(&acb->pdev->dev,
1042 ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20,
1043 acb->dma_coherent,
1044 acb->dma_coherent_handle);
1045 break;
1046 }
1047 case ACB_ADAPTER_TYPE_B: {
1048 struct MessageUnit_B *reg = acb->pmuB;
1049 iounmap(reg->drv2iop_doorbell_reg - ARCMSR_DRV2IOP_DOORBELL);
1050 iounmap(reg->ioctl_wbuffer_reg - ARCMSR_IOCTL_WBUFFER);
1051 dma_free_coherent(&acb->pdev->dev,
1052 (ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 +
1053 sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle);
1054 }
1055 }
1056
1057 }
1058
1059 void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1060 {
1061 switch (acb->adapter_type) {
1062 case ACB_ADAPTER_TYPE_A: {
1063 struct MessageUnit_A __iomem *reg = acb->pmuA;
1064 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1065 }
1066 break;
1067
1068 case ACB_ADAPTER_TYPE_B: {
1069 struct MessageUnit_B *reg = acb->pmuB;
1070 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg);
1071 }
1072 break;
1073 }
1074 }
1075
1076 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1077 {
1078 switch (acb->adapter_type) {
1079 case ACB_ADAPTER_TYPE_A: {
1080 struct MessageUnit_A __iomem *reg = acb->pmuA;
1081 /*
1082 ** push inbound doorbell tell iop, driver data write ok
1083 ** and wait reply on next hwinterrupt for next Qbuffer post
1084 */
1085 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1086 }
1087 break;
1088
1089 case ACB_ADAPTER_TYPE_B: {
1090 struct MessageUnit_B *reg = acb->pmuB;
1091 /*
1092 ** push inbound doorbell tell iop, driver data write ok
1093 ** and wait reply on next hwinterrupt for next Qbuffer post
1094 */
1095 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell_reg);
1096 }
1097 break;
1098 }
1099 }
1100
1101 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1102 {
1103 struct QBUFFER __iomem *qbuffer = NULL;
1104
1105 switch (acb->adapter_type) {
1106
1107 case ACB_ADAPTER_TYPE_A: {
1108 struct MessageUnit_A __iomem *reg = acb->pmuA;
1109 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1110 }
1111 break;
1112
1113 case ACB_ADAPTER_TYPE_B: {
1114 struct MessageUnit_B *reg = acb->pmuB;
1115 qbuffer = (struct QBUFFER __iomem *)reg->ioctl_rbuffer_reg;
1116 }
1117 break;
1118 }
1119 return qbuffer;
1120 }
1121
1122 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
1123 {
1124 struct QBUFFER __iomem *pqbuffer = NULL;
1125
1126 switch (acb->adapter_type) {
1127
1128 case ACB_ADAPTER_TYPE_A: {
1129 struct MessageUnit_A __iomem *reg = acb->pmuA;
1130 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
1131 }
1132 break;
1133
1134 case ACB_ADAPTER_TYPE_B: {
1135 struct MessageUnit_B *reg = acb->pmuB;
1136 pqbuffer = (struct QBUFFER __iomem *)reg->ioctl_wbuffer_reg;
1137 }
1138 break;
1139 }
1140 return pqbuffer;
1141 }
1142
1143 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1144 {
1145 struct QBUFFER __iomem *prbuffer;
1146 struct QBUFFER *pQbuffer;
1147 uint8_t __iomem *iop_data;
1148 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
1149
1150 rqbuf_lastindex = acb->rqbuf_lastindex;
1151 rqbuf_firstindex = acb->rqbuf_firstindex;
1152 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1153 iop_data = (uint8_t __iomem *)prbuffer->data;
1154 iop_len = prbuffer->data_len;
1155 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1);
1156
1157 if (my_empty_len >= iop_len)
1158 {
1159 while (iop_len > 0) {
1160 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
1161 memcpy(pQbuffer, iop_data,1);
1162 rqbuf_lastindex++;
1163 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1164 iop_data++;
1165 iop_len--;
1166 }
1167 acb->rqbuf_lastindex = rqbuf_lastindex;
1168 arcmsr_iop_message_read(acb);
1169 }
1170
1171 else {
1172 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1173 }
1174 }
1175
1176 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1177 {
1178 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1179 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1180 uint8_t *pQbuffer;
1181 struct QBUFFER __iomem *pwbuffer;
1182 uint8_t __iomem *iop_data;
1183 int32_t allxfer_len = 0;
1184
1185 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1186 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1187 iop_data = (uint8_t __iomem *)pwbuffer->data;
1188
1189 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1190 (allxfer_len < 124)) {
1191 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1192 memcpy(iop_data, pQbuffer, 1);
1193 acb->wqbuf_firstindex++;
1194 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1195 iop_data++;
1196 allxfer_len++;
1197 }
1198 pwbuffer->data_len = allxfer_len;
1199
1200 arcmsr_iop_message_wrote(acb);
1201 }
1202
1203 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1204 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1205 }
1206 }
1207
1208 static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1209 {
1210 uint32_t outbound_doorbell;
1211 struct MessageUnit_A __iomem *reg = acb->pmuA;
1212
1213 outbound_doorbell = readl(&reg->outbound_doorbell);
1214 writel(outbound_doorbell, &reg->outbound_doorbell);
1215 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1216 arcmsr_iop2drv_data_wrote_handle(acb);
1217 }
1218
1219 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
1220 arcmsr_iop2drv_data_read_handle(acb);
1221 }
1222 }
1223
1224 static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1225 {
1226 uint32_t flag_ccb;
1227 struct MessageUnit_A __iomem *reg = acb->pmuA;
1228
1229 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
1230 arcmsr_drain_donequeue(acb, flag_ccb);
1231 }
1232 }
1233
1234 static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1235 {
1236 uint32_t index;
1237 uint32_t flag_ccb;
1238 struct MessageUnit_B *reg = acb->pmuB;
1239
1240 index = reg->doneq_index;
1241
1242 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1243 writel(0, &reg->done_qbuffer[index]);
1244 arcmsr_drain_donequeue(acb, flag_ccb);
1245 index++;
1246 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1247 reg->doneq_index = index;
1248 }
1249 }
1250
1251 static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1252 {
1253 uint32_t outbound_intstatus;
1254 struct MessageUnit_A __iomem *reg = acb->pmuA;
1255
1256 outbound_intstatus = readl(&reg->outbound_intstatus) & \
1257 acb->outbound_int_enable;
1258 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1259 return 1;
1260 }
1261 writel(outbound_intstatus, &reg->outbound_intstatus);
1262 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1263 arcmsr_hba_doorbell_isr(acb);
1264 }
1265 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
1266 arcmsr_hba_postqueue_isr(acb);
1267 }
1268 return 0;
1269 }
1270
1271 static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1272 {
1273 uint32_t outbound_doorbell;
1274 struct MessageUnit_B *reg = acb->pmuB;
1275
1276 outbound_doorbell = readl(reg->iop2drv_doorbell_reg) & \
1277 acb->outbound_int_enable;
1278 if (!outbound_doorbell)
1279 return 1;
1280
1281 writel(~outbound_doorbell, reg->iop2drv_doorbell_reg);
1282 /*in case the last action of doorbell interrupt clearance is cached, this action can push HW to write down the clear bit*/
1283 readl(reg->iop2drv_doorbell_reg);
1284 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg);
1285 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
1286 arcmsr_iop2drv_data_wrote_handle(acb);
1287 }
1288 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1289 arcmsr_iop2drv_data_read_handle(acb);
1290 }
1291 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1292 arcmsr_hbb_postqueue_isr(acb);
1293 }
1294
1295 return 0;
1296 }
1297
1298 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1299 {
1300 switch (acb->adapter_type) {
1301 case ACB_ADAPTER_TYPE_A: {
1302 if (arcmsr_handle_hba_isr(acb)) {
1303 return IRQ_NONE;
1304 }
1305 }
1306 break;
1307
1308 case ACB_ADAPTER_TYPE_B: {
1309 if (arcmsr_handle_hbb_isr(acb)) {
1310 return IRQ_NONE;
1311 }
1312 }
1313 break;
1314 }
1315 return IRQ_HANDLED;
1316 }
1317
1318 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1319 {
1320 if (acb) {
1321 /* stop adapter background rebuild */
1322 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
1323 uint32_t intmask_org;
1324 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1325 intmask_org = arcmsr_disable_outbound_ints(acb);
1326 arcmsr_stop_adapter_bgrb(acb);
1327 arcmsr_flush_adapter_cache(acb);
1328 arcmsr_enable_outbound_ints(acb, intmask_org);
1329 }
1330 }
1331 }
1332
1333 void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
1334 {
1335 int32_t wqbuf_firstindex, wqbuf_lastindex;
1336 uint8_t *pQbuffer;
1337 struct QBUFFER __iomem *pwbuffer;
1338 uint8_t __iomem *iop_data;
1339 int32_t allxfer_len = 0;
1340
1341 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1342 iop_data = (uint8_t __iomem *)pwbuffer->data;
1343 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1344 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1345 wqbuf_firstindex = acb->wqbuf_firstindex;
1346 wqbuf_lastindex = acb->wqbuf_lastindex;
1347 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1348 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1349 memcpy(iop_data, pQbuffer, 1);
1350 wqbuf_firstindex++;
1351 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1352 iop_data++;
1353 allxfer_len++;
1354 }
1355 acb->wqbuf_firstindex = wqbuf_firstindex;
1356 pwbuffer->data_len = allxfer_len;
1357 arcmsr_iop_message_wrote(acb);
1358 }
1359 }
1360
1361 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, \
1362 struct scsi_cmnd *cmd)
1363 {
1364 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1365 int retvalue = 0, transfer_len = 0;
1366 char *buffer;
1367 struct scatterlist *sg;
1368 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1369 (uint32_t ) cmd->cmnd[6] << 16 |
1370 (uint32_t ) cmd->cmnd[7] << 8 |
1371 (uint32_t ) cmd->cmnd[8];
1372 /* 4 bytes: Areca io control code */
1373
1374 sg = scsi_sglist(cmd);
1375 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
1376 if (scsi_sg_count(cmd) > 1) {
1377 retvalue = ARCMSR_MESSAGE_FAIL;
1378 goto message_out;
1379 }
1380 transfer_len += sg->length;
1381
1382 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1383 retvalue = ARCMSR_MESSAGE_FAIL;
1384 goto message_out;
1385 }
1386 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1387 switch(controlcode) {
1388
1389 case ARCMSR_MESSAGE_READ_RQBUFFER: {
1390 unsigned char *ver_addr;
1391 uint8_t *pQbuffer, *ptmpQbuffer;
1392 int32_t allxfer_len = 0;
1393
1394 ver_addr = kmalloc(1032, GFP_ATOMIC);
1395 if (!ver_addr) {
1396 retvalue = ARCMSR_MESSAGE_FAIL;
1397 goto message_out;
1398 }
1399 ptmpQbuffer = ver_addr;
1400 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1401 && (allxfer_len < 1031)) {
1402 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1403 memcpy(ptmpQbuffer, pQbuffer, 1);
1404 acb->rqbuf_firstindex++;
1405 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1406 ptmpQbuffer++;
1407 allxfer_len++;
1408 }
1409 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1410
1411 struct QBUFFER __iomem *prbuffer;
1412 uint8_t __iomem *iop_data;
1413 int32_t iop_len;
1414
1415 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1416 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1417 iop_data = prbuffer->data;
1418 iop_len = readl(&prbuffer->data_len);
1419 while (iop_len > 0) {
1420 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1421 acb->rqbuf_lastindex++;
1422 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1423 iop_data++;
1424 iop_len--;
1425 }
1426 arcmsr_iop_message_read(acb);
1427 }
1428 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
1429 pcmdmessagefld->cmdmessage.Length = allxfer_len;
1430 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1431 kfree(ver_addr);
1432 }
1433 break;
1434
1435 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
1436 unsigned char *ver_addr;
1437 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1438 uint8_t *pQbuffer, *ptmpuserbuffer;
1439
1440 ver_addr = kmalloc(1032, GFP_ATOMIC);
1441 if (!ver_addr) {
1442 retvalue = ARCMSR_MESSAGE_FAIL;
1443 goto message_out;
1444 }
1445 ptmpuserbuffer = ver_addr;
1446 user_len = pcmdmessagefld->cmdmessage.Length;
1447 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1448 wqbuf_lastindex = acb->wqbuf_lastindex;
1449 wqbuf_firstindex = acb->wqbuf_firstindex;
1450 if (wqbuf_lastindex != wqbuf_firstindex) {
1451 struct SENSE_DATA *sensebuffer =
1452 (struct SENSE_DATA *)cmd->sense_buffer;
1453 arcmsr_post_ioctldata2iop(acb);
1454 /* has error report sensedata */
1455 sensebuffer->ErrorCode = 0x70;
1456 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1457 sensebuffer->AdditionalSenseLength = 0x0A;
1458 sensebuffer->AdditionalSenseCode = 0x20;
1459 sensebuffer->Valid = 1;
1460 retvalue = ARCMSR_MESSAGE_FAIL;
1461 } else {
1462 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1463 &(ARCMSR_MAX_QBUFFER - 1);
1464 if (my_empty_len >= user_len) {
1465 while (user_len > 0) {
1466 pQbuffer =
1467 &acb->wqbuffer[acb->wqbuf_lastindex];
1468 memcpy(pQbuffer, ptmpuserbuffer, 1);
1469 acb->wqbuf_lastindex++;
1470 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1471 ptmpuserbuffer++;
1472 user_len--;
1473 }
1474 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1475 acb->acb_flags &=
1476 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1477 arcmsr_post_ioctldata2iop(acb);
1478 }
1479 } else {
1480 /* has error report sensedata */
1481 struct SENSE_DATA *sensebuffer =
1482 (struct SENSE_DATA *)cmd->sense_buffer;
1483 sensebuffer->ErrorCode = 0x70;
1484 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1485 sensebuffer->AdditionalSenseLength = 0x0A;
1486 sensebuffer->AdditionalSenseCode = 0x20;
1487 sensebuffer->Valid = 1;
1488 retvalue = ARCMSR_MESSAGE_FAIL;
1489 }
1490 }
1491 kfree(ver_addr);
1492 }
1493 break;
1494
1495 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
1496 uint8_t *pQbuffer = acb->rqbuffer;
1497
1498 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1499 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1500 arcmsr_iop_message_read(acb);
1501 }
1502 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1503 acb->rqbuf_firstindex = 0;
1504 acb->rqbuf_lastindex = 0;
1505 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1506 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1507 }
1508 break;
1509
1510 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
1511 uint8_t *pQbuffer = acb->wqbuffer;
1512
1513 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1514 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1515 arcmsr_iop_message_read(acb);
1516 }
1517 acb->acb_flags |=
1518 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1519 ACB_F_MESSAGE_WQBUFFER_READED);
1520 acb->wqbuf_firstindex = 0;
1521 acb->wqbuf_lastindex = 0;
1522 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1523 pcmdmessagefld->cmdmessage.ReturnCode =
1524 ARCMSR_MESSAGE_RETURNCODE_OK;
1525 }
1526 break;
1527
1528 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
1529 uint8_t *pQbuffer;
1530
1531 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1532 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1533 arcmsr_iop_message_read(acb);
1534 }
1535 acb->acb_flags |=
1536 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1537 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1538 | ACB_F_MESSAGE_WQBUFFER_READED);
1539 acb->rqbuf_firstindex = 0;
1540 acb->rqbuf_lastindex = 0;
1541 acb->wqbuf_firstindex = 0;
1542 acb->wqbuf_lastindex = 0;
1543 pQbuffer = acb->rqbuffer;
1544 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1545 pQbuffer = acb->wqbuffer;
1546 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1547 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1548 }
1549 break;
1550
1551 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
1552 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
1553 }
1554 break;
1555
1556 case ARCMSR_MESSAGE_SAY_HELLO: {
1557 int8_t *hello_string = "Hello! I am ARCMSR";
1558
1559 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1560 , (int16_t)strlen(hello_string));
1561 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1562 }
1563 break;
1564
1565 case ARCMSR_MESSAGE_SAY_GOODBYE:
1566 arcmsr_iop_parking(acb);
1567 break;
1568
1569 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
1570 arcmsr_flush_adapter_cache(acb);
1571 break;
1572
1573 default:
1574 retvalue = ARCMSR_MESSAGE_FAIL;
1575 }
1576 message_out:
1577 sg = scsi_sglist(cmd);
1578 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1579 return retvalue;
1580 }
1581
1582 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
1583 {
1584 struct list_head *head = &acb->ccb_free_list;
1585 struct CommandControlBlock *ccb = NULL;
1586
1587 if (!list_empty(head)) {
1588 ccb = list_entry(head->next, struct CommandControlBlock, list);
1589 list_del(head->next);
1590 }
1591 return ccb;
1592 }
1593
1594 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
1595 struct scsi_cmnd *cmd)
1596 {
1597 switch (cmd->cmnd[0]) {
1598 case INQUIRY: {
1599 unsigned char inqdata[36];
1600 char *buffer;
1601 struct scatterlist *sg;
1602
1603 if (cmd->device->lun) {
1604 cmd->result = (DID_TIME_OUT << 16);
1605 cmd->scsi_done(cmd);
1606 return;
1607 }
1608 inqdata[0] = TYPE_PROCESSOR;
1609 /* Periph Qualifier & Periph Dev Type */
1610 inqdata[1] = 0;
1611 /* rem media bit & Dev Type Modifier */
1612 inqdata[2] = 0;
1613 /* ISO, ECMA, & ANSI versions */
1614 inqdata[4] = 31;
1615 /* length of additional data */
1616 strncpy(&inqdata[8], "Areca ", 8);
1617 /* Vendor Identification */
1618 strncpy(&inqdata[16], "RAID controller ", 16);
1619 /* Product Identification */
1620 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
1621
1622 sg = scsi_sglist(cmd);
1623 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
1624
1625 memcpy(buffer, inqdata, sizeof(inqdata));
1626 sg = scsi_sglist(cmd);
1627 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1628
1629 cmd->scsi_done(cmd);
1630 }
1631 break;
1632 case WRITE_BUFFER:
1633 case READ_BUFFER: {
1634 if (arcmsr_iop_message_xfer(acb, cmd))
1635 cmd->result = (DID_ERROR << 16);
1636 cmd->scsi_done(cmd);
1637 }
1638 break;
1639 default:
1640 cmd->scsi_done(cmd);
1641 }
1642 }
1643
1644 static int arcmsr_queue_command(struct scsi_cmnd *cmd,
1645 void (* done)(struct scsi_cmnd *))
1646 {
1647 struct Scsi_Host *host = cmd->device->host;
1648 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
1649 struct CommandControlBlock *ccb;
1650 int target = cmd->device->id;
1651 int lun = cmd->device->lun;
1652
1653 cmd->scsi_done = done;
1654 cmd->host_scribble = NULL;
1655 cmd->result = 0;
1656 if (acb->acb_flags & ACB_F_BUS_RESET) {
1657 printk(KERN_NOTICE "arcmsr%d: bus reset"
1658 " and return busy \n"
1659 , acb->host->host_no);
1660 return SCSI_MLQUEUE_HOST_BUSY;
1661 }
1662 if (target == 16) {
1663 /* virtual device for iop message transfer */
1664 arcmsr_handle_virtual_command(acb, cmd);
1665 return 0;
1666 }
1667 if (acb->devstate[target][lun] == ARECA_RAID_GONE) {
1668 uint8_t block_cmd;
1669
1670 block_cmd = cmd->cmnd[0] & 0x0f;
1671 if (block_cmd == 0x08 || block_cmd == 0x0a) {
1672 printk(KERN_NOTICE
1673 "arcmsr%d: block 'read/write'"
1674 "command with gone raid volume"
1675 " Cmd = %2x, TargetId = %d, Lun = %d \n"
1676 , acb->host->host_no
1677 , cmd->cmnd[0]
1678 , target, lun);
1679 cmd->result = (DID_NO_CONNECT << 16);
1680 cmd->scsi_done(cmd);
1681 return 0;
1682 }
1683 }
1684 if (atomic_read(&acb->ccboutstandingcount) >=
1685 ARCMSR_MAX_OUTSTANDING_CMD)
1686 return SCSI_MLQUEUE_HOST_BUSY;
1687
1688 ccb = arcmsr_get_freeccb(acb);
1689 if (!ccb)
1690 return SCSI_MLQUEUE_HOST_BUSY;
1691 if ( arcmsr_build_ccb( acb, ccb, cmd ) == FAILED ) {
1692 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
1693 cmd->scsi_done(cmd);
1694 return 0;
1695 }
1696 arcmsr_post_ccb(acb, ccb);
1697 return 0;
1698 }
1699
1700 static void arcmsr_get_hba_config(struct AdapterControlBlock *acb)
1701 {
1702 struct MessageUnit_A __iomem *reg = acb->pmuA;
1703 char *acb_firm_model = acb->firm_model;
1704 char *acb_firm_version = acb->firm_version;
1705 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
1706 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
1707 int count;
1708
1709 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
1710 if (arcmsr_hba_wait_msgint_ready(acb)) {
1711 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
1712 miscellaneous data' timeout \n", acb->host->host_no);
1713 }
1714
1715 count = 8;
1716 while (count) {
1717 *acb_firm_model = readb(iop_firm_model);
1718 acb_firm_model++;
1719 iop_firm_model++;
1720 count--;
1721 }
1722
1723 count = 16;
1724 while (count) {
1725 *acb_firm_version = readb(iop_firm_version);
1726 acb_firm_version++;
1727 iop_firm_version++;
1728 count--;
1729 }
1730
1731 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n"
1732 , acb->host->host_no
1733 , acb->firm_version);
1734
1735 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
1736 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
1737 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
1738 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
1739 }
1740
1741 static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
1742 {
1743 struct MessageUnit_B *reg = acb->pmuB;
1744 uint32_t __iomem *lrwbuffer = reg->msgcode_rwbuffer_reg;
1745 char *acb_firm_model = acb->firm_model;
1746 char *acb_firm_version = acb->firm_version;
1747 char __iomem *iop_firm_model = (char __iomem *)(&lrwbuffer[15]);
1748 /*firm_model,15,60-67*/
1749 char __iomem *iop_firm_version = (char __iomem *)(&lrwbuffer[17]);
1750 /*firm_version,17,68-83*/
1751 int count;
1752
1753 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg);
1754 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1755 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
1756 miscellaneous data' timeout \n", acb->host->host_no);
1757 }
1758
1759 count = 8;
1760 while (count)
1761 {
1762 *acb_firm_model = readb(iop_firm_model);
1763 acb_firm_model++;
1764 iop_firm_model++;
1765 count--;
1766 }
1767
1768 count = 16;
1769 while (count)
1770 {
1771 *acb_firm_version = readb(iop_firm_version);
1772 acb_firm_version++;
1773 iop_firm_version++;
1774 count--;
1775 }
1776
1777 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n",
1778 acb->host->host_no,
1779 acb->firm_version);
1780
1781 lrwbuffer++;
1782 acb->firm_request_len = readl(lrwbuffer++);
1783 /*firm_request_len,1,04-07*/
1784 acb->firm_numbers_queue = readl(lrwbuffer++);
1785 /*firm_numbers_queue,2,08-11*/
1786 acb->firm_sdram_size = readl(lrwbuffer++);
1787 /*firm_sdram_size,3,12-15*/
1788 acb->firm_hd_channels = readl(lrwbuffer);
1789 /*firm_ide_channels,4,16-19*/
1790 }
1791
1792 static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
1793 {
1794 switch (acb->adapter_type) {
1795 case ACB_ADAPTER_TYPE_A: {
1796 arcmsr_get_hba_config(acb);
1797 }
1798 break;
1799
1800 case ACB_ADAPTER_TYPE_B: {
1801 arcmsr_get_hbb_config(acb);
1802 }
1803 break;
1804 }
1805 }
1806
1807 static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
1808 struct CommandControlBlock *poll_ccb)
1809 {
1810 struct MessageUnit_A __iomem *reg = acb->pmuA;
1811 struct CommandControlBlock *ccb;
1812 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
1813
1814 polling_hba_ccb_retry:
1815 poll_count++;
1816 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
1817 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1818 while (1) {
1819 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
1820 if (poll_ccb_done)
1821 break;
1822 else {
1823 msleep(25);
1824 if (poll_count > 100)
1825 break;
1826 goto polling_hba_ccb_retry;
1827 }
1828 }
1829 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5));
1830 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
1831 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
1832 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
1833 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
1834 " poll command abort successfully \n"
1835 , acb->host->host_no
1836 , ccb->pcmd->device->id
1837 , ccb->pcmd->device->lun
1838 , ccb);
1839 ccb->pcmd->result = DID_ABORT << 16;
1840 arcmsr_ccb_complete(ccb, 1);
1841 poll_ccb_done = 1;
1842 continue;
1843 }
1844 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
1845 " command done ccb = '0x%p'"
1846 "ccboutstandingcount = %d \n"
1847 , acb->host->host_no
1848 , ccb
1849 , atomic_read(&acb->ccboutstandingcount));
1850 continue;
1851 }
1852 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
1853 }
1854 }
1855
1856 static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
1857 struct CommandControlBlock *poll_ccb)
1858 {
1859 struct MessageUnit_B *reg = acb->pmuB;
1860 struct CommandControlBlock *ccb;
1861 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
1862 int index;
1863
1864 polling_hbb_ccb_retry:
1865 poll_count++;
1866 /* clear doorbell interrupt */
1867 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg);
1868 while (1) {
1869 index = reg->doneq_index;
1870 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
1871 if (poll_ccb_done)
1872 break;
1873 else {
1874 msleep(25);
1875 if (poll_count > 100)
1876 break;
1877 goto polling_hbb_ccb_retry;
1878 }
1879 }
1880 writel(0, &reg->done_qbuffer[index]);
1881 index++;
1882 /*if last index number set it to 0 */
1883 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1884 reg->doneq_index = index;
1885 /* check ifcommand done with no error*/
1886 ccb = (struct CommandControlBlock *)\
1887 (acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1888 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
1889 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
1890 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
1891 printk(KERN_NOTICE "arcmsr%d: \
1892 scsi id = %d lun = %d ccb = '0x%p' poll command abort successfully \n"
1893 ,acb->host->host_no
1894 ,ccb->pcmd->device->id
1895 ,ccb->pcmd->device->lun
1896 ,ccb);
1897 ccb->pcmd->result = DID_ABORT << 16;
1898 arcmsr_ccb_complete(ccb, 1);
1899 continue;
1900 }
1901 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
1902 " command done ccb = '0x%p'"
1903 "ccboutstandingcount = %d \n"
1904 , acb->host->host_no
1905 , ccb
1906 , atomic_read(&acb->ccboutstandingcount));
1907 continue;
1908 }
1909 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
1910 } /*drain reply FIFO*/
1911 }
1912
1913 static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
1914 struct CommandControlBlock *poll_ccb)
1915 {
1916 switch (acb->adapter_type) {
1917
1918 case ACB_ADAPTER_TYPE_A: {
1919 arcmsr_polling_hba_ccbdone(acb,poll_ccb);
1920 }
1921 break;
1922
1923 case ACB_ADAPTER_TYPE_B: {
1924 arcmsr_polling_hbb_ccbdone(acb,poll_ccb);
1925 }
1926 }
1927 }
1928
1929 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
1930 {
1931 uint32_t cdb_phyaddr, ccb_phyaddr_hi32;
1932 dma_addr_t dma_coherent_handle;
1933 /*
1934 ********************************************************************
1935 ** here we need to tell iop 331 our freeccb.HighPart
1936 ** if freeccb.HighPart is not zero
1937 ********************************************************************
1938 */
1939 dma_coherent_handle = acb->dma_coherent_handle;
1940 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
1941 ccb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
1942 /*
1943 ***********************************************************************
1944 ** if adapter type B, set window of "post command Q"
1945 ***********************************************************************
1946 */
1947 switch (acb->adapter_type) {
1948
1949 case ACB_ADAPTER_TYPE_A: {
1950 if (ccb_phyaddr_hi32 != 0) {
1951 struct MessageUnit_A __iomem *reg = acb->pmuA;
1952 uint32_t intmask_org;
1953 intmask_org = arcmsr_disable_outbound_ints(acb);
1954 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
1955 &reg->message_rwbuffer[0]);
1956 writel(ccb_phyaddr_hi32, &reg->message_rwbuffer[1]);
1957 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
1958 &reg->inbound_msgaddr0);
1959 if (arcmsr_hba_wait_msgint_ready(acb)) {
1960 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
1961 part physical address timeout\n",
1962 acb->host->host_no);
1963 return 1;
1964 }
1965 arcmsr_enable_outbound_ints(acb, intmask_org);
1966 }
1967 }
1968 break;
1969
1970 case ACB_ADAPTER_TYPE_B: {
1971 unsigned long post_queue_phyaddr;
1972 uint32_t __iomem *rwbuffer;
1973
1974 struct MessageUnit_B *reg = acb->pmuB;
1975 uint32_t intmask_org;
1976 intmask_org = arcmsr_disable_outbound_ints(acb);
1977 reg->postq_index = 0;
1978 reg->doneq_index = 0;
1979 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell_reg);
1980 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1981 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
1982 acb->host->host_no);
1983 return 1;
1984 }
1985 post_queue_phyaddr = cdb_phyaddr + ARCMSR_MAX_FREECCB_NUM * \
1986 sizeof(struct CommandControlBlock) + offsetof(struct MessageUnit_B, post_qbuffer) ;
1987 rwbuffer = reg->msgcode_rwbuffer_reg;
1988 /* driver "set config" signature */
1989 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
1990 /* normal should be zero */
1991 writel(ccb_phyaddr_hi32, rwbuffer++);
1992 /* postQ size (256 + 8)*4 */
1993 writel(post_queue_phyaddr, rwbuffer++);
1994 /* doneQ size (256 + 8)*4 */
1995 writel(post_queue_phyaddr + 1056, rwbuffer++);
1996 /* ccb maxQ size must be --> [(256 + 8)*4]*/
1997 writel(1056, rwbuffer);
1998
1999 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell_reg);
2000 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2001 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2002 timeout \n",acb->host->host_no);
2003 return 1;
2004 }
2005
2006 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell_reg);
2007 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2008 printk(KERN_NOTICE "arcmsr%d: 'can not set diver mode \n"\
2009 ,acb->host->host_no);
2010 return 1;
2011 }
2012 arcmsr_enable_outbound_ints(acb, intmask_org);
2013 }
2014 break;
2015 }
2016 return 0;
2017 }
2018
2019 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2020 {
2021 uint32_t firmware_state = 0;
2022
2023 switch (acb->adapter_type) {
2024
2025 case ACB_ADAPTER_TYPE_A: {
2026 struct MessageUnit_A __iomem *reg = acb->pmuA;
2027 do {
2028 firmware_state = readl(&reg->outbound_msgaddr1);
2029 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2030 }
2031 break;
2032
2033 case ACB_ADAPTER_TYPE_B: {
2034 struct MessageUnit_B *reg = acb->pmuB;
2035 do {
2036 firmware_state = readl(reg->iop2drv_doorbell_reg);
2037 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
2038 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg);
2039 }
2040 break;
2041 }
2042 }
2043
2044 static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2045 {
2046 struct MessageUnit_A __iomem *reg = acb->pmuA;
2047 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2048 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
2049 if (arcmsr_hba_wait_msgint_ready(acb)) {
2050 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2051 rebulid' timeout \n", acb->host->host_no);
2052 }
2053 }
2054
2055 static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2056 {
2057 struct MessageUnit_B *reg = acb->pmuB;
2058 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2059 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell_reg);
2060 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2061 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2062 rebulid' timeout \n",acb->host->host_no);
2063 }
2064 }
2065
2066 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2067 {
2068 switch (acb->adapter_type) {
2069 case ACB_ADAPTER_TYPE_A:
2070 arcmsr_start_hba_bgrb(acb);
2071 break;
2072 case ACB_ADAPTER_TYPE_B:
2073 arcmsr_start_hbb_bgrb(acb);
2074 break;
2075 }
2076 }
2077
2078 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2079 {
2080 switch (acb->adapter_type) {
2081 case ACB_ADAPTER_TYPE_A: {
2082 struct MessageUnit_A __iomem *reg = acb->pmuA;
2083 uint32_t outbound_doorbell;
2084 /* empty doorbell Qbuffer if door bell ringed */
2085 outbound_doorbell = readl(&reg->outbound_doorbell);
2086 /*clear doorbell interrupt */
2087 writel(outbound_doorbell, &reg->outbound_doorbell);
2088 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2089 }
2090 break;
2091
2092 case ACB_ADAPTER_TYPE_B: {
2093 struct MessageUnit_B *reg = acb->pmuB;
2094 /*clear interrupt and message state*/
2095 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg);
2096 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg);
2097 /* let IOP know data has been read */
2098 }
2099 break;
2100 }
2101 }
2102
2103 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2104 {
2105 switch (acb->adapter_type) {
2106 case ACB_ADAPTER_TYPE_A:
2107 return;
2108 case ACB_ADAPTER_TYPE_B:
2109 {
2110 struct MessageUnit_B *reg = acb->pmuB;
2111 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell_reg);
2112 if(arcmsr_hbb_wait_msgint_ready(acb)) {
2113 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2114 return;
2115 }
2116 }
2117 break;
2118 }
2119 return;
2120 }
2121
2122 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2123 {
2124 uint32_t intmask_org;
2125
2126 /* disable all outbound interrupt */
2127 intmask_org = arcmsr_disable_outbound_ints(acb);
2128 arcmsr_wait_firmware_ready(acb);
2129 arcmsr_iop_confirm(acb);
2130 arcmsr_get_firmware_spec(acb);
2131 /*start background rebuild*/
2132 arcmsr_start_adapter_bgrb(acb);
2133 /* empty doorbell Qbuffer if door bell ringed */
2134 arcmsr_clear_doorbell_queue_buffer(acb);
2135 arcmsr_enable_eoi_mode(acb);
2136 /* enable outbound Post Queue,outbound doorbell Interrupt */
2137 arcmsr_enable_outbound_ints(acb, intmask_org);
2138 acb->acb_flags |= ACB_F_IOP_INITED;
2139 }
2140
2141 static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
2142 {
2143 struct CommandControlBlock *ccb;
2144 uint32_t intmask_org;
2145 int i = 0;
2146
2147 if (atomic_read(&acb->ccboutstandingcount) != 0) {
2148 /* talk to iop 331 outstanding command aborted */
2149 arcmsr_abort_allcmd(acb);
2150
2151 /* wait for 3 sec for all command aborted*/
2152 ssleep(3);
2153
2154 /* disable all outbound interrupt */
2155 intmask_org = arcmsr_disable_outbound_ints(acb);
2156 /* clear all outbound posted Q */
2157 arcmsr_done4abort_postqueue(acb);
2158 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2159 ccb = acb->pccb_pool[i];
2160 if (ccb->startdone == ARCMSR_CCB_START) {
2161 ccb->startdone = ARCMSR_CCB_ABORTED;
2162 arcmsr_ccb_complete(ccb, 1);
2163 }
2164 }
2165 /* enable all outbound interrupt */
2166 arcmsr_enable_outbound_ints(acb, intmask_org);
2167 }
2168 }
2169
2170 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2171 {
2172 struct AdapterControlBlock *acb =
2173 (struct AdapterControlBlock *)cmd->device->host->hostdata;
2174 int i;
2175
2176 acb->num_resets++;
2177 acb->acb_flags |= ACB_F_BUS_RESET;
2178 for (i = 0; i < 400; i++) {
2179 if (!atomic_read(&acb->ccboutstandingcount))
2180 break;
2181 arcmsr_interrupt(acb);/* FIXME: need spinlock */
2182 msleep(25);
2183 }
2184 arcmsr_iop_reset(acb);
2185 acb->acb_flags &= ~ACB_F_BUS_RESET;
2186 return SUCCESS;
2187 }
2188
2189 static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
2190 struct CommandControlBlock *ccb)
2191 {
2192 u32 intmask;
2193
2194 ccb->startdone = ARCMSR_CCB_ABORTED;
2195
2196 /*
2197 ** Wait for 3 sec for all command done.
2198 */
2199 ssleep(3);
2200
2201 intmask = arcmsr_disable_outbound_ints(acb);
2202 arcmsr_polling_ccbdone(acb, ccb);
2203 arcmsr_enable_outbound_ints(acb, intmask);
2204 }
2205
2206 static int arcmsr_abort(struct scsi_cmnd *cmd)
2207 {
2208 struct AdapterControlBlock *acb =
2209 (struct AdapterControlBlock *)cmd->device->host->hostdata;
2210 int i = 0;
2211
2212 printk(KERN_NOTICE
2213 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
2214 acb->host->host_no, cmd->device->id, cmd->device->lun);
2215 acb->num_aborts++;
2216 /*
2217 ************************************************
2218 ** the all interrupt service routine is locked
2219 ** we need to handle it as soon as possible and exit
2220 ************************************************
2221 */
2222 if (!atomic_read(&acb->ccboutstandingcount))
2223 return SUCCESS;
2224
2225 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2226 struct CommandControlBlock *ccb = acb->pccb_pool[i];
2227 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
2228 arcmsr_abort_one_cmd(acb, ccb);
2229 break;
2230 }
2231 }
2232
2233 return SUCCESS;
2234 }
2235
2236 static const char *arcmsr_info(struct Scsi_Host *host)
2237 {
2238 struct AdapterControlBlock *acb =
2239 (struct AdapterControlBlock *) host->hostdata;
2240 static char buf[256];
2241 char *type;
2242 int raid6 = 1;
2243
2244 switch (acb->pdev->device) {
2245 case PCI_DEVICE_ID_ARECA_1110:
2246 case PCI_DEVICE_ID_ARECA_1200:
2247 case PCI_DEVICE_ID_ARECA_1202:
2248 case PCI_DEVICE_ID_ARECA_1210:
2249 raid6 = 0;
2250 /*FALLTHRU*/
2251 case PCI_DEVICE_ID_ARECA_1120:
2252 case PCI_DEVICE_ID_ARECA_1130:
2253 case PCI_DEVICE_ID_ARECA_1160:
2254 case PCI_DEVICE_ID_ARECA_1170:
2255 case PCI_DEVICE_ID_ARECA_1201:
2256 case PCI_DEVICE_ID_ARECA_1220:
2257 case PCI_DEVICE_ID_ARECA_1230:
2258 case PCI_DEVICE_ID_ARECA_1260:
2259 case PCI_DEVICE_ID_ARECA_1270:
2260 case PCI_DEVICE_ID_ARECA_1280:
2261 type = "SATA";
2262 break;
2263 case PCI_DEVICE_ID_ARECA_1380:
2264 case PCI_DEVICE_ID_ARECA_1381:
2265 case PCI_DEVICE_ID_ARECA_1680:
2266 case PCI_DEVICE_ID_ARECA_1681:
2267 type = "SAS";
2268 break;
2269 default:
2270 type = "X-TYPE";
2271 break;
2272 }
2273 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
2274 type, raid6 ? "( RAID6 capable)" : "",
2275 ARCMSR_DRIVER_VERSION);
2276 return buf;
2277 }
2278 #ifdef CONFIG_SCSI_ARCMSR_AER
2279 static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev)
2280 {
2281 struct Scsi_Host *host = pci_get_drvdata(pdev);
2282 struct AdapterControlBlock *acb =
2283 (struct AdapterControlBlock *) host->hostdata;
2284 uint32_t intmask_org;
2285 int i, j;
2286
2287 if (pci_enable_device(pdev)) {
2288 return PCI_ERS_RESULT_DISCONNECT;
2289 }
2290 pci_set_master(pdev);
2291 intmask_org = arcmsr_disable_outbound_ints(acb);
2292 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2293 ACB_F_MESSAGE_RQBUFFER_CLEARED |
2294 ACB_F_MESSAGE_WQBUFFER_READED);
2295 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
2296 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
2297 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
2298 acb->devstate[i][j] = ARECA_RAID_GONE;
2299
2300 arcmsr_wait_firmware_ready(acb);
2301 arcmsr_iop_confirm(acb);
2302 /* disable all outbound interrupt */
2303 arcmsr_get_firmware_spec(acb);
2304 /*start background rebuild*/
2305 arcmsr_start_adapter_bgrb(acb);
2306 /* empty doorbell Qbuffer if door bell ringed */
2307 arcmsr_clear_doorbell_queue_buffer(acb);
2308 arcmsr_enable_eoi_mode(acb);
2309 /* enable outbound Post Queue,outbound doorbell Interrupt */
2310 arcmsr_enable_outbound_ints(acb, intmask_org);
2311 acb->acb_flags |= ACB_F_IOP_INITED;
2312
2313 pci_enable_pcie_error_reporting(pdev);
2314 return PCI_ERS_RESULT_RECOVERED;
2315 }
2316
2317 static void arcmsr_pci_ers_need_reset_forepart(struct pci_dev *pdev)
2318 {
2319 struct Scsi_Host *host = pci_get_drvdata(pdev);
2320 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)host->hostdata;
2321 struct CommandControlBlock *ccb;
2322 uint32_t intmask_org;
2323 int i = 0;
2324
2325 if (atomic_read(&acb->ccboutstandingcount) != 0) {
2326 /* talk to iop 331 outstanding command aborted */
2327 arcmsr_abort_allcmd(acb);
2328 /* wait for 3 sec for all command aborted*/
2329 ssleep(3);
2330 /* disable all outbound interrupt */
2331 intmask_org = arcmsr_disable_outbound_ints(acb);
2332 /* clear all outbound posted Q */
2333 arcmsr_done4abort_postqueue(acb);
2334 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2335 ccb = acb->pccb_pool[i];
2336 if (ccb->startdone == ARCMSR_CCB_START) {
2337 ccb->startdone = ARCMSR_CCB_ABORTED;
2338 arcmsr_ccb_complete(ccb, 1);
2339 }
2340 }
2341 /* enable all outbound interrupt */
2342 arcmsr_enable_outbound_ints(acb, intmask_org);
2343 }
2344 pci_disable_device(pdev);
2345 }
2346
2347 static void arcmsr_pci_ers_disconnect_forepart(struct pci_dev *pdev)
2348 {
2349 struct Scsi_Host *host = pci_get_drvdata(pdev);
2350 struct AdapterControlBlock *acb = \
2351 (struct AdapterControlBlock *)host->hostdata;
2352
2353 arcmsr_stop_adapter_bgrb(acb);
2354 arcmsr_flush_adapter_cache(acb);
2355 }
2356
2357 static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev,
2358 pci_channel_state_t state)
2359 {
2360 switch (state) {
2361 case pci_channel_io_frozen:
2362 arcmsr_pci_ers_need_reset_forepart(pdev);
2363 return PCI_ERS_RESULT_NEED_RESET;
2364 case pci_channel_io_perm_failure:
2365 arcmsr_pci_ers_disconnect_forepart(pdev);
2366 return PCI_ERS_RESULT_DISCONNECT;
2367 break;
2368 default:
2369 return PCI_ERS_RESULT_NEED_RESET;
2370 }
2371 }
2372 #endif
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