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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / s390 / cio / qdio.c
blob2b5bfb7c69e5c81d6d8ab74c6fd011dcb6fad7bb
1 /*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
10 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/delay.h>
36 #include <linux/slab.h>
37 #include <linux/kernel.h>
38 #include <linux/proc_fs.h>
39 #include <linux/timer.h>
40 #include <linux/mempool.h>
41
42 #include <asm/ccwdev.h>
43 #include <asm/io.h>
44 #include <asm/atomic.h>
45 #include <asm/semaphore.h>
46 #include <asm/timex.h>
47
48 #include <asm/debug.h>
49 #include <asm/s390_rdev.h>
50 #include <asm/qdio.h>
51 #include <asm/airq.h>
52
53 #include "cio.h"
54 #include "css.h"
55 #include "device.h"
56 #include "qdio.h"
57 #include "ioasm.h"
58 #include "chsc.h"
59
60 /****************** MODULE PARAMETER VARIABLES ********************/
61 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
62 MODULE_DESCRIPTION("QDIO base support version 2, " \
63 "Copyright 2000 IBM Corporation");
64 MODULE_LICENSE("GPL");
65
66 /******************** HERE WE GO ***********************************/
67
68 static const char version[] = "QDIO base support version 2";
69
70 static int qdio_performance_stats = 0;
71 static int proc_perf_file_registration;
72 static struct qdio_perf_stats perf_stats;
73
74 static int hydra_thinints;
75 static int is_passthrough = 0;
76 static int omit_svs;
77
78 static int indicator_used[INDICATORS_PER_CACHELINE];
79 static __u32 * volatile indicators;
80 static __u32 volatile spare_indicator;
81 static atomic_t spare_indicator_usecount;
82 #define QDIO_MEMPOOL_SCSSC_ELEMENTS 2
83 static mempool_t *qdio_mempool_scssc;
84 static struct kmem_cache *qdio_q_cache;
85
86 static debug_info_t *qdio_dbf_setup;
87 static debug_info_t *qdio_dbf_sbal;
88 static debug_info_t *qdio_dbf_trace;
89 static debug_info_t *qdio_dbf_sense;
90 #ifdef CONFIG_QDIO_DEBUG
91 static debug_info_t *qdio_dbf_slsb_out;
92 static debug_info_t *qdio_dbf_slsb_in;
93 #endif /* CONFIG_QDIO_DEBUG */
94
95 /* iQDIO stuff: */
96 static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
97 during a while loop */
98 static DEFINE_SPINLOCK(ttiq_list_lock);
99 static void *tiqdio_ind;
100 static void tiqdio_tl(unsigned long);
101 static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
102
103 /* not a macro, as one of the arguments is atomic_read */
104 static inline int
105 qdio_min(int a,int b)
106 {
107 if (a<b)
108 return a;
109 else
110 return b;
111 }
112
113 /***************** SCRUBBER HELPER ROUTINES **********************/
114 #ifdef CONFIG_64BIT
115 static inline void qdio_perf_stat_inc(atomic64_t *count)
116 {
117 if (qdio_performance_stats)
118 atomic64_inc(count);
119 }
120
121 static inline void qdio_perf_stat_dec(atomic64_t *count)
122 {
123 if (qdio_performance_stats)
124 atomic64_dec(count);
125 }
126 #else /* CONFIG_64BIT */
127 static inline void qdio_perf_stat_inc(atomic_t *count)
128 {
129 if (qdio_performance_stats)
130 atomic_inc(count);
131 }
132
133 static inline void qdio_perf_stat_dec(atomic_t *count)
134 {
135 if (qdio_performance_stats)
136 atomic_dec(count);
137 }
138 #endif /* CONFIG_64BIT */
139
140 static inline __u64
141 qdio_get_micros(void)
142 {
143 return (get_clock() >> 12); /* time>>12 is microseconds */
144 }
145
146 /*
147 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
148 * the q in any case, so that we'll not be interrupted when we are in
149 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
150 * ever works (last famous words)
151 */
152 static inline int
153 qdio_reserve_q(struct qdio_q *q)
154 {
155 return atomic_add_return(1,&q->use_count) - 1;
156 }
157
158 static inline void
159 qdio_release_q(struct qdio_q *q)
160 {
161 atomic_dec(&q->use_count);
162 }
163
164 /*check ccq */
165 static int
166 qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
167 {
168 char dbf_text[15];
169
170 if (ccq == 0 || ccq == 32)
171 return 0;
172 if (ccq == 96 || ccq == 97)
173 return 1;
174 /*notify devices immediately*/
175 sprintf(dbf_text,"%d", ccq);
176 QDIO_DBF_TEXT2(1,trace,dbf_text);
177 return -EIO;
178 }
179 /* EQBS: extract buffer states */
180 static int
181 qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
182 unsigned int *start, unsigned int *cnt)
183 {
184 struct qdio_irq *irq;
185 unsigned int tmp_cnt, q_no, ccq;
186 int rc ;
187 char dbf_text[15];
188
189 ccq = 0;
190 tmp_cnt = *cnt;
191 irq = (struct qdio_irq*)q->irq_ptr;
192 q_no = q->q_no;
193 if(!q->is_input_q)
194 q_no += irq->no_input_qs;
195 again:
196 ccq = do_eqbs(irq->sch_token, state, q_no, start, cnt);
197 rc = qdio_check_ccq(q, ccq);
198 if ((ccq == 96) && (tmp_cnt != *cnt))
199 rc = 0;
200 if (rc == 1) {
201 QDIO_DBF_TEXT5(1,trace,"eqAGAIN");
202 goto again;
203 }
204 if (rc < 0) {
205 QDIO_DBF_TEXT2(1,trace,"eqberr");
206 sprintf(dbf_text,"%2x,%2x,%d,%d",tmp_cnt, *cnt, ccq, q_no);
207 QDIO_DBF_TEXT2(1,trace,dbf_text);
208 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
209 QDIO_STATUS_LOOK_FOR_ERROR,
210 0, 0, 0, -1, -1, q->int_parm);
211 return 0;
212 }
213 return (tmp_cnt - *cnt);
214 }
215
216 /* SQBS: set buffer states */
217 static int
218 qdio_do_sqbs(struct qdio_q *q, unsigned char state,
219 unsigned int *start, unsigned int *cnt)
220 {
221 struct qdio_irq *irq;
222 unsigned int tmp_cnt, q_no, ccq;
223 int rc;
224 char dbf_text[15];
225
226 ccq = 0;
227 tmp_cnt = *cnt;
228 irq = (struct qdio_irq*)q->irq_ptr;
229 q_no = q->q_no;
230 if(!q->is_input_q)
231 q_no += irq->no_input_qs;
232 again:
233 ccq = do_sqbs(irq->sch_token, state, q_no, start, cnt);
234 rc = qdio_check_ccq(q, ccq);
235 if (rc == 1) {
236 QDIO_DBF_TEXT5(1,trace,"sqAGAIN");
237 goto again;
238 }
239 if (rc < 0) {
240 QDIO_DBF_TEXT3(1,trace,"sqberr");
241 sprintf(dbf_text,"%2x,%2x",tmp_cnt,*cnt);
242 QDIO_DBF_TEXT3(1,trace,dbf_text);
243 sprintf(dbf_text,"%d,%d",ccq,q_no);
244 QDIO_DBF_TEXT3(1,trace,dbf_text);
245 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
246 QDIO_STATUS_LOOK_FOR_ERROR,
247 0, 0, 0, -1, -1, q->int_parm);
248 return 0;
249 }
250 return (tmp_cnt - *cnt);
251 }
252
253 static inline int
254 qdio_set_slsb(struct qdio_q *q, unsigned int *bufno,
255 unsigned char state, unsigned int *count)
256 {
257 volatile char *slsb;
258 struct qdio_irq *irq;
259
260 irq = (struct qdio_irq*)q->irq_ptr;
261 if (!irq->is_qebsm) {
262 slsb = (char *)&q->slsb.acc.val[(*bufno)];
263 xchg(slsb, state);
264 return 1;
265 }
266 return qdio_do_sqbs(q, state, bufno, count);
267 }
268
269 #ifdef CONFIG_QDIO_DEBUG
270 static inline void
271 qdio_trace_slsb(struct qdio_q *q)
272 {
273 if (q->queue_type==QDIO_TRACE_QTYPE) {
274 if (q->is_input_q)
275 QDIO_DBF_HEX2(0,slsb_in,&q->slsb,
276 QDIO_MAX_BUFFERS_PER_Q);
277 else
278 QDIO_DBF_HEX2(0,slsb_out,&q->slsb,
279 QDIO_MAX_BUFFERS_PER_Q);
280 }
281 }
282 #endif
283
284 static inline int
285 set_slsb(struct qdio_q *q, unsigned int *bufno,
286 unsigned char state, unsigned int *count)
287 {
288 int rc;
289 #ifdef CONFIG_QDIO_DEBUG
290 qdio_trace_slsb(q);
291 #endif
292 rc = qdio_set_slsb(q, bufno, state, count);
293 #ifdef CONFIG_QDIO_DEBUG
294 qdio_trace_slsb(q);
295 #endif
296 return rc;
297 }
298 static inline int
299 qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
300 unsigned int gpr3)
301 {
302 int cc;
303
304 QDIO_DBF_TEXT4(0,trace,"sigasync");
305 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
306
307 qdio_perf_stat_inc(&perf_stats.siga_syncs);
308
309 cc = do_siga_sync(q->schid, gpr2, gpr3);
310 if (cc)
311 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
312
313 return cc;
314 }
315
316 static inline int
317 qdio_siga_sync_q(struct qdio_q *q)
318 {
319 if (q->is_input_q)
320 return qdio_siga_sync(q, 0, q->mask);
321 return qdio_siga_sync(q, q->mask, 0);
322 }
323
324 static int
325 __do_siga_output(struct qdio_q *q, unsigned int *busy_bit)
326 {
327 struct qdio_irq *irq;
328 unsigned int fc = 0;
329 unsigned long schid;
330
331 irq = (struct qdio_irq *) q->irq_ptr;
332 if (!irq->is_qebsm)
333 schid = *((u32 *)&q->schid);
334 else {
335 schid = irq->sch_token;
336 fc |= 0x80;
337 }
338 return do_siga_output(schid, q->mask, busy_bit, fc);
339 }
340
341 /*
342 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
343 * an access exception
344 */
345 static int
346 qdio_siga_output(struct qdio_q *q)
347 {
348 int cc;
349 __u32 busy_bit;
350 __u64 start_time=0;
351
352 qdio_perf_stat_inc(&perf_stats.siga_outs);
353
354 QDIO_DBF_TEXT4(0,trace,"sigaout");
355 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
356
357 for (;;) {
358 cc = __do_siga_output(q, &busy_bit);
359 //QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
360 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
361 if (!start_time)
362 start_time=NOW;
363 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
364 break;
365 } else
366 break;
367 }
368
369 if ((cc==2) && (busy_bit))
370 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
371
372 if (cc)
373 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
374
375 return cc;
376 }
377
378 static int
379 qdio_siga_input(struct qdio_q *q)
380 {
381 int cc;
382
383 QDIO_DBF_TEXT4(0,trace,"sigain");
384 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
385
386 qdio_perf_stat_inc(&perf_stats.siga_ins);
387
388 cc = do_siga_input(q->schid, q->mask);
389
390 if (cc)
391 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
392
393 return cc;
394 }
395
396 /* locked by the locks in qdio_activate and qdio_cleanup */
397 static __u32 *
398 qdio_get_indicator(void)
399 {
400 int i;
401
402 for (i = 0; i < INDICATORS_PER_CACHELINE; i++)
403 if (!indicator_used[i]) {
404 indicator_used[i]=1;
405 return indicators+i;
406 }
407 atomic_inc(&spare_indicator_usecount);
408 return (__u32 * volatile) &spare_indicator;
409 }
410
411 /* locked by the locks in qdio_activate and qdio_cleanup */
412 static void
413 qdio_put_indicator(__u32 *addr)
414 {
415 int i;
416
417 if ( (addr) && (addr!=&spare_indicator) ) {
418 i=addr-indicators;
419 indicator_used[i]=0;
420 }
421 if (addr == &spare_indicator)
422 atomic_dec(&spare_indicator_usecount);
423 }
424
425 static inline void
426 tiqdio_clear_summary_bit(__u32 *location)
427 {
428 QDIO_DBF_TEXT5(0,trace,"clrsummb");
429 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
430
431 xchg(location,0);
432 }
433
434 static inline void
435 tiqdio_set_summary_bit(__u32 *location)
436 {
437 QDIO_DBF_TEXT5(0,trace,"setsummb");
438 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
439
440 xchg(location,-1);
441 }
442
443 static inline void
444 tiqdio_sched_tl(void)
445 {
446 tasklet_hi_schedule(&tiqdio_tasklet);
447 }
448
449 static void
450 qdio_mark_tiq(struct qdio_q *q)
451 {
452 unsigned long flags;
453
454 QDIO_DBF_TEXT4(0,trace,"mark iq");
455 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
456
457 spin_lock_irqsave(&ttiq_list_lock,flags);
458 if (unlikely(atomic_read(&q->is_in_shutdown)))
459 goto out_unlock;
460
461 if (!q->is_input_q)
462 goto out_unlock;
463
464 if ((q->list_prev) || (q->list_next))
465 goto out_unlock;
466
467 if (!tiq_list) {
468 tiq_list=q;
469 q->list_prev=q;
470 q->list_next=q;
471 } else {
472 q->list_next=tiq_list;
473 q->list_prev=tiq_list->list_prev;
474 tiq_list->list_prev->list_next=q;
475 tiq_list->list_prev=q;
476 }
477 spin_unlock_irqrestore(&ttiq_list_lock,flags);
478
479 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
480 tiqdio_sched_tl();
481 return;
482 out_unlock:
483 spin_unlock_irqrestore(&ttiq_list_lock,flags);
484 return;
485 }
486
487 static inline void
488 qdio_mark_q(struct qdio_q *q)
489 {
490 QDIO_DBF_TEXT4(0,trace,"mark q");
491 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
492
493 if (unlikely(atomic_read(&q->is_in_shutdown)))
494 return;
495
496 tasklet_schedule(&q->tasklet);
497 }
498
499 static int
500 qdio_stop_polling(struct qdio_q *q)
501 {
502 #ifdef QDIO_USE_PROCESSING_STATE
503 unsigned int tmp, gsf, count = 1;
504 unsigned char state = 0;
505 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
506
507 if (!atomic_xchg(&q->polling,0))
508 return 1;
509
510 QDIO_DBF_TEXT4(0,trace,"stoppoll");
511 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
512
513 /* show the card that we are not polling anymore */
514 if (!q->is_input_q)
515 return 1;
516
517 tmp = gsf = GET_SAVED_FRONTIER(q);
518 tmp = ((tmp + QDIO_MAX_BUFFERS_PER_Q-1) & (QDIO_MAX_BUFFERS_PER_Q-1) );
519 set_slsb(q, &tmp, SLSB_P_INPUT_NOT_INIT, &count);
520
521 /*
522 * we don't issue this SYNC_MEMORY, as we trust Rick T and
523 * moreover will not use the PROCESSING state under VM, so
524 * q->polling was 0 anyway
525 */
526 /*SYNC_MEMORY;*/
527 if (irq->is_qebsm) {
528 count = 1;
529 qdio_do_eqbs(q, &state, &gsf, &count);
530 } else
531 state = q->slsb.acc.val[gsf];
532 if (state != SLSB_P_INPUT_PRIMED)
533 return 1;
534 /*
535 * set our summary bit again, as otherwise there is a
536 * small window we can miss between resetting it and
537 * checking for PRIMED state
538 */
539 if (q->is_thinint_q)
540 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
541 return 0;
542
543 #else /* QDIO_USE_PROCESSING_STATE */
544 return 1;
545 #endif /* QDIO_USE_PROCESSING_STATE */
546 }
547
548 /*
549 * see the comment in do_QDIO and before qdio_reserve_q about the
550 * sophisticated locking outside of unmark_q, so that we don't need to
551 * disable the interrupts :-)
552 */
553 static void
554 qdio_unmark_q(struct qdio_q *q)
555 {
556 unsigned long flags;
557
558 QDIO_DBF_TEXT4(0,trace,"unmark q");
559 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
560
561 if ((!q->list_prev)||(!q->list_next))
562 return;
563
564 if ((q->is_thinint_q)&&(q->is_input_q)) {
565 /* iQDIO */
566 spin_lock_irqsave(&ttiq_list_lock,flags);
567 /* in case cleanup has done this already and simultanously
568 * qdio_unmark_q is called from the interrupt handler, we've
569 * got to check this in this specific case again */
570 if ((!q->list_prev)||(!q->list_next))
571 goto out;
572 if (q->list_next==q) {
573 /* q was the only interesting q */
574 tiq_list=NULL;
575 q->list_next=NULL;
576 q->list_prev=NULL;
577 } else {
578 q->list_next->list_prev=q->list_prev;
579 q->list_prev->list_next=q->list_next;
580 tiq_list=q->list_next;
581 q->list_next=NULL;
582 q->list_prev=NULL;
583 }
584 out:
585 spin_unlock_irqrestore(&ttiq_list_lock,flags);
586 }
587 }
588
589 static inline unsigned long
590 tiqdio_clear_global_summary(void)
591 {
592 unsigned long time;
593
594 QDIO_DBF_TEXT5(0,trace,"clrglobl");
595
596 time = do_clear_global_summary();
597
598 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
599
600 return time;
601 }
602
603
604 /************************* OUTBOUND ROUTINES *******************************/
605 static int
606 qdio_qebsm_get_outbound_buffer_frontier(struct qdio_q *q)
607 {
608 struct qdio_irq *irq;
609 unsigned char state;
610 unsigned int cnt, count, ftc;
611
612 irq = (struct qdio_irq *) q->irq_ptr;
613 if ((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis))
614 SYNC_MEMORY;
615
616 ftc = q->first_to_check;
617 count = qdio_min(atomic_read(&q->number_of_buffers_used),
618 (QDIO_MAX_BUFFERS_PER_Q-1));
619 if (count == 0)
620 return q->first_to_check;
621 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
622 if (cnt == 0)
623 return q->first_to_check;
624 switch (state) {
625 case SLSB_P_OUTPUT_ERROR:
626 QDIO_DBF_TEXT3(0,trace,"outperr");
627 atomic_sub(cnt , &q->number_of_buffers_used);
628 if (q->qdio_error)
629 q->error_status_flags |=
630 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
631 q->qdio_error = SLSB_P_OUTPUT_ERROR;
632 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
633 q->first_to_check = ftc;
634 break;
635 case SLSB_P_OUTPUT_EMPTY:
636 QDIO_DBF_TEXT5(0,trace,"outpempt");
637 atomic_sub(cnt, &q->number_of_buffers_used);
638 q->first_to_check = ftc;
639 break;
640 case SLSB_CU_OUTPUT_PRIMED:
641 /* all buffers primed */
642 QDIO_DBF_TEXT5(0,trace,"outpprim");
643 break;
644 default:
645 break;
646 }
647 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
648 return q->first_to_check;
649 }
650
651 static int
652 qdio_qebsm_get_inbound_buffer_frontier(struct qdio_q *q)
653 {
654 struct qdio_irq *irq;
655 unsigned char state;
656 int tmp, ftc, count, cnt;
657 char dbf_text[15];
658
659
660 irq = (struct qdio_irq *) q->irq_ptr;
661 ftc = q->first_to_check;
662 count = qdio_min(atomic_read(&q->number_of_buffers_used),
663 (QDIO_MAX_BUFFERS_PER_Q-1));
664 if (count == 0)
665 return q->first_to_check;
666 cnt = qdio_do_eqbs(q, &state, &ftc, &count);
667 if (cnt == 0)
668 return q->first_to_check;
669 switch (state) {
670 case SLSB_P_INPUT_ERROR :
671 #ifdef CONFIG_QDIO_DEBUG
672 QDIO_DBF_TEXT3(1,trace,"inperr");
673 sprintf(dbf_text,"%2x,%2x",ftc,count);
674 QDIO_DBF_TEXT3(1,trace,dbf_text);
675 #endif /* CONFIG_QDIO_DEBUG */
676 if (q->qdio_error)
677 q->error_status_flags |=
678 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
679 q->qdio_error = SLSB_P_INPUT_ERROR;
680 q->error_status_flags |= QDIO_STATUS_LOOK_FOR_ERROR;
681 atomic_sub(cnt, &q->number_of_buffers_used);
682 q->first_to_check = ftc;
683 break;
684 case SLSB_P_INPUT_PRIMED :
685 QDIO_DBF_TEXT3(0,trace,"inptprim");
686 sprintf(dbf_text,"%2x,%2x",ftc,count);
687 QDIO_DBF_TEXT3(1,trace,dbf_text);
688 tmp = 0;
689 ftc = q->first_to_check;
690 #ifdef QDIO_USE_PROCESSING_STATE
691 if (cnt > 1) {
692 cnt -= 1;
693 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
694 if (!tmp)
695 break;
696 }
697 cnt = 1;
698 tmp += set_slsb(q, &ftc,
699 SLSB_P_INPUT_PROCESSING, &cnt);
700 atomic_set(&q->polling, 1);
701 #else
702 tmp = set_slsb(q, &ftc, SLSB_P_INPUT_NOT_INIT, &cnt);
703 #endif
704 atomic_sub(tmp, &q->number_of_buffers_used);
705 q->first_to_check = ftc;
706 break;
707 case SLSB_CU_INPUT_EMPTY:
708 case SLSB_P_INPUT_NOT_INIT:
709 case SLSB_P_INPUT_PROCESSING:
710 QDIO_DBF_TEXT5(0,trace,"inpnipro");
711 break;
712 default:
713 break;
714 }
715 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
716 return q->first_to_check;
717 }
718
719 static int
720 qdio_get_outbound_buffer_frontier(struct qdio_q *q)
721 {
722 struct qdio_irq *irq;
723 volatile char *slsb;
724 unsigned int count = 1;
725 int first_not_to_check, f, f_mod_no;
726 char dbf_text[15];
727
728 QDIO_DBF_TEXT4(0,trace,"getobfro");
729 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
730
731 irq = (struct qdio_irq *) q->irq_ptr;
732 if (irq->is_qebsm)
733 return qdio_qebsm_get_outbound_buffer_frontier(q);
734
735 slsb=&q->slsb.acc.val[0];
736 f_mod_no=f=q->first_to_check;
737 /*
738 * f points to already processed elements, so f+no_used is correct...
739 * ... but: we don't check 128 buffers, as otherwise
740 * qdio_has_outbound_q_moved would return 0
741 */
742 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
743 (QDIO_MAX_BUFFERS_PER_Q-1));
744
745 if (((!q->is_iqdio_q) && (!q->hydra_gives_outbound_pcis)) ||
746 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH))
747 SYNC_MEMORY;
748
749 check_next:
750 if (f==first_not_to_check)
751 goto out;
752
753 switch(slsb[f_mod_no]) {
754
755 /* the adapter has not fetched the output yet */
756 case SLSB_CU_OUTPUT_PRIMED:
757 QDIO_DBF_TEXT5(0,trace,"outpprim");
758 break;
759
760 /* the adapter got it */
761 case SLSB_P_OUTPUT_EMPTY:
762 atomic_dec(&q->number_of_buffers_used);
763 f++;
764 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
765 QDIO_DBF_TEXT5(0,trace,"outpempt");
766 goto check_next;
767
768 case SLSB_P_OUTPUT_ERROR:
769 QDIO_DBF_TEXT3(0,trace,"outperr");
770 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
771 q->sbal[f_mod_no]->element[14].sbalf.value,
772 q->sbal[f_mod_no]->element[15].sbalf.value);
773 QDIO_DBF_TEXT3(1,trace,dbf_text);
774 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
775
776 /* kind of process the buffer */
777 set_slsb(q, &f_mod_no, SLSB_P_OUTPUT_NOT_INIT, &count);
778
779 /*
780 * we increment the frontier, as this buffer
781 * was processed obviously
782 */
783 atomic_dec(&q->number_of_buffers_used);
784 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
785
786 if (q->qdio_error)
787 q->error_status_flags|=
788 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
789 q->qdio_error=SLSB_P_OUTPUT_ERROR;
790 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
791
792 break;
793
794 /* no new buffers */
795 default:
796 QDIO_DBF_TEXT5(0,trace,"outpni");
797 }
798 out:
799 return (q->first_to_check=f_mod_no);
800 }
801
802 /* all buffers are processed */
803 static int
804 qdio_is_outbound_q_done(struct qdio_q *q)
805 {
806 int no_used;
807 #ifdef CONFIG_QDIO_DEBUG
808 char dbf_text[15];
809 #endif
810
811 no_used=atomic_read(&q->number_of_buffers_used);
812
813 #ifdef CONFIG_QDIO_DEBUG
814 if (no_used) {
815 sprintf(dbf_text,"oqisnt%02x",no_used);
816 QDIO_DBF_TEXT4(0,trace,dbf_text);
817 } else {
818 QDIO_DBF_TEXT4(0,trace,"oqisdone");
819 }
820 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
821 #endif /* CONFIG_QDIO_DEBUG */
822 return (no_used==0);
823 }
824
825 static int
826 qdio_has_outbound_q_moved(struct qdio_q *q)
827 {
828 int i;
829
830 i=qdio_get_outbound_buffer_frontier(q);
831
832 if ( (i!=GET_SAVED_FRONTIER(q)) ||
833 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
834 SAVE_FRONTIER(q,i);
835 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
836 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
837 return 1;
838 } else {
839 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
840 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
841 return 0;
842 }
843 }
844
845 static void
846 qdio_kick_outbound_q(struct qdio_q *q)
847 {
848 int result;
849 #ifdef CONFIG_QDIO_DEBUG
850 char dbf_text[15];
851
852 QDIO_DBF_TEXT4(0,trace,"kickoutq");
853 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
854 #endif /* CONFIG_QDIO_DEBUG */
855
856 if (!q->siga_out)
857 return;
858
859 /* here's the story with cc=2 and busy bit set (thanks, Rick):
860 * VM's CP could present us cc=2 and busy bit set on SIGA-write
861 * during reconfiguration of their Guest LAN (only in HIPERS mode,
862 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
863 * the queues down immediately; and not being under VM we have a
864 * problem on cc=2 and busy bit set right away).
865 *
866 * Therefore qdio_siga_output will try for a short time constantly,
867 * if such a condition occurs. If it doesn't change, it will
868 * increase the busy_siga_counter and save the timestamp, and
869 * schedule the queue for later processing (via mark_q, using the
870 * queue tasklet). __qdio_outbound_processing will check out the
871 * counter. If non-zero, it will call qdio_kick_outbound_q as often
872 * as the value of the counter. This will attempt further SIGA
873 * instructions. For each successful SIGA, the counter is
874 * decreased, for failing SIGAs the counter remains the same, after
875 * all.
876 * After some time of no movement, qdio_kick_outbound_q will
877 * finally fail and reflect corresponding error codes to call
878 * the upper layer module and have it take the queues down.
879 *
880 * Note that this is a change from the original HiperSockets design
881 * (saying cc=2 and busy bit means take the queues down), but in
882 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
883 * conditions will still take the queues down, but the threshold is
884 * higher due to the Guest LAN environment.
885 */
886
887
888 result=qdio_siga_output(q);
889
890 switch (result) {
891 case 0:
892 /* went smooth this time, reset timestamp */
893 #ifdef CONFIG_QDIO_DEBUG
894 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
895 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
896 atomic_read(&q->busy_siga_counter));
897 QDIO_DBF_TEXT3(0,trace,dbf_text);
898 #endif /* CONFIG_QDIO_DEBUG */
899 q->timing.busy_start=0;
900 break;
901 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
902 /* cc=2 and busy bit: */
903 atomic_inc(&q->busy_siga_counter);
904
905 /* if the last siga was successful, save
906 * timestamp here */
907 if (!q->timing.busy_start)
908 q->timing.busy_start=NOW;
909
910 /* if we're in time, don't touch error_status_flags
911 * and siga_error */
912 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
913 qdio_mark_q(q);
914 break;
915 }
916 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
917 #ifdef CONFIG_QDIO_DEBUG
918 sprintf(dbf_text,"%4x%2x%2x",q->schid.sch_no,q->q_no,
919 atomic_read(&q->busy_siga_counter));
920 QDIO_DBF_TEXT3(0,trace,dbf_text);
921 #endif /* CONFIG_QDIO_DEBUG */
922 /* else fallthrough and report error */
923 default:
924 /* for plain cc=1, 2 or 3: */
925 if (q->siga_error)
926 q->error_status_flags|=
927 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
928 q->error_status_flags|=
929 QDIO_STATUS_LOOK_FOR_ERROR;
930 q->siga_error=result;
931 }
932 }
933
934 static void
935 qdio_kick_outbound_handler(struct qdio_q *q)
936 {
937 int start, end, real_end, count;
938 #ifdef CONFIG_QDIO_DEBUG
939 char dbf_text[15];
940 #endif
941
942 start = q->first_element_to_kick;
943 /* last_move_ftc was just updated */
944 real_end = GET_SAVED_FRONTIER(q);
945 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
946 (QDIO_MAX_BUFFERS_PER_Q-1);
947 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
948 (QDIO_MAX_BUFFERS_PER_Q-1);
949
950 #ifdef CONFIG_QDIO_DEBUG
951 QDIO_DBF_TEXT4(0,trace,"kickouth");
952 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
953
954 sprintf(dbf_text,"s=%2xc=%2x",start,count);
955 QDIO_DBF_TEXT4(0,trace,dbf_text);
956 #endif /* CONFIG_QDIO_DEBUG */
957
958 if (q->state==QDIO_IRQ_STATE_ACTIVE)
959 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
960 q->error_status_flags,
961 q->qdio_error,q->siga_error,q->q_no,start,count,
962 q->int_parm);
963
964 /* for the next time: */
965 q->first_element_to_kick=real_end;
966 q->qdio_error=0;
967 q->siga_error=0;
968 q->error_status_flags=0;
969 }
970
971 static void
972 __qdio_outbound_processing(struct qdio_q *q)
973 {
974 int siga_attempts;
975
976 QDIO_DBF_TEXT4(0,trace,"qoutproc");
977 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
978
979 if (unlikely(qdio_reserve_q(q))) {
980 qdio_release_q(q);
981 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs_resched);
982 /* as we're sissies, we'll check next time */
983 if (likely(!atomic_read(&q->is_in_shutdown))) {
984 qdio_mark_q(q);
985 QDIO_DBF_TEXT4(0,trace,"busy,agn");
986 }
987 return;
988 }
989 qdio_perf_stat_inc(&perf_stats.outbound_tl_runs);
990 qdio_perf_stat_inc(&perf_stats.tl_runs);
991
992 /* see comment in qdio_kick_outbound_q */
993 siga_attempts=atomic_read(&q->busy_siga_counter);
994 while (siga_attempts) {
995 atomic_dec(&q->busy_siga_counter);
996 qdio_kick_outbound_q(q);
997 siga_attempts--;
998 }
999
1000 if (qdio_has_outbound_q_moved(q))
1001 qdio_kick_outbound_handler(q);
1002
1003 if (q->queue_type == QDIO_ZFCP_QFMT) {
1004 if ((!q->hydra_gives_outbound_pcis) &&
1005 (!qdio_is_outbound_q_done(q)))
1006 qdio_mark_q(q);
1007 }
1008 else if (((!q->is_iqdio_q) && (!q->is_pci_out)) ||
1009 (q->queue_type == QDIO_IQDIO_QFMT_ASYNCH)) {
1010 /*
1011 * make sure buffer switch from PRIMED to EMPTY is noticed
1012 * and outbound_handler is called
1013 */
1014 if (qdio_is_outbound_q_done(q)) {
1015 del_timer(&q->timer);
1016 } else {
1017 if (!timer_pending(&q->timer))
1018 mod_timer(&q->timer, jiffies +
1019 QDIO_FORCE_CHECK_TIMEOUT);
1020 }
1021 }
1022
1023 qdio_release_q(q);
1024 }
1025
1026 static void
1027 qdio_outbound_processing(unsigned long q)
1028 {
1029 __qdio_outbound_processing((struct qdio_q *) q);
1030 }
1031
1032 /************************* INBOUND ROUTINES *******************************/
1033
1034
1035 static int
1036 qdio_get_inbound_buffer_frontier(struct qdio_q *q)
1037 {
1038 struct qdio_irq *irq;
1039 int f,f_mod_no;
1040 volatile char *slsb;
1041 unsigned int count = 1;
1042 int first_not_to_check;
1043 #ifdef CONFIG_QDIO_DEBUG
1044 char dbf_text[15];
1045 #endif /* CONFIG_QDIO_DEBUG */
1046 #ifdef QDIO_USE_PROCESSING_STATE
1047 int last_position=-1;
1048 #endif /* QDIO_USE_PROCESSING_STATE */
1049
1050 QDIO_DBF_TEXT4(0,trace,"getibfro");
1051 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1052
1053 irq = (struct qdio_irq *) q->irq_ptr;
1054 if (irq->is_qebsm)
1055 return qdio_qebsm_get_inbound_buffer_frontier(q);
1056
1057 slsb=&q->slsb.acc.val[0];
1058 f_mod_no=f=q->first_to_check;
1059 /*
1060 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
1061 * would return 0
1062 */
1063 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
1064 (QDIO_MAX_BUFFERS_PER_Q-1));
1065
1066 /*
1067 * we don't use this one, as a PCI or we after a thin interrupt
1068 * will sync the queues
1069 */
1070 /* SYNC_MEMORY;*/
1071
1072 check_next:
1073 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
1074 if (f==first_not_to_check)
1075 goto out;
1076 switch (slsb[f_mod_no]) {
1077
1078 /* CU_EMPTY means frontier is reached */
1079 case SLSB_CU_INPUT_EMPTY:
1080 QDIO_DBF_TEXT5(0,trace,"inptempt");
1081 break;
1082
1083 /* P_PRIMED means set slsb to P_PROCESSING and move on */
1084 case SLSB_P_INPUT_PRIMED:
1085 QDIO_DBF_TEXT5(0,trace,"inptprim");
1086
1087 #ifdef QDIO_USE_PROCESSING_STATE
1088 /*
1089 * as soon as running under VM, polling the input queues will
1090 * kill VM in terms of CP overhead
1091 */
1092 if (q->siga_sync) {
1093 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1094 } else {
1095 /* set the previous buffer to NOT_INIT. The current
1096 * buffer will be set to PROCESSING at the end of
1097 * this function to avoid further interrupts. */
1098 if (last_position>=0)
1099 set_slsb(q, &last_position,
1100 SLSB_P_INPUT_NOT_INIT, &count);
1101 atomic_set(&q->polling,1);
1102 last_position=f_mod_no;
1103 }
1104 #else /* QDIO_USE_PROCESSING_STATE */
1105 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1106 #endif /* QDIO_USE_PROCESSING_STATE */
1107 /*
1108 * not needed, as the inbound queue will be synced on the next
1109 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
1110 */
1111 /*SYNC_MEMORY;*/
1112 f++;
1113 atomic_dec(&q->number_of_buffers_used);
1114 goto check_next;
1115
1116 case SLSB_P_INPUT_NOT_INIT:
1117 case SLSB_P_INPUT_PROCESSING:
1118 QDIO_DBF_TEXT5(0,trace,"inpnipro");
1119 break;
1120
1121 /* P_ERROR means frontier is reached, break and report error */
1122 case SLSB_P_INPUT_ERROR:
1123 #ifdef CONFIG_QDIO_DEBUG
1124 sprintf(dbf_text,"inperr%2x",f_mod_no);
1125 QDIO_DBF_TEXT3(1,trace,dbf_text);
1126 #endif /* CONFIG_QDIO_DEBUG */
1127 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
1128
1129 /* kind of process the buffer */
1130 set_slsb(q, &f_mod_no, SLSB_P_INPUT_NOT_INIT, &count);
1131
1132 if (q->qdio_error)
1133 q->error_status_flags|=
1134 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
1135 q->qdio_error=SLSB_P_INPUT_ERROR;
1136 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
1137
1138 /* we increment the frontier, as this buffer
1139 * was processed obviously */
1140 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1141 atomic_dec(&q->number_of_buffers_used);
1142
1143 #ifdef QDIO_USE_PROCESSING_STATE
1144 last_position=-1;
1145 #endif /* QDIO_USE_PROCESSING_STATE */
1146
1147 break;
1148
1149 /* everything else means frontier not changed (HALTED or so) */
1150 default:
1151 break;
1152 }
1153 out:
1154 q->first_to_check=f_mod_no;
1155
1156 #ifdef QDIO_USE_PROCESSING_STATE
1157 if (last_position>=0)
1158 set_slsb(q, &last_position, SLSB_P_INPUT_PROCESSING, &count);
1159 #endif /* QDIO_USE_PROCESSING_STATE */
1160
1161 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
1162
1163 return q->first_to_check;
1164 }
1165
1166 static int
1167 qdio_has_inbound_q_moved(struct qdio_q *q)
1168 {
1169 int i;
1170
1171 i=qdio_get_inbound_buffer_frontier(q);
1172 if ( (i!=GET_SAVED_FRONTIER(q)) ||
1173 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
1174 SAVE_FRONTIER(q,i);
1175 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
1176 SAVE_TIMESTAMP(q);
1177
1178 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
1179 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1180 return 1;
1181 } else {
1182 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
1183 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1184 return 0;
1185 }
1186 }
1187
1188 /* means, no more buffers to be filled */
1189 static int
1190 tiqdio_is_inbound_q_done(struct qdio_q *q)
1191 {
1192 int no_used;
1193 unsigned int start_buf, count;
1194 unsigned char state = 0;
1195 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1196
1197 #ifdef CONFIG_QDIO_DEBUG
1198 char dbf_text[15];
1199 #endif
1200
1201 no_used=atomic_read(&q->number_of_buffers_used);
1202
1203 /* propagate the change from 82 to 80 through VM */
1204 SYNC_MEMORY;
1205
1206 #ifdef CONFIG_QDIO_DEBUG
1207 if (no_used) {
1208 sprintf(dbf_text,"iqisnt%02x",no_used);
1209 QDIO_DBF_TEXT4(0,trace,dbf_text);
1210 } else {
1211 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
1212 }
1213 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1214 #endif /* CONFIG_QDIO_DEBUG */
1215
1216 if (!no_used)
1217 return 1;
1218 if (irq->is_qebsm) {
1219 count = 1;
1220 start_buf = q->first_to_check;
1221 qdio_do_eqbs(q, &state, &start_buf, &count);
1222 } else
1223 state = q->slsb.acc.val[q->first_to_check];
1224 if (state != SLSB_P_INPUT_PRIMED)
1225 /*
1226 * nothing more to do, if next buffer is not PRIMED.
1227 * note that we did a SYNC_MEMORY before, that there
1228 * has been a sychnronization.
1229 * we will return 0 below, as there is nothing to do
1230 * (stop_polling not necessary, as we have not been
1231 * using the PROCESSING state
1232 */
1233 return 0;
1234
1235 /*
1236 * ok, the next input buffer is primed. that means, that device state
1237 * change indicator and adapter local summary are set, so we will find
1238 * it next time.
1239 * we will return 0 below, as there is nothing to do, except scheduling
1240 * ourselves for the next time.
1241 */
1242 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1243 tiqdio_sched_tl();
1244 return 0;
1245 }
1246
1247 static int
1248 qdio_is_inbound_q_done(struct qdio_q *q)
1249 {
1250 int no_used;
1251 unsigned int start_buf, count;
1252 unsigned char state = 0;
1253 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
1254
1255 #ifdef CONFIG_QDIO_DEBUG
1256 char dbf_text[15];
1257 #endif
1258
1259 no_used=atomic_read(&q->number_of_buffers_used);
1260
1261 /*
1262 * we need that one for synchronization with the adapter, as it
1263 * does a kind of PCI avoidance
1264 */
1265 SYNC_MEMORY;
1266
1267 if (!no_used) {
1268 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
1269 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1270 return 1;
1271 }
1272 if (irq->is_qebsm) {
1273 count = 1;
1274 start_buf = q->first_to_check;
1275 qdio_do_eqbs(q, &state, &start_buf, &count);
1276 } else
1277 state = q->slsb.acc.val[q->first_to_check];
1278 if (state == SLSB_P_INPUT_PRIMED) {
1279 /* we got something to do */
1280 QDIO_DBF_TEXT4(0,trace,"inqisntA");
1281 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1282 return 0;
1283 }
1284
1285 /* on VM, we don't poll, so the q is always done here */
1286 if (q->siga_sync)
1287 return 1;
1288 if (q->hydra_gives_outbound_pcis)
1289 return 1;
1290
1291 /*
1292 * at this point we know, that inbound first_to_check
1293 * has (probably) not moved (see qdio_inbound_processing)
1294 */
1295 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
1296 #ifdef CONFIG_QDIO_DEBUG
1297 QDIO_DBF_TEXT4(0,trace,"inqisdon");
1298 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1299 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1300 QDIO_DBF_TEXT4(0,trace,dbf_text);
1301 #endif /* CONFIG_QDIO_DEBUG */
1302 return 1;
1303 } else {
1304 #ifdef CONFIG_QDIO_DEBUG
1305 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1306 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1307 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1308 QDIO_DBF_TEXT4(0,trace,dbf_text);
1309 #endif /* CONFIG_QDIO_DEBUG */
1310 return 0;
1311 }
1312 }
1313
1314 static void
1315 qdio_kick_inbound_handler(struct qdio_q *q)
1316 {
1317 int count, start, end, real_end, i;
1318 #ifdef CONFIG_QDIO_DEBUG
1319 char dbf_text[15];
1320 #endif
1321
1322 QDIO_DBF_TEXT4(0,trace,"kickinh");
1323 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1324
1325 start=q->first_element_to_kick;
1326 real_end=q->first_to_check;
1327 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1328
1329 i=start;
1330 count=0;
1331 while (1) {
1332 count++;
1333 if (i==end)
1334 break;
1335 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1336 }
1337
1338 #ifdef CONFIG_QDIO_DEBUG
1339 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1340 QDIO_DBF_TEXT4(0,trace,dbf_text);
1341 #endif /* CONFIG_QDIO_DEBUG */
1342
1343 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1344 q->handler(q->cdev,
1345 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1346 q->qdio_error,q->siga_error,q->q_no,start,count,
1347 q->int_parm);
1348
1349 /* for the next time: */
1350 q->first_element_to_kick=real_end;
1351 q->qdio_error=0;
1352 q->siga_error=0;
1353 q->error_status_flags=0;
1354
1355 qdio_perf_stat_inc(&perf_stats.inbound_cnt);
1356 }
1357
1358 static void
1359 __tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1360 {
1361 struct qdio_irq *irq_ptr;
1362 struct qdio_q *oq;
1363 int i;
1364
1365 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1366 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1367
1368 /*
1369 * we first want to reserve the q, so that we know, that we don't
1370 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1371 * be set
1372 */
1373 if (unlikely(qdio_reserve_q(q))) {
1374 qdio_release_q(q);
1375 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1376 /*
1377 * as we might just be about to stop polling, we make
1378 * sure that we check again at least once more
1379 */
1380 tiqdio_sched_tl();
1381 return;
1382 }
1383 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs);
1384 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1385 qdio_unmark_q(q);
1386 goto out;
1387 }
1388
1389 /*
1390 * we reset spare_ind_was_set, when the queue does not use the
1391 * spare indicator
1392 */
1393 if (spare_ind_was_set)
1394 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1395
1396 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1397 goto out;
1398 /*
1399 * q->dev_st_chg_ind is the indicator, be it shared or not.
1400 * only clear it, if indicator is non-shared
1401 */
1402 if (!spare_ind_was_set)
1403 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1404
1405 if (q->hydra_gives_outbound_pcis) {
1406 if (!q->siga_sync_done_on_thinints) {
1407 SYNC_MEMORY_ALL;
1408 } else if (!q->siga_sync_done_on_outb_tis) {
1409 SYNC_MEMORY_ALL_OUTB;
1410 }
1411 } else {
1412 SYNC_MEMORY;
1413 }
1414 /*
1415 * maybe we have to do work on our outbound queues... at least
1416 * we have to check the outbound-int-capable thinint-capable
1417 * queues
1418 */
1419 if (q->hydra_gives_outbound_pcis) {
1420 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1421 for (i=0;i<irq_ptr->no_output_qs;i++) {
1422 oq = irq_ptr->output_qs[i];
1423 if (!qdio_is_outbound_q_done(oq)) {
1424 qdio_perf_stat_dec(&perf_stats.tl_runs);
1425 __qdio_outbound_processing(oq);
1426 }
1427 }
1428 }
1429
1430 if (!qdio_has_inbound_q_moved(q))
1431 goto out;
1432
1433 qdio_kick_inbound_handler(q);
1434 if (tiqdio_is_inbound_q_done(q))
1435 if (!qdio_stop_polling(q)) {
1436 /*
1437 * we set the flags to get into the stuff next time,
1438 * see also comment in qdio_stop_polling
1439 */
1440 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1441 tiqdio_sched_tl();
1442 }
1443 out:
1444 qdio_release_q(q);
1445 }
1446
1447 static void
1448 tiqdio_inbound_processing(unsigned long q)
1449 {
1450 __tiqdio_inbound_processing((struct qdio_q *) q,
1451 atomic_read(&spare_indicator_usecount));
1452 }
1453
1454 static void
1455 __qdio_inbound_processing(struct qdio_q *q)
1456 {
1457 int q_laps=0;
1458
1459 QDIO_DBF_TEXT4(0,trace,"qinproc");
1460 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1461
1462 if (unlikely(qdio_reserve_q(q))) {
1463 qdio_release_q(q);
1464 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs_resched);
1465 /* as we're sissies, we'll check next time */
1466 if (likely(!atomic_read(&q->is_in_shutdown))) {
1467 qdio_mark_q(q);
1468 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1469 }
1470 return;
1471 }
1472 qdio_perf_stat_inc(&perf_stats.inbound_tl_runs);
1473 qdio_perf_stat_inc(&perf_stats.tl_runs);
1474
1475 again:
1476 if (qdio_has_inbound_q_moved(q)) {
1477 qdio_kick_inbound_handler(q);
1478 if (!qdio_stop_polling(q)) {
1479 q_laps++;
1480 if (q_laps<QDIO_Q_LAPS)
1481 goto again;
1482 }
1483 qdio_mark_q(q);
1484 } else {
1485 if (!qdio_is_inbound_q_done(q))
1486 /* means poll time is not yet over */
1487 qdio_mark_q(q);
1488 }
1489
1490 qdio_release_q(q);
1491 }
1492
1493 static void
1494 qdio_inbound_processing(unsigned long q)
1495 {
1496 __qdio_inbound_processing((struct qdio_q *) q);
1497 }
1498
1499 /************************* MAIN ROUTINES *******************************/
1500
1501 #ifdef QDIO_USE_PROCESSING_STATE
1502 static int
1503 tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1504 {
1505 if (!q) {
1506 tiqdio_sched_tl();
1507 return 0;
1508 }
1509
1510 /*
1511 * under VM, we have not used the PROCESSING state, so no
1512 * need to stop polling
1513 */
1514 if (q->siga_sync)
1515 return 2;
1516
1517 if (unlikely(qdio_reserve_q(q))) {
1518 qdio_release_q(q);
1519 qdio_perf_stat_inc(&perf_stats.inbound_thin_tl_runs_resched);
1520 /*
1521 * as we might just be about to stop polling, we make
1522 * sure that we check again at least once more
1523 */
1524
1525 /*
1526 * sanity -- we'd get here without setting the
1527 * dev st chg ind
1528 */
1529 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1530 tiqdio_sched_tl();
1531 return 0;
1532 }
1533 if (qdio_stop_polling(q)) {
1534 qdio_release_q(q);
1535 return 2;
1536 }
1537 if (q_laps<QDIO_Q_LAPS-1) {
1538 qdio_release_q(q);
1539 return 3;
1540 }
1541 /*
1542 * we set the flags to get into the stuff
1543 * next time, see also comment in qdio_stop_polling
1544 */
1545 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1546 tiqdio_sched_tl();
1547 qdio_release_q(q);
1548 return 1;
1549
1550 }
1551 #endif /* QDIO_USE_PROCESSING_STATE */
1552
1553 static void
1554 tiqdio_inbound_checks(void)
1555 {
1556 struct qdio_q *q;
1557 int spare_ind_was_set=0;
1558 #ifdef QDIO_USE_PROCESSING_STATE
1559 int q_laps=0;
1560 #endif /* QDIO_USE_PROCESSING_STATE */
1561
1562 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1563 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1564
1565 #ifdef QDIO_USE_PROCESSING_STATE
1566 again:
1567 #endif /* QDIO_USE_PROCESSING_STATE */
1568
1569 /* when the spare indicator is used and set, save that and clear it */
1570 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1571 spare_ind_was_set = 1;
1572 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1573 }
1574
1575 q=(struct qdio_q*)tiq_list;
1576 do {
1577 if (!q)
1578 break;
1579 __tiqdio_inbound_processing(q, spare_ind_was_set);
1580 q=(struct qdio_q*)q->list_next;
1581 } while (q!=(struct qdio_q*)tiq_list);
1582
1583 #ifdef QDIO_USE_PROCESSING_STATE
1584 q=(struct qdio_q*)tiq_list;
1585 do {
1586 int ret;
1587
1588 ret = tiqdio_reset_processing_state(q, q_laps);
1589 switch (ret) {
1590 case 0:
1591 return;
1592 case 1:
1593 q_laps++;
1594 case 2:
1595 q = (struct qdio_q*)q->list_next;
1596 break;
1597 default:
1598 q_laps++;
1599 goto again;
1600 }
1601 } while (q!=(struct qdio_q*)tiq_list);
1602 #endif /* QDIO_USE_PROCESSING_STATE */
1603 }
1604
1605 static void
1606 tiqdio_tl(unsigned long data)
1607 {
1608 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1609
1610 qdio_perf_stat_inc(&perf_stats.tl_runs);
1611
1612 tiqdio_inbound_checks();
1613 }
1614
1615 /********************* GENERAL HELPER_ROUTINES ***********************/
1616
1617 static void
1618 qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1619 {
1620 int i;
1621 struct qdio_q *q;
1622
1623 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
1624 q = irq_ptr->input_qs[i];
1625 if (q) {
1626 free_page((unsigned long) q->slib);
1627 kmem_cache_free(qdio_q_cache, q);
1628 }
1629 q = irq_ptr->output_qs[i];
1630 if (q) {
1631 free_page((unsigned long) q->slib);
1632 kmem_cache_free(qdio_q_cache, q);
1633 }
1634 }
1635 free_page((unsigned long) irq_ptr->qdr);
1636 free_page((unsigned long) irq_ptr);
1637 }
1638
1639 static void
1640 qdio_set_impl_params(struct qdio_irq *irq_ptr,
1641 unsigned int qib_param_field_format,
1642 /* pointer to 128 bytes or NULL, if no param field */
1643 unsigned char *qib_param_field,
1644 /* pointer to no_queues*128 words of data or NULL */
1645 unsigned int no_input_qs,
1646 unsigned int no_output_qs,
1647 unsigned long *input_slib_elements,
1648 unsigned long *output_slib_elements)
1649 {
1650 int i,j;
1651
1652 if (!irq_ptr)
1653 return;
1654
1655 irq_ptr->qib.pfmt=qib_param_field_format;
1656 if (qib_param_field)
1657 memcpy(irq_ptr->qib.parm,qib_param_field,
1658 QDIO_MAX_BUFFERS_PER_Q);
1659
1660 if (input_slib_elements)
1661 for (i=0;i<no_input_qs;i++) {
1662 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1663 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1664 input_slib_elements[
1665 i*QDIO_MAX_BUFFERS_PER_Q+j];
1666 }
1667 if (output_slib_elements)
1668 for (i=0;i<no_output_qs;i++) {
1669 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1670 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1671 output_slib_elements[
1672 i*QDIO_MAX_BUFFERS_PER_Q+j];
1673 }
1674 }
1675
1676 static int
1677 qdio_alloc_qs(struct qdio_irq *irq_ptr,
1678 int no_input_qs, int no_output_qs)
1679 {
1680 int i;
1681 struct qdio_q *q;
1682
1683 for (i = 0; i < no_input_qs; i++) {
1684 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1685 if (!q)
1686 return -ENOMEM;
1687 memset(q, 0, sizeof(*q));
1688
1689 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1690 if (!q->slib) {
1691 kmem_cache_free(qdio_q_cache, q);
1692 return -ENOMEM;
1693 }
1694 irq_ptr->input_qs[i]=q;
1695 }
1696
1697 for (i = 0; i < no_output_qs; i++) {
1698 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
1699 if (!q)
1700 return -ENOMEM;
1701 memset(q, 0, sizeof(*q));
1702
1703 q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
1704 if (!q->slib) {
1705 kmem_cache_free(qdio_q_cache, q);
1706 return -ENOMEM;
1707 }
1708 irq_ptr->output_qs[i]=q;
1709 }
1710 return 0;
1711 }
1712
1713 static void
1714 qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1715 int no_input_qs, int no_output_qs,
1716 qdio_handler_t *input_handler,
1717 qdio_handler_t *output_handler,
1718 unsigned long int_parm,int q_format,
1719 unsigned long flags,
1720 void **inbound_sbals_array,
1721 void **outbound_sbals_array)
1722 {
1723 struct qdio_q *q;
1724 int i,j;
1725 char dbf_text[20]; /* see qdio_initialize */
1726 void *ptr;
1727 int available;
1728
1729 sprintf(dbf_text,"qfqs%4x",cdev->private->schid.sch_no);
1730 QDIO_DBF_TEXT0(0,setup,dbf_text);
1731 for (i=0;i<no_input_qs;i++) {
1732 q=irq_ptr->input_qs[i];
1733
1734 memset(q,0,((char*)&q->slib)-((char*)q));
1735 sprintf(dbf_text,"in-q%4x",i);
1736 QDIO_DBF_TEXT0(0,setup,dbf_text);
1737 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1738
1739 memset(q->slib,0,PAGE_SIZE);
1740 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1741
1742 available=0;
1743
1744 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1745 q->sbal[j]=*(inbound_sbals_array++);
1746
1747 q->queue_type=q_format;
1748 q->int_parm=int_parm;
1749 q->schid = irq_ptr->schid;
1750 q->irq_ptr = irq_ptr;
1751 q->cdev = cdev;
1752 q->mask=1<<(31-i);
1753 q->q_no=i;
1754 q->is_input_q=1;
1755 q->first_to_check=0;
1756 q->last_move_ftc=0;
1757 q->handler=input_handler;
1758 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1759
1760 /* q->is_thinint_q isn't valid at this time, but
1761 * irq_ptr->is_thinint_irq is
1762 */
1763 if (irq_ptr->is_thinint_irq)
1764 tasklet_init(&q->tasklet, tiqdio_inbound_processing,
1765 (unsigned long) q);
1766 else
1767 tasklet_init(&q->tasklet, qdio_inbound_processing,
1768 (unsigned long) q);
1769
1770 /* actually this is not used for inbound queues. yet. */
1771 atomic_set(&q->busy_siga_counter,0);
1772 q->timing.busy_start=0;
1773
1774 /* for (j=0;j<QDIO_STATS_NUMBER;j++)
1775 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1776 QDIO_STATS_NUMBER)*j;
1777 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1778 */
1779
1780 /* fill in slib */
1781 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1782 (unsigned long)(q->slib);
1783 q->slib->sla=(unsigned long)(q->sl);
1784 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1785
1786 /* fill in sl */
1787 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1788 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1789
1790 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1791 ptr=(void*)q->sl;
1792 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1793 ptr=(void*)&q->slsb;
1794 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1795 ptr=(void*)q->sbal[0];
1796 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1797
1798 /* fill in slsb */
1799 if (!irq_ptr->is_qebsm) {
1800 unsigned int count = 1;
1801 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1802 set_slsb(q, &j, SLSB_P_INPUT_NOT_INIT, &count);
1803 }
1804 }
1805
1806 for (i=0;i<no_output_qs;i++) {
1807 q=irq_ptr->output_qs[i];
1808 memset(q,0,((char*)&q->slib)-((char*)q));
1809
1810 sprintf(dbf_text,"outq%4x",i);
1811 QDIO_DBF_TEXT0(0,setup,dbf_text);
1812 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1813
1814 memset(q->slib,0,PAGE_SIZE);
1815 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1816
1817 available=0;
1818
1819 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1820 q->sbal[j]=*(outbound_sbals_array++);
1821
1822 q->queue_type=q_format;
1823 if ((q->queue_type == QDIO_IQDIO_QFMT) &&
1824 (no_output_qs > 1) &&
1825 (i == no_output_qs-1))
1826 q->queue_type = QDIO_IQDIO_QFMT_ASYNCH;
1827 q->int_parm=int_parm;
1828 q->is_input_q=0;
1829 q->is_pci_out = 0;
1830 q->schid = irq_ptr->schid;
1831 q->cdev = cdev;
1832 q->irq_ptr = irq_ptr;
1833 q->mask=1<<(31-i);
1834 q->q_no=i;
1835 q->first_to_check=0;
1836 q->last_move_ftc=0;
1837 q->handler=output_handler;
1838
1839 tasklet_init(&q->tasklet, qdio_outbound_processing,
1840 (unsigned long) q);
1841 setup_timer(&q->timer, qdio_outbound_processing,
1842 (unsigned long) q);
1843
1844 atomic_set(&q->busy_siga_counter,0);
1845 q->timing.busy_start=0;
1846
1847 /* fill in slib */
1848 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1849 (unsigned long)(q->slib);
1850 q->slib->sla=(unsigned long)(q->sl);
1851 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1852
1853 /* fill in sl */
1854 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1855 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1856
1857 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1858 ptr=(void*)q->sl;
1859 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1860 ptr=(void*)&q->slsb;
1861 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1862 ptr=(void*)q->sbal[0];
1863 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1864
1865 /* fill in slsb */
1866 if (!irq_ptr->is_qebsm) {
1867 unsigned int count = 1;
1868 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
1869 set_slsb(q, &j, SLSB_P_OUTPUT_NOT_INIT, &count);
1870 }
1871 }
1872 }
1873
1874 static void
1875 qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1876 unsigned int no_input_qs,
1877 unsigned int no_output_qs,
1878 unsigned int min_input_threshold,
1879 unsigned int max_input_threshold,
1880 unsigned int min_output_threshold,
1881 unsigned int max_output_threshold)
1882 {
1883 int i;
1884 struct qdio_q *q;
1885
1886 for (i=0;i<no_input_qs;i++) {
1887 q=irq_ptr->input_qs[i];
1888 q->timing.threshold=max_input_threshold;
1889 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1890 q->threshold_classes[j].threshold=
1891 min_input_threshold+
1892 (max_input_threshold-min_input_threshold)/
1893 QDIO_STATS_CLASSES;
1894 }
1895 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1896 }
1897 for (i=0;i<no_output_qs;i++) {
1898 q=irq_ptr->output_qs[i];
1899 q->timing.threshold=max_output_threshold;
1900 /* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1901 q->threshold_classes[j].threshold=
1902 min_output_threshold+
1903 (max_output_threshold-min_output_threshold)/
1904 QDIO_STATS_CLASSES;
1905 }
1906 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1907 }
1908 }
1909
1910 static void tiqdio_thinint_handler(void *ind, void *drv_data)
1911 {
1912 QDIO_DBF_TEXT4(0,trace,"thin_int");
1913
1914 qdio_perf_stat_inc(&perf_stats.thinints);
1915
1916 /* SVS only when needed:
1917 * issue SVS to benefit from iqdio interrupt avoidance
1918 * (SVS clears AISOI)*/
1919 if (!omit_svs)
1920 tiqdio_clear_global_summary();
1921
1922 tiqdio_inbound_checks();
1923 }
1924
1925 static void
1926 qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1927 {
1928 int i;
1929 #ifdef CONFIG_QDIO_DEBUG
1930 char dbf_text[15];
1931
1932 QDIO_DBF_TEXT5(0,trace,"newstate");
1933 sprintf(dbf_text,"%4x%4x",irq_ptr->schid.sch_no,state);
1934 QDIO_DBF_TEXT5(0,trace,dbf_text);
1935 #endif /* CONFIG_QDIO_DEBUG */
1936
1937 irq_ptr->state=state;
1938 for (i=0;i<irq_ptr->no_input_qs;i++)
1939 irq_ptr->input_qs[i]->state=state;
1940 for (i=0;i<irq_ptr->no_output_qs;i++)
1941 irq_ptr->output_qs[i]->state=state;
1942 mb();
1943 }
1944
1945 static void
1946 qdio_irq_check_sense(struct subchannel_id schid, struct irb *irb)
1947 {
1948 char dbf_text[15];
1949
1950 if (irb->esw.esw0.erw.cons) {
1951 sprintf(dbf_text,"sens%4x",schid.sch_no);
1952 QDIO_DBF_TEXT2(1,trace,dbf_text);
1953 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1954
1955 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
1956 QDIO_HEXDUMP16(WARN,"irb: ",irb);
1957 QDIO_HEXDUMP16(WARN,"sense data: ",irb->ecw);
1958 }
1959
1960 }
1961
1962 static void
1963 qdio_handle_pci(struct qdio_irq *irq_ptr)
1964 {
1965 int i;
1966 struct qdio_q *q;
1967
1968 qdio_perf_stat_inc(&perf_stats.pcis);
1969 for (i=0;i<irq_ptr->no_input_qs;i++) {
1970 q=irq_ptr->input_qs[i];
1971 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1972 qdio_mark_q(q);
1973 else {
1974 qdio_perf_stat_dec(&perf_stats.tl_runs);
1975 __qdio_inbound_processing(q);
1976 }
1977 }
1978 if (!irq_ptr->hydra_gives_outbound_pcis)
1979 return;
1980 for (i=0;i<irq_ptr->no_output_qs;i++) {
1981 q=irq_ptr->output_qs[i];
1982 if (qdio_is_outbound_q_done(q))
1983 continue;
1984 qdio_perf_stat_dec(&perf_stats.tl_runs);
1985 if (!irq_ptr->sync_done_on_outb_pcis)
1986 SYNC_MEMORY;
1987 __qdio_outbound_processing(q);
1988 }
1989 }
1990
1991 static void qdio_establish_handle_irq(struct ccw_device*, int, int);
1992
1993 static void
1994 qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
1995 int cstat, int dstat)
1996 {
1997 struct qdio_irq *irq_ptr;
1998 struct qdio_q *q;
1999 char dbf_text[15];
2000
2001 irq_ptr = cdev->private->qdio_data;
2002
2003 QDIO_DBF_TEXT2(1, trace, "ick2");
2004 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2005 QDIO_DBF_TEXT2(1,trace,dbf_text);
2006 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
2007 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2008 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2009 QDIO_PRINT_ERR("received check condition on activate " \
2010 "queues on device %s (cs=x%x, ds=x%x).\n",
2011 cdev->dev.bus_id, cstat, dstat);
2012 if (irq_ptr->no_input_qs) {
2013 q=irq_ptr->input_qs[0];
2014 } else if (irq_ptr->no_output_qs) {
2015 q=irq_ptr->output_qs[0];
2016 } else {
2017 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
2018 cdev->dev.bus_id);
2019 goto omit_handler_call;
2020 }
2021 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
2022 QDIO_STATUS_LOOK_FOR_ERROR,
2023 0,0,0,-1,-1,q->int_parm);
2024 omit_handler_call:
2025 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
2026
2027 }
2028
2029 static void
2030 qdio_call_shutdown(struct work_struct *work)
2031 {
2032 struct ccw_device_private *priv;
2033 struct ccw_device *cdev;
2034
2035 priv = container_of(work, struct ccw_device_private, kick_work);
2036 cdev = priv->cdev;
2037 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2038 put_device(&cdev->dev);
2039 }
2040
2041 static void
2042 qdio_timeout_handler(struct ccw_device *cdev)
2043 {
2044 struct qdio_irq *irq_ptr;
2045 char dbf_text[15];
2046
2047 QDIO_DBF_TEXT2(0, trace, "qtoh");
2048 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2049 QDIO_DBF_TEXT2(0, trace, dbf_text);
2050
2051 irq_ptr = cdev->private->qdio_data;
2052 sprintf(dbf_text, "state:%d", irq_ptr->state);
2053 QDIO_DBF_TEXT2(0, trace, dbf_text);
2054
2055 switch (irq_ptr->state) {
2056 case QDIO_IRQ_STATE_INACTIVE:
2057 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: timed out\n",
2058 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2059 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
2060 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2061 break;
2062 case QDIO_IRQ_STATE_CLEANUP:
2063 QDIO_PRINT_INFO("Did not get interrupt on cleanup, "
2064 "irq=0.%x.%x.\n",
2065 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2066 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2067 break;
2068 case QDIO_IRQ_STATE_ESTABLISHED:
2069 case QDIO_IRQ_STATE_ACTIVE:
2070 /* I/O has been terminated by common I/O layer. */
2071 QDIO_PRINT_INFO("Queues on irq 0.%x.%04x killed by cio.\n",
2072 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2073 QDIO_DBF_TEXT2(1, trace, "cio:term");
2074 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
2075 if (get_device(&cdev->dev)) {
2076 /* Can't call shutdown from interrupt context. */
2077 PREPARE_WORK(&cdev->private->kick_work,
2078 qdio_call_shutdown);
2079 queue_work(ccw_device_work, &cdev->private->kick_work);
2080 }
2081 break;
2082 default:
2083 BUG();
2084 }
2085 ccw_device_set_timeout(cdev, 0);
2086 wake_up(&cdev->private->wait_q);
2087 }
2088
2089 static void
2090 qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
2091 {
2092 struct qdio_irq *irq_ptr;
2093 int cstat,dstat;
2094 char dbf_text[15];
2095
2096 #ifdef CONFIG_QDIO_DEBUG
2097 QDIO_DBF_TEXT4(0, trace, "qint");
2098 sprintf(dbf_text, "%s", cdev->dev.bus_id);
2099 QDIO_DBF_TEXT4(0, trace, dbf_text);
2100 #endif /* CONFIG_QDIO_DEBUG */
2101
2102 if (!intparm) {
2103 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
2104 "handler, device %s\n", cdev->dev.bus_id);
2105 return;
2106 }
2107
2108 irq_ptr = cdev->private->qdio_data;
2109 if (!irq_ptr) {
2110 QDIO_DBF_TEXT2(1, trace, "uint");
2111 sprintf(dbf_text,"%s", cdev->dev.bus_id);
2112 QDIO_DBF_TEXT2(1,trace,dbf_text);
2113 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
2114 cdev->dev.bus_id);
2115 return;
2116 }
2117
2118 if (IS_ERR(irb)) {
2119 /* Currently running i/o is in error. */
2120 switch (PTR_ERR(irb)) {
2121 case -EIO:
2122 QDIO_PRINT_ERR("i/o error on device %s\n",
2123 cdev->dev.bus_id);
2124 return;
2125 case -ETIMEDOUT:
2126 qdio_timeout_handler(cdev);
2127 return;
2128 default:
2129 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
2130 PTR_ERR(irb), cdev->dev.bus_id);
2131 return;
2132 }
2133 }
2134
2135 qdio_irq_check_sense(irq_ptr->schid, irb);
2136
2137 #ifdef CONFIG_QDIO_DEBUG
2138 sprintf(dbf_text, "state:%d", irq_ptr->state);
2139 QDIO_DBF_TEXT4(0, trace, dbf_text);
2140 #endif /* CONFIG_QDIO_DEBUG */
2141
2142 cstat = irb->scsw.cstat;
2143 dstat = irb->scsw.dstat;
2144
2145 switch (irq_ptr->state) {
2146 case QDIO_IRQ_STATE_INACTIVE:
2147 qdio_establish_handle_irq(cdev, cstat, dstat);
2148 break;
2149
2150 case QDIO_IRQ_STATE_CLEANUP:
2151 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2152 break;
2153
2154 case QDIO_IRQ_STATE_ESTABLISHED:
2155 case QDIO_IRQ_STATE_ACTIVE:
2156 if (cstat & SCHN_STAT_PCI) {
2157 qdio_handle_pci(irq_ptr);
2158 break;
2159 }
2160
2161 if ((cstat&~SCHN_STAT_PCI)||dstat) {
2162 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
2163 break;
2164 }
2165 default:
2166 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
2167 "device %s?!\n",
2168 irq_ptr->state, cdev->dev.bus_id);
2169 }
2170 wake_up(&cdev->private->wait_q);
2171
2172 }
2173
2174 int
2175 qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
2176 unsigned int queue_number)
2177 {
2178 int cc = 0;
2179 struct qdio_q *q;
2180 struct qdio_irq *irq_ptr;
2181 void *ptr;
2182 #ifdef CONFIG_QDIO_DEBUG
2183 char dbf_text[15]="SyncXXXX";
2184 #endif
2185
2186 irq_ptr = cdev->private->qdio_data;
2187 if (!irq_ptr)
2188 return -ENODEV;
2189
2190 #ifdef CONFIG_QDIO_DEBUG
2191 *((int*)(&dbf_text[4])) = irq_ptr->schid.sch_no;
2192 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2193 *((int*)(&dbf_text[0]))=flags;
2194 *((int*)(&dbf_text[4]))=queue_number;
2195 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
2196 #endif /* CONFIG_QDIO_DEBUG */
2197
2198 if (flags&QDIO_FLAG_SYNC_INPUT) {
2199 q=irq_ptr->input_qs[queue_number];
2200 if (!q)
2201 return -EINVAL;
2202 if (!(irq_ptr->is_qebsm))
2203 cc = do_siga_sync(q->schid, 0, q->mask);
2204 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
2205 q=irq_ptr->output_qs[queue_number];
2206 if (!q)
2207 return -EINVAL;
2208 if (!(irq_ptr->is_qebsm))
2209 cc = do_siga_sync(q->schid, q->mask, 0);
2210 } else
2211 return -EINVAL;
2212
2213 ptr=&cc;
2214 if (cc)
2215 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
2216
2217 return cc;
2218 }
2219
2220 static void
2221 qdio_check_subchannel_qebsm(struct qdio_irq *irq_ptr, unsigned char qdioac,
2222 unsigned long token)
2223 {
2224 struct qdio_q *q;
2225 int i;
2226 unsigned int count, start_buf;
2227 char dbf_text[15];
2228
2229 /*check if QEBSM is disabled */
2230 if (!(irq_ptr->is_qebsm) || !(qdioac & 0x01)) {
2231 irq_ptr->is_qebsm = 0;
2232 irq_ptr->sch_token = 0;
2233 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2234 QDIO_DBF_TEXT0(0,setup,"noV=V");
2235 return;
2236 }
2237 irq_ptr->sch_token = token;
2238 /*input queue*/
2239 for (i = 0; i < irq_ptr->no_input_qs;i++) {
2240 q = irq_ptr->input_qs[i];
2241 count = QDIO_MAX_BUFFERS_PER_Q;
2242 start_buf = 0;
2243 set_slsb(q, &start_buf, SLSB_P_INPUT_NOT_INIT, &count);
2244 }
2245 sprintf(dbf_text,"V=V:%2x",irq_ptr->is_qebsm);
2246 QDIO_DBF_TEXT0(0,setup,dbf_text);
2247 sprintf(dbf_text,"%8lx",irq_ptr->sch_token);
2248 QDIO_DBF_TEXT0(0,setup,dbf_text);
2249 /*output queue*/
2250 for (i = 0; i < irq_ptr->no_output_qs; i++) {
2251 q = irq_ptr->output_qs[i];
2252 count = QDIO_MAX_BUFFERS_PER_Q;
2253 start_buf = 0;
2254 set_slsb(q, &start_buf, SLSB_P_OUTPUT_NOT_INIT, &count);
2255 }
2256 }
2257
2258 static void
2259 qdio_get_ssqd_information(struct qdio_irq *irq_ptr)
2260 {
2261 int result;
2262 unsigned char qdioac;
2263 struct {
2264 struct chsc_header request;
2265 u16 reserved1:10;
2266 u16 ssid:2;
2267 u16 fmt:4;
2268 u16 first_sch;
2269 u16 reserved2;
2270 u16 last_sch;
2271 u32 reserved3;
2272 struct chsc_header response;
2273 u32 reserved4;
2274 u8 flags;
2275 u8 reserved5;
2276 u16 sch;
2277 u8 qfmt;
2278 u8 parm;
2279 u8 qdioac1;
2280 u8 sch_class;
2281 u8 reserved7;
2282 u8 icnt;
2283 u8 reserved8;
2284 u8 ocnt;
2285 u8 reserved9;
2286 u8 mbccnt;
2287 u16 qdioac2;
2288 u64 sch_token;
2289 } *ssqd_area;
2290
2291 QDIO_DBF_TEXT0(0,setup,"getssqd");
2292 qdioac = 0;
2293 ssqd_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2294 if (!ssqd_area) {
2295 QDIO_PRINT_WARN("Could not get memory for chsc. Using all " \
2296 "SIGAs for sch x%x.\n", irq_ptr->schid.sch_no);
2297 irq_ptr->qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2298 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2299 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2300 irq_ptr->is_qebsm = 0;
2301 irq_ptr->sch_token = 0;
2302 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
2303 return;
2304 }
2305
2306 ssqd_area->request = (struct chsc_header) {
2307 .length = 0x0010,
2308 .code = 0x0024,
2309 };
2310 ssqd_area->first_sch = irq_ptr->schid.sch_no;
2311 ssqd_area->last_sch = irq_ptr->schid.sch_no;
2312 ssqd_area->ssid = irq_ptr->schid.ssid;
2313 result = chsc(ssqd_area);
2314
2315 if (result) {
2316 QDIO_PRINT_WARN("CHSC returned cc %i. Using all " \
2317 "SIGAs for sch 0.%x.%x.\n", result,
2318 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2319 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2320 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2321 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2322 irq_ptr->is_qebsm = 0;
2323 goto out;
2324 }
2325
2326 if (ssqd_area->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2327 QDIO_PRINT_WARN("response upon checking SIGA needs " \
2328 "is 0x%x. Using all SIGAs for sch 0.%x.%x.\n",
2329 ssqd_area->response.code,
2330 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2331 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2332 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2333 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2334 irq_ptr->is_qebsm = 0;
2335 goto out;
2336 }
2337 if (!(ssqd_area->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2338 !(ssqd_area->flags & CHSC_FLAG_VALIDITY) ||
2339 (ssqd_area->sch != irq_ptr->schid.sch_no)) {
2340 QDIO_PRINT_WARN("huh? problems checking out sch 0.%x.%x... " \
2341 "using all SIGAs.\n",
2342 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2343 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2344 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2345 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* worst case */
2346 irq_ptr->is_qebsm = 0;
2347 goto out;
2348 }
2349 qdioac = ssqd_area->qdioac1;
2350 out:
2351 qdio_check_subchannel_qebsm(irq_ptr, qdioac,
2352 ssqd_area->sch_token);
2353 mempool_free(ssqd_area, qdio_mempool_scssc);
2354 irq_ptr->qdioac = qdioac;
2355 }
2356
2357 static unsigned int
2358 tiqdio_check_chsc_availability(void)
2359 {
2360 char dbf_text[15];
2361
2362 if (!css_characteristics_avail)
2363 return -EIO;
2364
2365 /* Check for bit 41. */
2366 if (!css_general_characteristics.aif) {
2367 QDIO_PRINT_WARN("Adapter interruption facility not " \
2368 "installed.\n");
2369 return -ENOENT;
2370 }
2371
2372 /* Check for bits 107 and 108. */
2373 if (!css_chsc_characteristics.scssc ||
2374 !css_chsc_characteristics.scsscf) {
2375 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2376 "not available.\n");
2377 return -ENOENT;
2378 }
2379
2380 /* Check for OSA/FCP thin interrupts (bit 67). */
2381 hydra_thinints = css_general_characteristics.aif_osa;
2382 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2383 QDIO_DBF_TEXT0(0,setup,dbf_text);
2384
2385 #ifdef CONFIG_64BIT
2386 /* Check for QEBSM support in general (bit 58). */
2387 is_passthrough = css_general_characteristics.qebsm;
2388 #endif
2389 sprintf(dbf_text,"cssQBS:%1x", is_passthrough);
2390 QDIO_DBF_TEXT0(0,setup,dbf_text);
2391
2392 /* Check for aif time delay disablement fac (bit 56). If installed,
2393 * omit svs even under lpar (good point by rick again) */
2394 omit_svs = css_general_characteristics.aif_tdd;
2395 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2396 QDIO_DBF_TEXT0(0,setup,dbf_text);
2397 return 0;
2398 }
2399
2400
2401 static unsigned int
2402 tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2403 {
2404 unsigned long real_addr_local_summary_bit;
2405 unsigned long real_addr_dev_st_chg_ind;
2406 void *ptr;
2407 char dbf_text[15];
2408
2409 unsigned int resp_code;
2410 int result;
2411
2412 struct {
2413 struct chsc_header request;
2414 u16 operation_code;
2415 u16 reserved1;
2416 u32 reserved2;
2417 u32 reserved3;
2418 u64 summary_indicator_addr;
2419 u64 subchannel_indicator_addr;
2420 u32 ks:4;
2421 u32 kc:4;
2422 u32 reserved4:21;
2423 u32 isc:3;
2424 u32 word_with_d_bit;
2425 /* set to 0x10000000 to enable
2426 * time delay disablement facility */
2427 u32 reserved5;
2428 struct subchannel_id schid;
2429 u32 reserved6[1004];
2430 struct chsc_header response;
2431 u32 reserved7;
2432 } *scssc_area;
2433
2434 if (!irq_ptr->is_thinint_irq)
2435 return -ENODEV;
2436
2437 if (reset_to_zero) {
2438 real_addr_local_summary_bit=0;
2439 real_addr_dev_st_chg_ind=0;
2440 } else {
2441 real_addr_local_summary_bit=
2442 virt_to_phys((volatile void *)tiqdio_ind);
2443 real_addr_dev_st_chg_ind=
2444 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2445 }
2446
2447 scssc_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2448 if (!scssc_area) {
2449 QDIO_PRINT_WARN("No memory for setting indicators on " \
2450 "subchannel 0.%x.%x.\n",
2451 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2452 return -ENOMEM;
2453 }
2454 scssc_area->request = (struct chsc_header) {
2455 .length = 0x0fe0,
2456 .code = 0x0021,
2457 };
2458 scssc_area->operation_code = 0;
2459
2460 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2461 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2462 scssc_area->ks = QDIO_STORAGE_KEY;
2463 scssc_area->kc = QDIO_STORAGE_KEY;
2464 scssc_area->isc = TIQDIO_THININT_ISC;
2465 scssc_area->schid = irq_ptr->schid;
2466 /* enables the time delay disablement facility. Don't care
2467 * whether it is really there (i.e. we haven't checked for
2468 * it) */
2469 if (css_general_characteristics.aif_tdd)
2470 scssc_area->word_with_d_bit = 0x10000000;
2471 else
2472 QDIO_PRINT_WARN("Time delay disablement facility " \
2473 "not available\n");
2474
2475 result = chsc(scssc_area);
2476 if (result) {
2477 QDIO_PRINT_WARN("could not set indicators on irq 0.%x.%x, " \
2478 "cc=%i.\n",
2479 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,result);
2480 result = -EIO;
2481 goto out;
2482 }
2483
2484 resp_code = scssc_area->response.code;
2485 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2486 QDIO_PRINT_WARN("response upon setting indicators " \
2487 "is 0x%x.\n",resp_code);
2488 sprintf(dbf_text,"sidR%4x",resp_code);
2489 QDIO_DBF_TEXT1(0,trace,dbf_text);
2490 QDIO_DBF_TEXT1(0,setup,dbf_text);
2491 ptr=&scssc_area->response;
2492 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2493 result = -EIO;
2494 goto out;
2495 }
2496
2497 QDIO_DBF_TEXT2(0,setup,"setscind");
2498 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2499 sizeof(unsigned long));
2500 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2501 result = 0;
2502 out:
2503 mempool_free(scssc_area, qdio_mempool_scssc);
2504 return result;
2505
2506 }
2507
2508 static unsigned int
2509 tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2510 {
2511 unsigned int resp_code;
2512 int result;
2513 void *ptr;
2514 char dbf_text[15];
2515
2516 struct {
2517 struct chsc_header request;
2518 u16 operation_code;
2519 u16 reserved1;
2520 u32 reserved2;
2521 u32 reserved3;
2522 u32 reserved4[2];
2523 u32 delay_target;
2524 u32 reserved5[1009];
2525 struct chsc_header response;
2526 u32 reserved6;
2527 } *scsscf_area;
2528
2529 if (!irq_ptr->is_thinint_irq)
2530 return -ENODEV;
2531
2532 scsscf_area = mempool_alloc(qdio_mempool_scssc, GFP_ATOMIC);
2533 if (!scsscf_area) {
2534 QDIO_PRINT_WARN("No memory for setting delay target on " \
2535 "subchannel 0.%x.%x.\n",
2536 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
2537 return -ENOMEM;
2538 }
2539 scsscf_area->request = (struct chsc_header) {
2540 .length = 0x0fe0,
2541 .code = 0x1027,
2542 };
2543
2544 scsscf_area->delay_target = delay_target<<16;
2545
2546 result=chsc(scsscf_area);
2547 if (result) {
2548 QDIO_PRINT_WARN("could not set delay target on irq 0.%x.%x, " \
2549 "cc=%i. Continuing.\n",
2550 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2551 result);
2552 result = -EIO;
2553 goto out;
2554 }
2555
2556 resp_code = scsscf_area->response.code;
2557 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2558 QDIO_PRINT_WARN("response upon setting delay target " \
2559 "is 0x%x. Continuing.\n",resp_code);
2560 sprintf(dbf_text,"sdtR%4x",resp_code);
2561 QDIO_DBF_TEXT1(0,trace,dbf_text);
2562 QDIO_DBF_TEXT1(0,setup,dbf_text);
2563 ptr=&scsscf_area->response;
2564 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2565 }
2566 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2567 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2568 result = 0; /* not critical */
2569 out:
2570 mempool_free(scsscf_area, qdio_mempool_scssc);
2571 return result;
2572 }
2573
2574 int
2575 qdio_cleanup(struct ccw_device *cdev, int how)
2576 {
2577 struct qdio_irq *irq_ptr;
2578 char dbf_text[15];
2579 int rc;
2580
2581 irq_ptr = cdev->private->qdio_data;
2582 if (!irq_ptr)
2583 return -ENODEV;
2584
2585 sprintf(dbf_text,"qcln%4x",irq_ptr->schid.sch_no);
2586 QDIO_DBF_TEXT1(0,trace,dbf_text);
2587 QDIO_DBF_TEXT0(0,setup,dbf_text);
2588
2589 rc = qdio_shutdown(cdev, how);
2590 if ((rc == 0) || (rc == -EINPROGRESS))
2591 rc = qdio_free(cdev);
2592 return rc;
2593 }
2594
2595 int
2596 qdio_shutdown(struct ccw_device *cdev, int how)
2597 {
2598 struct qdio_irq *irq_ptr;
2599 int i;
2600 int result = 0;
2601 int rc;
2602 unsigned long flags;
2603 int timeout;
2604 char dbf_text[15];
2605
2606 irq_ptr = cdev->private->qdio_data;
2607 if (!irq_ptr)
2608 return -ENODEV;
2609
2610 down(&irq_ptr->setting_up_sema);
2611
2612 sprintf(dbf_text,"qsqs%4x",irq_ptr->schid.sch_no);
2613 QDIO_DBF_TEXT1(0,trace,dbf_text);
2614 QDIO_DBF_TEXT0(0,setup,dbf_text);
2615
2616 /* mark all qs as uninteresting */
2617 for (i=0;i<irq_ptr->no_input_qs;i++)
2618 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2619
2620 for (i=0;i<irq_ptr->no_output_qs;i++)
2621 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2622
2623 tasklet_kill(&tiqdio_tasklet);
2624
2625 for (i=0;i<irq_ptr->no_input_qs;i++) {
2626 qdio_unmark_q(irq_ptr->input_qs[i]);
2627 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2628 wait_event_interruptible_timeout(cdev->private->wait_q,
2629 !atomic_read(&irq_ptr->
2630 input_qs[i]->
2631 use_count),
2632 QDIO_NO_USE_COUNT_TIMEOUT);
2633 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2634 result=-EINPROGRESS;
2635 }
2636
2637 for (i=0;i<irq_ptr->no_output_qs;i++) {
2638 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
2639 del_timer(&irq_ptr->output_qs[i]->timer);
2640 wait_event_interruptible_timeout(cdev->private->wait_q,
2641 !atomic_read(&irq_ptr->
2642 output_qs[i]->
2643 use_count),
2644 QDIO_NO_USE_COUNT_TIMEOUT);
2645 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2646 result=-EINPROGRESS;
2647 }
2648
2649 /* cleanup subchannel */
2650 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2651 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2652 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2653 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2654 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2655 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2656 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2657 } else { /* default behaviour */
2658 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2659 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2660 }
2661 if (rc == -ENODEV) {
2662 /* No need to wait for device no longer present. */
2663 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2664 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2665 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2666 /*
2667 * Whoever put another handler there, has to cope with the
2668 * interrupt theirself. Might happen if qdio_shutdown was
2669 * called on already shutdown queues, but this shouldn't have
2670 * bad side effects.
2671 */
2672 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2673 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2674 } else if (rc == 0) {
2675 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
2676 ccw_device_set_timeout(cdev, timeout);
2677 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2678
2679 wait_event(cdev->private->wait_q,
2680 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2681 irq_ptr->state == QDIO_IRQ_STATE_ERR);
2682 } else {
2683 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2684 "device %s\n", result, cdev->dev.bus_id);
2685 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2686 result = rc;
2687 goto out;
2688 }
2689 if (irq_ptr->is_thinint_irq) {
2690 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2691 tiqdio_set_subchannel_ind(irq_ptr,1);
2692 /* reset adapter interrupt indicators */
2693 }
2694
2695 /* exchange int handlers, if necessary */
2696 if ((void*)cdev->handler == (void*)qdio_handler)
2697 cdev->handler=irq_ptr->original_int_handler;
2698
2699 /* Ignore errors. */
2700 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2701 ccw_device_set_timeout(cdev, 0);
2702 out:
2703 up(&irq_ptr->setting_up_sema);
2704 return result;
2705 }
2706
2707 int
2708 qdio_free(struct ccw_device *cdev)
2709 {
2710 struct qdio_irq *irq_ptr;
2711 char dbf_text[15];
2712
2713 irq_ptr = cdev->private->qdio_data;
2714 if (!irq_ptr)
2715 return -ENODEV;
2716
2717 down(&irq_ptr->setting_up_sema);
2718
2719 sprintf(dbf_text,"qfqs%4x",irq_ptr->schid.sch_no);
2720 QDIO_DBF_TEXT1(0,trace,dbf_text);
2721 QDIO_DBF_TEXT0(0,setup,dbf_text);
2722
2723 cdev->private->qdio_data = NULL;
2724
2725 up(&irq_ptr->setting_up_sema);
2726
2727 qdio_release_irq_memory(irq_ptr);
2728 module_put(THIS_MODULE);
2729 return 0;
2730 }
2731
2732 static void
2733 qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2734 {
2735 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2736
2737 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2738 QDIO_DBF_TEXT0(0,setup,dbf_text);
2739 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2740 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2741 QDIO_DBF_TEXT0(0,setup,dbf_text);
2742 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2743 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2744 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2745 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2746 QDIO_DBF_TEXT0(0,setup,dbf_text);
2747 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2748 QDIO_DBF_TEXT0(0,setup,dbf_text);
2749 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2750 QDIO_DBF_TEXT0(0,setup,dbf_text);
2751 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2752 QDIO_DBF_TEXT0(0,setup,dbf_text);
2753 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2754 QDIO_DBF_TEXT0(0,setup,dbf_text);
2755 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2756 QDIO_DBF_TEXT0(0,setup,dbf_text);
2757 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2758 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2759 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2760 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2761 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2762 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2763 }
2764
2765 static void
2766 qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2767 {
2768 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2769 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2770
2771 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2772
2773 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2774
2775 irq_ptr->qdr->qdf0[i].slsba=
2776 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2777
2778 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2779 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2780 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2781 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2782 }
2783
2784 static void
2785 qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2786 int j, int iqfmt)
2787 {
2788 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2789 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2790
2791 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2792
2793 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2794
2795 irq_ptr->qdr->qdf0[i+j].slsba=
2796 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2797
2798 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2799 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2800 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2801 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2802 }
2803
2804
2805 static void
2806 qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2807 {
2808 int i;
2809
2810 for (i=0;i<irq_ptr->no_input_qs;i++) {
2811 irq_ptr->input_qs[i]->siga_sync=
2812 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2813 irq_ptr->input_qs[i]->siga_in=
2814 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2815 irq_ptr->input_qs[i]->siga_out=
2816 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2817 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2818 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2819 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2820 irq_ptr->hydra_gives_outbound_pcis;
2821 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2822 ((irq_ptr->qdioac&
2823 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2824 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2825 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2826 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2827
2828 }
2829 }
2830
2831 static void
2832 qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2833 {
2834 int i;
2835
2836 for (i=0;i<irq_ptr->no_output_qs;i++) {
2837 irq_ptr->output_qs[i]->siga_sync=
2838 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2839 irq_ptr->output_qs[i]->siga_in=
2840 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2841 irq_ptr->output_qs[i]->siga_out=
2842 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2843 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2844 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2845 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2846 irq_ptr->hydra_gives_outbound_pcis;
2847 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2848 ((irq_ptr->qdioac&
2849 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2850 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2851 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2852 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2853
2854 }
2855 }
2856
2857 static int
2858 qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2859 int dstat)
2860 {
2861 char dbf_text[15];
2862 struct qdio_irq *irq_ptr;
2863
2864 irq_ptr = cdev->private->qdio_data;
2865
2866 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
2867 sprintf(dbf_text,"ick1%4x",irq_ptr->schid.sch_no);
2868 QDIO_DBF_TEXT2(1,trace,dbf_text);
2869 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2870 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2871 QDIO_PRINT_ERR("received check condition on establish " \
2872 "queues on irq 0.%x.%x (cs=x%x, ds=x%x).\n",
2873 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2874 cstat,dstat);
2875 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2876 }
2877
2878 if (!(dstat & DEV_STAT_DEV_END)) {
2879 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2880 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2881 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2882 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: didn't get "
2883 "device end: dstat=%02x, cstat=%02x\n",
2884 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
2885 dstat, cstat);
2886 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2887 return 1;
2888 }
2889
2890 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2891 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2892 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2893 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2894 QDIO_PRINT_ERR("establish queues on irq 0.%x.%04x: got "
2895 "the following devstat: dstat=%02x, "
2896 "cstat=%02x\n", irq_ptr->schid.ssid,
2897 irq_ptr->schid.sch_no, dstat, cstat);
2898 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2899 return 1;
2900 }
2901 return 0;
2902 }
2903
2904 static void
2905 qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2906 {
2907 struct qdio_irq *irq_ptr;
2908 char dbf_text[15];
2909
2910 irq_ptr = cdev->private->qdio_data;
2911
2912 sprintf(dbf_text,"qehi%4x",cdev->private->schid.sch_no);
2913 QDIO_DBF_TEXT0(0,setup,dbf_text);
2914 QDIO_DBF_TEXT0(0,trace,dbf_text);
2915
2916 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat)) {
2917 ccw_device_set_timeout(cdev, 0);
2918 return;
2919 }
2920
2921 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
2922 ccw_device_set_timeout(cdev, 0);
2923 }
2924
2925 int
2926 qdio_initialize(struct qdio_initialize *init_data)
2927 {
2928 int rc;
2929 char dbf_text[15];
2930
2931 sprintf(dbf_text,"qini%4x",init_data->cdev->private->schid.sch_no);
2932 QDIO_DBF_TEXT0(0,setup,dbf_text);
2933 QDIO_DBF_TEXT0(0,trace,dbf_text);
2934
2935 rc = qdio_allocate(init_data);
2936 if (rc == 0) {
2937 rc = qdio_establish(init_data);
2938 if (rc != 0)
2939 qdio_free(init_data->cdev);
2940 }
2941
2942 return rc;
2943 }
2944
2945
2946 int
2947 qdio_allocate(struct qdio_initialize *init_data)
2948 {
2949 struct qdio_irq *irq_ptr;
2950 char dbf_text[15];
2951
2952 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->schid.sch_no);
2953 QDIO_DBF_TEXT0(0,setup,dbf_text);
2954 QDIO_DBF_TEXT0(0,trace,dbf_text);
2955 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2956 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2957 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2958 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2959 return -EINVAL;
2960
2961 if (!init_data->input_sbal_addr_array)
2962 return -EINVAL;
2963
2964 if (!init_data->output_sbal_addr_array)
2965 return -EINVAL;
2966
2967 qdio_allocate_do_dbf(init_data);
2968
2969 /* create irq */
2970 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
2971
2972 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2973 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2974
2975 if (!irq_ptr) {
2976 QDIO_PRINT_ERR("allocation of irq_ptr failed!\n");
2977 return -ENOMEM;
2978 }
2979
2980 init_MUTEX(&irq_ptr->setting_up_sema);
2981
2982 /* QDR must be in DMA area since CCW data address is only 32 bit */
2983 irq_ptr->qdr = (struct qdr *) __get_free_page(GFP_KERNEL | GFP_DMA);
2984 if (!(irq_ptr->qdr)) {
2985 free_page((unsigned long) irq_ptr);
2986 QDIO_PRINT_ERR("allocation of irq_ptr->qdr failed!\n");
2987 return -ENOMEM;
2988 }
2989 QDIO_DBF_TEXT0(0,setup,"qdr:");
2990 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
2991
2992 if (qdio_alloc_qs(irq_ptr,
2993 init_data->no_input_qs,
2994 init_data->no_output_qs)) {
2995 QDIO_PRINT_ERR("queue allocation failed!\n");
2996 qdio_release_irq_memory(irq_ptr);
2997 return -ENOMEM;
2998 }
2999
3000 init_data->cdev->private->qdio_data = irq_ptr;
3001
3002 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
3003
3004 return 0;
3005 }
3006
3007 static int qdio_fill_irq(struct qdio_initialize *init_data)
3008 {
3009 int i;
3010 char dbf_text[15];
3011 struct ciw *ciw;
3012 int is_iqdio;
3013 struct qdio_irq *irq_ptr;
3014
3015 irq_ptr = init_data->cdev->private->qdio_data;
3016
3017 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
3018
3019 /* wipes qib.ac, required by ar7063 */
3020 memset(irq_ptr->qdr,0,sizeof(struct qdr));
3021
3022 irq_ptr->int_parm=init_data->int_parm;
3023
3024 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
3025 irq_ptr->no_input_qs=init_data->no_input_qs;
3026 irq_ptr->no_output_qs=init_data->no_output_qs;
3027
3028 if (init_data->q_format==QDIO_IQDIO_QFMT) {
3029 irq_ptr->is_iqdio_irq=1;
3030 irq_ptr->is_thinint_irq=1;
3031 } else {
3032 irq_ptr->is_iqdio_irq=0;
3033 irq_ptr->is_thinint_irq=hydra_thinints;
3034 }
3035 sprintf(dbf_text,"is_i_t%1x%1x",
3036 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
3037 QDIO_DBF_TEXT2(0,setup,dbf_text);
3038
3039 if (irq_ptr->is_thinint_irq) {
3040 irq_ptr->dev_st_chg_ind = qdio_get_indicator();
3041 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
3042 if (!irq_ptr->dev_st_chg_ind) {
3043 QDIO_PRINT_WARN("no indicator location available " \
3044 "for irq 0.%x.%x\n",
3045 irq_ptr->schid.ssid, irq_ptr->schid.sch_no);
3046 qdio_release_irq_memory(irq_ptr);
3047 return -ENOBUFS;
3048 }
3049 }
3050
3051 /* defaults */
3052 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
3053 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
3054 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
3055 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
3056
3057 qdio_fill_qs(irq_ptr, init_data->cdev,
3058 init_data->no_input_qs,
3059 init_data->no_output_qs,
3060 init_data->input_handler,
3061 init_data->output_handler,init_data->int_parm,
3062 init_data->q_format,init_data->flags,
3063 init_data->input_sbal_addr_array,
3064 init_data->output_sbal_addr_array);
3065
3066 if (!try_module_get(THIS_MODULE)) {
3067 QDIO_PRINT_CRIT("try_module_get() failed!\n");
3068 qdio_release_irq_memory(irq_ptr);
3069 return -EINVAL;
3070 }
3071
3072 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
3073 init_data->no_output_qs,
3074 init_data->min_input_threshold,
3075 init_data->max_input_threshold,
3076 init_data->min_output_threshold,
3077 init_data->max_output_threshold);
3078
3079 /* fill in qdr */
3080 irq_ptr->qdr->qfmt=init_data->q_format;
3081 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
3082 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
3083 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
3084 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
3085
3086 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
3087 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
3088
3089 /* fill in qib */
3090 irq_ptr->is_qebsm = is_passthrough;
3091 if (irq_ptr->is_qebsm)
3092 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
3093
3094 irq_ptr->qib.qfmt=init_data->q_format;
3095 if (init_data->no_input_qs)
3096 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
3097 if (init_data->no_output_qs)
3098 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
3099 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
3100
3101 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
3102 init_data->qib_param_field,
3103 init_data->no_input_qs,
3104 init_data->no_output_qs,
3105 init_data->input_slib_elements,
3106 init_data->output_slib_elements);
3107
3108 /* first input descriptors, then output descriptors */
3109 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
3110 for (i=0;i<init_data->no_input_qs;i++)
3111 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
3112
3113 for (i=0;i<init_data->no_output_qs;i++)
3114 qdio_allocate_fill_output_desc(irq_ptr, i,
3115 init_data->no_input_qs,
3116 is_iqdio);
3117
3118 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
3119
3120 /* get qdio commands */
3121 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
3122 if (!ciw) {
3123 QDIO_DBF_TEXT2(1,setup,"no eq");
3124 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
3125 "Trying to use default.\n");
3126 } else
3127 irq_ptr->equeue = *ciw;
3128 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
3129 if (!ciw) {
3130 QDIO_DBF_TEXT2(1,setup,"no aq");
3131 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
3132 "Trying to use default.\n");
3133 } else
3134 irq_ptr->aqueue = *ciw;
3135
3136 /* Set new interrupt handler. */
3137 irq_ptr->original_int_handler = init_data->cdev->handler;
3138 init_data->cdev->handler = qdio_handler;
3139
3140 return 0;
3141 }
3142
3143 int
3144 qdio_establish(struct qdio_initialize *init_data)
3145 {
3146 struct qdio_irq *irq_ptr;
3147 unsigned long saveflags;
3148 int result, result2;
3149 struct ccw_device *cdev;
3150 char dbf_text[20];
3151
3152 cdev=init_data->cdev;
3153 irq_ptr = cdev->private->qdio_data;
3154 if (!irq_ptr)
3155 return -EINVAL;
3156
3157 if (cdev->private->state != DEV_STATE_ONLINE)
3158 return -EINVAL;
3159
3160 down(&irq_ptr->setting_up_sema);
3161
3162 qdio_fill_irq(init_data);
3163
3164 /* the thinint CHSC stuff */
3165 if (irq_ptr->is_thinint_irq) {
3166
3167 result = tiqdio_set_subchannel_ind(irq_ptr,0);
3168 if (result) {
3169 up(&irq_ptr->setting_up_sema);
3170 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3171 return result;
3172 }
3173 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
3174 }
3175
3176 sprintf(dbf_text,"qest%4x",cdev->private->schid.sch_no);
3177 QDIO_DBF_TEXT0(0,setup,dbf_text);
3178 QDIO_DBF_TEXT0(0,trace,dbf_text);
3179
3180 /* establish q */
3181 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
3182 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3183 irq_ptr->ccw.count=irq_ptr->equeue.count;
3184 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
3185
3186 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3187
3188 ccw_device_set_options_mask(cdev, 0);
3189 result = ccw_device_start(cdev, &irq_ptr->ccw,
3190 QDIO_DOING_ESTABLISH, 0, 0);
3191 if (result) {
3192 result2 = ccw_device_start(cdev, &irq_ptr->ccw,
3193 QDIO_DOING_ESTABLISH, 0, 0);
3194 sprintf(dbf_text,"eq:io%4x",result);
3195 QDIO_DBF_TEXT2(1,setup,dbf_text);
3196 if (result2) {
3197 sprintf(dbf_text,"eq:io%4x",result);
3198 QDIO_DBF_TEXT2(1,setup,dbf_text);
3199 }
3200 QDIO_PRINT_WARN("establish queues on irq 0.%x.%04x: do_IO " \
3201 "returned %i, next try returned %i\n",
3202 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3203 result, result2);
3204 result=result2;
3205 if (result)
3206 ccw_device_set_timeout(cdev, 0);
3207 }
3208
3209 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3210
3211 if (result) {
3212 up(&irq_ptr->setting_up_sema);
3213 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
3214 return result;
3215 }
3216
3217 wait_event_interruptible_timeout(cdev->private->wait_q,
3218 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
3219 irq_ptr->state == QDIO_IRQ_STATE_ERR,
3220 QDIO_ESTABLISH_TIMEOUT);
3221
3222 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
3223 result = 0;
3224 else {
3225 up(&irq_ptr->setting_up_sema);
3226 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3227 return -EIO;
3228 }
3229
3230 qdio_get_ssqd_information(irq_ptr);
3231 /* if this gets set once, we're running under VM and can omit SVSes */
3232 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
3233 omit_svs=1;
3234
3235 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
3236 QDIO_DBF_TEXT2(0,setup,dbf_text);
3237
3238 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
3239 QDIO_DBF_TEXT2(0,setup,dbf_text);
3240
3241 irq_ptr->hydra_gives_outbound_pcis=
3242 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
3243 irq_ptr->sync_done_on_outb_pcis=
3244 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
3245
3246 qdio_initialize_set_siga_flags_input(irq_ptr);
3247 qdio_initialize_set_siga_flags_output(irq_ptr);
3248
3249 up(&irq_ptr->setting_up_sema);
3250
3251 return result;
3252
3253 }
3254
3255 int
3256 qdio_activate(struct ccw_device *cdev, int flags)
3257 {
3258 struct qdio_irq *irq_ptr;
3259 int i,result=0,result2;
3260 unsigned long saveflags;
3261 char dbf_text[20]; /* see qdio_initialize */
3262
3263 irq_ptr = cdev->private->qdio_data;
3264 if (!irq_ptr)
3265 return -ENODEV;
3266
3267 if (cdev->private->state != DEV_STATE_ONLINE)
3268 return -EINVAL;
3269
3270 down(&irq_ptr->setting_up_sema);
3271 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
3272 result=-EBUSY;
3273 goto out;
3274 }
3275
3276 sprintf(dbf_text,"qact%4x", irq_ptr->schid.sch_no);
3277 QDIO_DBF_TEXT2(0,setup,dbf_text);
3278 QDIO_DBF_TEXT2(0,trace,dbf_text);
3279
3280 /* activate q */
3281 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
3282 irq_ptr->ccw.flags=CCW_FLAG_SLI;
3283 irq_ptr->ccw.count=irq_ptr->aqueue.count;
3284 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
3285
3286 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
3287
3288 ccw_device_set_timeout(cdev, 0);
3289 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
3290 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
3291 0, DOIO_DENY_PREFETCH);
3292 if (result) {
3293 result2=ccw_device_start(cdev,&irq_ptr->ccw,
3294 QDIO_DOING_ACTIVATE,0,0);
3295 sprintf(dbf_text,"aq:io%4x",result);
3296 QDIO_DBF_TEXT2(1,setup,dbf_text);
3297 if (result2) {
3298 sprintf(dbf_text,"aq:io%4x",result);
3299 QDIO_DBF_TEXT2(1,setup,dbf_text);
3300 }
3301 QDIO_PRINT_WARN("activate queues on irq 0.%x.%04x: do_IO " \
3302 "returned %i, next try returned %i\n",
3303 irq_ptr->schid.ssid, irq_ptr->schid.sch_no,
3304 result, result2);
3305 result=result2;
3306 }
3307
3308 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
3309 if (result)
3310 goto out;
3311
3312 for (i=0;i<irq_ptr->no_input_qs;i++) {
3313 if (irq_ptr->is_thinint_irq) {
3314 /*
3315 * that way we know, that, if we will get interrupted
3316 * by tiqdio_inbound_processing, qdio_unmark_q will
3317 * not be called
3318 */
3319 qdio_reserve_q(irq_ptr->input_qs[i]);
3320 qdio_mark_tiq(irq_ptr->input_qs[i]);
3321 qdio_release_q(irq_ptr->input_qs[i]);
3322 }
3323 }
3324
3325 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
3326 for (i=0;i<irq_ptr->no_input_qs;i++) {
3327 irq_ptr->input_qs[i]->is_input_q|=
3328 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
3329 }
3330 }
3331
3332 msleep(QDIO_ACTIVATE_TIMEOUT);
3333 switch (irq_ptr->state) {
3334 case QDIO_IRQ_STATE_STOPPED:
3335 case QDIO_IRQ_STATE_ERR:
3336 up(&irq_ptr->setting_up_sema);
3337 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3338 down(&irq_ptr->setting_up_sema);
3339 result = -EIO;
3340 break;
3341 default:
3342 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3343 result = 0;
3344 }
3345 out:
3346 up(&irq_ptr->setting_up_sema);
3347
3348 return result;
3349 }
3350
3351 /* buffers filled forwards again to make Rick happy */
3352 static void
3353 qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3354 unsigned int count, struct qdio_buffer *buffers)
3355 {
3356 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3357 int tmp = 0;
3358
3359 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3360 if (irq->is_qebsm) {
3361 while (count) {
3362 tmp = set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3363 if (!tmp)
3364 return;
3365 }
3366 return;
3367 }
3368 for (;;) {
3369 set_slsb(q, &qidx, SLSB_CU_INPUT_EMPTY, &count);
3370 count--;
3371 if (!count) break;
3372 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3373 }
3374 }
3375
3376 static void
3377 qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3378 unsigned int count, struct qdio_buffer *buffers)
3379 {
3380 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3381 int tmp = 0;
3382
3383 qidx &= (QDIO_MAX_BUFFERS_PER_Q - 1);
3384 if (irq->is_qebsm) {
3385 while (count) {
3386 tmp = set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3387 if (!tmp)
3388 return;
3389 }
3390 return;
3391 }
3392
3393 for (;;) {
3394 set_slsb(q, &qidx, SLSB_CU_OUTPUT_PRIMED, &count);
3395 count--;
3396 if (!count) break;
3397 qidx = (qidx + 1) & (QDIO_MAX_BUFFERS_PER_Q - 1);
3398 }
3399 }
3400
3401 static void
3402 do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3403 unsigned int qidx, unsigned int count,
3404 struct qdio_buffer *buffers)
3405 {
3406 int used_elements;
3407
3408 /* This is the inbound handling of queues */
3409 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3410
3411 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3412
3413 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3414 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
3415 atomic_xchg(&q->polling,0);
3416
3417 if (used_elements)
3418 return;
3419 if (callflags&QDIO_FLAG_DONT_SIGA)
3420 return;
3421 if (q->siga_in) {
3422 int result;
3423
3424 result=qdio_siga_input(q);
3425 if (result) {
3426 if (q->siga_error)
3427 q->error_status_flags|=
3428 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3429 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3430 q->siga_error=result;
3431 }
3432 }
3433
3434 qdio_mark_q(q);
3435 }
3436
3437 static void
3438 do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3439 unsigned int qidx, unsigned int count,
3440 struct qdio_buffer *buffers)
3441 {
3442 int used_elements;
3443 unsigned int cnt, start_buf;
3444 unsigned char state = 0;
3445 struct qdio_irq *irq = (struct qdio_irq *) q->irq_ptr;
3446
3447 /* This is the outbound handling of queues */
3448 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3449
3450 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3451
3452 if (callflags&QDIO_FLAG_DONT_SIGA) {
3453 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3454 return;
3455 }
3456 if (callflags & QDIO_FLAG_PCI_OUT)
3457 q->is_pci_out = 1;
3458 else
3459 q->is_pci_out = 0;
3460 if (q->is_iqdio_q) {
3461 /* one siga for every sbal */
3462 while (count--)
3463 qdio_kick_outbound_q(q);
3464
3465 __qdio_outbound_processing(q);
3466 } else {
3467 /* under VM, we do a SIGA sync unconditionally */
3468 SYNC_MEMORY;
3469 else {
3470 /*
3471 * w/o shadow queues (else branch of
3472 * SYNC_MEMORY :-/ ), we try to
3473 * fast-requeue buffers
3474 */
3475 if (irq->is_qebsm) {
3476 cnt = 1;
3477 start_buf = ((qidx+QDIO_MAX_BUFFERS_PER_Q-1) &
3478 (QDIO_MAX_BUFFERS_PER_Q-1));
3479 qdio_do_eqbs(q, &state, &start_buf, &cnt);
3480 } else
3481 state = q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3482 &(QDIO_MAX_BUFFERS_PER_Q-1) ];
3483 if (state != SLSB_CU_OUTPUT_PRIMED) {
3484 qdio_kick_outbound_q(q);
3485 } else {
3486 QDIO_DBF_TEXT3(0,trace, "fast-req");
3487 qdio_perf_stat_inc(&perf_stats.fast_reqs);
3488 }
3489 }
3490 /*
3491 * only marking the q could take too long,
3492 * the upper layer module could do a lot of
3493 * traffic in that time
3494 */
3495 __qdio_outbound_processing(q);
3496 }
3497
3498 qdio_perf_stat_inc(&perf_stats.outbound_cnt);
3499 }
3500
3501 /* count must be 1 in iqdio */
3502 int
3503 do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3504 unsigned int queue_number, unsigned int qidx,
3505 unsigned int count,struct qdio_buffer *buffers)
3506 {
3507 struct qdio_irq *irq_ptr;
3508 #ifdef CONFIG_QDIO_DEBUG
3509 char dbf_text[20];
3510
3511 sprintf(dbf_text,"doQD%04x",cdev->private->schid.sch_no);
3512 QDIO_DBF_TEXT3(0,trace,dbf_text);
3513 #endif /* CONFIG_QDIO_DEBUG */
3514
3515 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3516 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3517 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3518 return -EINVAL;
3519
3520 if (count==0)
3521 return 0;
3522
3523 irq_ptr = cdev->private->qdio_data;
3524 if (!irq_ptr)
3525 return -ENODEV;
3526
3527 #ifdef CONFIG_QDIO_DEBUG
3528 if (callflags&QDIO_FLAG_SYNC_INPUT)
3529 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3530 sizeof(void*));
3531 else
3532 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3533 sizeof(void*));
3534 sprintf(dbf_text,"flag%04x",callflags);
3535 QDIO_DBF_TEXT3(0,trace,dbf_text);
3536 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3537 QDIO_DBF_TEXT3(0,trace,dbf_text);
3538 #endif /* CONFIG_QDIO_DEBUG */
3539
3540 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3541 return -EBUSY;
3542
3543 if (callflags&QDIO_FLAG_SYNC_INPUT)
3544 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3545 callflags, qidx, count, buffers);
3546 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3547 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3548 callflags, qidx, count, buffers);
3549 else {
3550 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3551 return -EINVAL;
3552 }
3553 return 0;
3554 }
3555
3556 static int
3557 qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3558 int buffer_length, int *eof, void *data)
3559 {
3560 int c=0;
3561
3562 /* we are always called with buffer_length=4k, so we all
3563 deliver on the first read */
3564 if (offset>0)
3565 return 0;
3566
3567 #define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
3568 #ifdef CONFIG_64BIT
3569 _OUTP_IT("Number of tasklet runs (total) : %li\n",
3570 (long)atomic64_read(&perf_stats.tl_runs));
3571 _OUTP_IT("Inbound tasklet runs tried/retried : %li/%li\n",
3572 (long)atomic64_read(&perf_stats.inbound_tl_runs),
3573 (long)atomic64_read(&perf_stats.inbound_tl_runs_resched));
3574 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %li/%li\n",
3575 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs),
3576 (long)atomic64_read(&perf_stats.inbound_thin_tl_runs_resched));
3577 _OUTP_IT("Outbound tasklet runs tried/retried : %li/%li\n",
3578 (long)atomic64_read(&perf_stats.outbound_tl_runs),
3579 (long)atomic64_read(&perf_stats.outbound_tl_runs_resched));
3580 _OUTP_IT("\n");
3581 _OUTP_IT("Number of SIGA sync's issued : %li\n",
3582 (long)atomic64_read(&perf_stats.siga_syncs));
3583 _OUTP_IT("Number of SIGA in's issued : %li\n",
3584 (long)atomic64_read(&perf_stats.siga_ins));
3585 _OUTP_IT("Number of SIGA out's issued : %li\n",
3586 (long)atomic64_read(&perf_stats.siga_outs));
3587 _OUTP_IT("Number of PCIs caught : %li\n",
3588 (long)atomic64_read(&perf_stats.pcis));
3589 _OUTP_IT("Number of adapter interrupts caught : %li\n",
3590 (long)atomic64_read(&perf_stats.thinints));
3591 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %li\n",
3592 (long)atomic64_read(&perf_stats.fast_reqs));
3593 _OUTP_IT("\n");
3594 _OUTP_IT("Number of inbound transfers : %li\n",
3595 (long)atomic64_read(&perf_stats.inbound_cnt));
3596 _OUTP_IT("Number of do_QDIOs outbound : %li\n",
3597 (long)atomic64_read(&perf_stats.outbound_cnt));
3598 #else /* CONFIG_64BIT */
3599 _OUTP_IT("Number of tasklet runs (total) : %i\n",
3600 atomic_read(&perf_stats.tl_runs));
3601 _OUTP_IT("Inbound tasklet runs tried/retried : %i/%i\n",
3602 atomic_read(&perf_stats.inbound_tl_runs),
3603 atomic_read(&perf_stats.inbound_tl_runs_resched));
3604 _OUTP_IT("Inbound-thin tasklet runs tried/retried : %i/%i\n",
3605 atomic_read(&perf_stats.inbound_thin_tl_runs),
3606 atomic_read(&perf_stats.inbound_thin_tl_runs_resched));
3607 _OUTP_IT("Outbound tasklet runs tried/retried : %i/%i\n",
3608 atomic_read(&perf_stats.outbound_tl_runs),
3609 atomic_read(&perf_stats.outbound_tl_runs_resched));
3610 _OUTP_IT("\n");
3611 _OUTP_IT("Number of SIGA sync's issued : %i\n",
3612 atomic_read(&perf_stats.siga_syncs));
3613 _OUTP_IT("Number of SIGA in's issued : %i\n",
3614 atomic_read(&perf_stats.siga_ins));
3615 _OUTP_IT("Number of SIGA out's issued : %i\n",
3616 atomic_read(&perf_stats.siga_outs));
3617 _OUTP_IT("Number of PCIs caught : %i\n",
3618 atomic_read(&perf_stats.pcis));
3619 _OUTP_IT("Number of adapter interrupts caught : %i\n",
3620 atomic_read(&perf_stats.thinints));
3621 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %i\n",
3622 atomic_read(&perf_stats.fast_reqs));
3623 _OUTP_IT("\n");
3624 _OUTP_IT("Number of inbound transfers : %i\n",
3625 atomic_read(&perf_stats.inbound_cnt));
3626 _OUTP_IT("Number of do_QDIOs outbound : %i\n",
3627 atomic_read(&perf_stats.outbound_cnt));
3628 #endif /* CONFIG_64BIT */
3629 _OUTP_IT("\n");
3630
3631 return c;
3632 }
3633
3634 static struct proc_dir_entry *qdio_perf_proc_file;
3635
3636 static void
3637 qdio_add_procfs_entry(void)
3638 {
3639 proc_perf_file_registration=0;
3640 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
3641 S_IFREG|0444,&proc_root);
3642 if (qdio_perf_proc_file) {
3643 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3644 } else proc_perf_file_registration=-1;
3645
3646 if (proc_perf_file_registration)
3647 QDIO_PRINT_WARN("was not able to register perf. " \
3648 "proc-file (%i).\n",
3649 proc_perf_file_registration);
3650 }
3651
3652 static void
3653 qdio_remove_procfs_entry(void)
3654 {
3655 if (!proc_perf_file_registration) /* means if it went ok earlier */
3656 remove_proc_entry(QDIO_PERF,&proc_root);
3657 }
3658
3659 /**
3660 * attributes in sysfs
3661 *****************************************************************************/
3662
3663 static ssize_t
3664 qdio_performance_stats_show(struct bus_type *bus, char *buf)
3665 {
3666 return sprintf(buf, "%i\n", qdio_performance_stats ? 1 : 0);
3667 }
3668
3669 static ssize_t
3670 qdio_performance_stats_store(struct bus_type *bus, const char *buf, size_t count)
3671 {
3672 char *tmp;
3673 int i;
3674
3675 i = simple_strtoul(buf, &tmp, 16);
3676 if ((i == 0) || (i == 1)) {
3677 if (i == qdio_performance_stats)
3678 return count;
3679 qdio_performance_stats = i;
3680 if (i==0) {
3681 /* reset perf. stat. info */
3682 #ifdef CONFIG_64BIT
3683 atomic64_set(&perf_stats.tl_runs, 0);
3684 atomic64_set(&perf_stats.outbound_tl_runs, 0);
3685 atomic64_set(&perf_stats.inbound_tl_runs, 0);
3686 atomic64_set(&perf_stats.inbound_tl_runs_resched, 0);
3687 atomic64_set(&perf_stats.inbound_thin_tl_runs, 0);
3688 atomic64_set(&perf_stats.inbound_thin_tl_runs_resched,
3689 0);
3690 atomic64_set(&perf_stats.siga_outs, 0);
3691 atomic64_set(&perf_stats.siga_ins, 0);
3692 atomic64_set(&perf_stats.siga_syncs, 0);
3693 atomic64_set(&perf_stats.pcis, 0);
3694 atomic64_set(&perf_stats.thinints, 0);
3695 atomic64_set(&perf_stats.fast_reqs, 0);
3696 atomic64_set(&perf_stats.outbound_cnt, 0);
3697 atomic64_set(&perf_stats.inbound_cnt, 0);
3698 #else /* CONFIG_64BIT */
3699 atomic_set(&perf_stats.tl_runs, 0);
3700 atomic_set(&perf_stats.outbound_tl_runs, 0);
3701 atomic_set(&perf_stats.inbound_tl_runs, 0);
3702 atomic_set(&perf_stats.inbound_tl_runs_resched, 0);
3703 atomic_set(&perf_stats.inbound_thin_tl_runs, 0);
3704 atomic_set(&perf_stats.inbound_thin_tl_runs_resched, 0);
3705 atomic_set(&perf_stats.siga_outs, 0);
3706 atomic_set(&perf_stats.siga_ins, 0);
3707 atomic_set(&perf_stats.siga_syncs, 0);
3708 atomic_set(&perf_stats.pcis, 0);
3709 atomic_set(&perf_stats.thinints, 0);
3710 atomic_set(&perf_stats.fast_reqs, 0);
3711 atomic_set(&perf_stats.outbound_cnt, 0);
3712 atomic_set(&perf_stats.inbound_cnt, 0);
3713 #endif /* CONFIG_64BIT */
3714 }
3715 } else {
3716 QDIO_PRINT_ERR("QDIO performance_stats: write 0 or 1 to this file!\n");
3717 return -EINVAL;
3718 }
3719 return count;
3720 }
3721
3722 static BUS_ATTR(qdio_performance_stats, 0644, qdio_performance_stats_show,
3723 qdio_performance_stats_store);
3724
3725 static void
3726 tiqdio_register_thinints(void)
3727 {
3728 char dbf_text[20];
3729
3730 tiqdio_ind =
3731 s390_register_adapter_interrupt(&tiqdio_thinint_handler, NULL);
3732 if (IS_ERR(tiqdio_ind)) {
3733 sprintf(dbf_text, "regthn%lx", PTR_ERR(tiqdio_ind));
3734 QDIO_DBF_TEXT0(0,setup,dbf_text);
3735 QDIO_PRINT_ERR("failed to register adapter handler " \
3736 "(rc=%li).\nAdapter interrupts might " \
3737 "not work. Continuing.\n",
3738 PTR_ERR(tiqdio_ind));
3739 tiqdio_ind = NULL;
3740 }
3741 }
3742
3743 static void
3744 tiqdio_unregister_thinints(void)
3745 {
3746 if (tiqdio_ind)
3747 s390_unregister_adapter_interrupt(tiqdio_ind);
3748 }
3749
3750 static int
3751 qdio_get_qdio_memory(void)
3752 {
3753 int i;
3754 indicator_used[0]=1;
3755
3756 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3757 indicator_used[i]=0;
3758 indicators = kzalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
3759 GFP_KERNEL);
3760 if (!indicators)
3761 return -ENOMEM;
3762 return 0;
3763 }
3764
3765 static void
3766 qdio_release_qdio_memory(void)
3767 {
3768 kfree(indicators);
3769 }
3770
3771 static void
3772 qdio_unregister_dbf_views(void)
3773 {
3774 if (qdio_dbf_setup)
3775 debug_unregister(qdio_dbf_setup);
3776 if (qdio_dbf_sbal)
3777 debug_unregister(qdio_dbf_sbal);
3778 if (qdio_dbf_sense)
3779 debug_unregister(qdio_dbf_sense);
3780 if (qdio_dbf_trace)
3781 debug_unregister(qdio_dbf_trace);
3782 #ifdef CONFIG_QDIO_DEBUG
3783 if (qdio_dbf_slsb_out)
3784 debug_unregister(qdio_dbf_slsb_out);
3785 if (qdio_dbf_slsb_in)
3786 debug_unregister(qdio_dbf_slsb_in);
3787 #endif /* CONFIG_QDIO_DEBUG */
3788 }
3789
3790 static int
3791 qdio_register_dbf_views(void)
3792 {
3793 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
3794 QDIO_DBF_SETUP_PAGES,
3795 QDIO_DBF_SETUP_NR_AREAS,
3796 QDIO_DBF_SETUP_LEN);
3797 if (!qdio_dbf_setup)
3798 goto oom;
3799 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3800 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3801
3802 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
3803 QDIO_DBF_SBAL_PAGES,
3804 QDIO_DBF_SBAL_NR_AREAS,
3805 QDIO_DBF_SBAL_LEN);
3806 if (!qdio_dbf_sbal)
3807 goto oom;
3808
3809 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3810 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3811
3812 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
3813 QDIO_DBF_SENSE_PAGES,
3814 QDIO_DBF_SENSE_NR_AREAS,
3815 QDIO_DBF_SENSE_LEN);
3816 if (!qdio_dbf_sense)
3817 goto oom;
3818
3819 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3820 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3821
3822 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
3823 QDIO_DBF_TRACE_PAGES,
3824 QDIO_DBF_TRACE_NR_AREAS,
3825 QDIO_DBF_TRACE_LEN);
3826 if (!qdio_dbf_trace)
3827 goto oom;
3828
3829 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3830 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3831
3832 #ifdef CONFIG_QDIO_DEBUG
3833 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
3834 QDIO_DBF_SLSB_OUT_PAGES,
3835 QDIO_DBF_SLSB_OUT_NR_AREAS,
3836 QDIO_DBF_SLSB_OUT_LEN);
3837 if (!qdio_dbf_slsb_out)
3838 goto oom;
3839 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3840 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3841
3842 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
3843 QDIO_DBF_SLSB_IN_PAGES,
3844 QDIO_DBF_SLSB_IN_NR_AREAS,
3845 QDIO_DBF_SLSB_IN_LEN);
3846 if (!qdio_dbf_slsb_in)
3847 goto oom;
3848 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3849 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3850 #endif /* CONFIG_QDIO_DEBUG */
3851 return 0;
3852 oom:
3853 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3854 qdio_unregister_dbf_views();
3855 return -ENOMEM;
3856 }
3857
3858 static void *qdio_mempool_alloc(gfp_t gfp_mask, void *size)
3859 {
3860 return (void *) get_zeroed_page(gfp_mask|GFP_DMA);
3861 }
3862
3863 static void qdio_mempool_free(void *element, void *size)
3864 {
3865 free_page((unsigned long) element);
3866 }
3867
3868 static int __init
3869 init_QDIO(void)
3870 {
3871 int res;
3872 void *ptr;
3873
3874 printk("qdio: loading %s\n",version);
3875
3876 res=qdio_get_qdio_memory();
3877 if (res)
3878 return res;
3879
3880 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
3881 256, 0, NULL);
3882 if (!qdio_q_cache) {
3883 qdio_release_qdio_memory();
3884 return -ENOMEM;
3885 }
3886
3887 res = qdio_register_dbf_views();
3888 if (res) {
3889 kmem_cache_destroy(qdio_q_cache);
3890 qdio_release_qdio_memory();
3891 return res;
3892 }
3893
3894 QDIO_DBF_TEXT0(0,setup,"initQDIO");
3895 res = bus_create_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3896
3897 memset((void*)&perf_stats,0,sizeof(perf_stats));
3898 QDIO_DBF_TEXT0(0,setup,"perfstat");
3899 ptr=&perf_stats;
3900 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
3901
3902 qdio_add_procfs_entry();
3903
3904 qdio_mempool_scssc = mempool_create(QDIO_MEMPOOL_SCSSC_ELEMENTS,
3905 qdio_mempool_alloc,
3906 qdio_mempool_free, NULL);
3907
3908 if (tiqdio_check_chsc_availability())
3909 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3910
3911 tiqdio_register_thinints();
3912
3913 return 0;
3914 }
3915
3916 static void __exit
3917 cleanup_QDIO(void)
3918 {
3919 tiqdio_unregister_thinints();
3920 qdio_remove_procfs_entry();
3921 qdio_release_qdio_memory();
3922 qdio_unregister_dbf_views();
3923 mempool_destroy(qdio_mempool_scssc);
3924 kmem_cache_destroy(qdio_q_cache);
3925 bus_remove_file(&ccw_bus_type, &bus_attr_qdio_performance_stats);
3926 printk("qdio: %s: module removed\n",version);
3927 }
3928
3929 module_init(init_QDIO);
3930 module_exit(cleanup_QDIO);
3931
3932 EXPORT_SYMBOL(qdio_allocate);
3933 EXPORT_SYMBOL(qdio_establish);
3934 EXPORT_SYMBOL(qdio_initialize);
3935 EXPORT_SYMBOL(qdio_activate);
3936 EXPORT_SYMBOL(do_QDIO);
3937 EXPORT_SYMBOL(qdio_shutdown);
3938 EXPORT_SYMBOL(qdio_free);
3939 EXPORT_SYMBOL(qdio_cleanup);
3940 EXPORT_SYMBOL(qdio_synchronize);
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