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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / pci / hotplug / cpqphp.h
blob298ad7f3f4f43aada7d324f97a12d39c082fc37e
1 /*
2 * Compaq Hot Plug Controller Driver
3 *
4 * Copyright (C) 1995,2001 Compaq Computer Corporation
5 * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
6 * Copyright (C) 2001 IBM
7 *
8 * All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
18 * NON INFRINGEMENT. See the GNU General Public License for more
19 * details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Send feedback to <greg@kroah.com>
26 *
27 */
28 #ifndef _CPQPHP_H
29 #define _CPQPHP_H
30
31 #include <linux/interrupt.h>
32 #include <asm/io.h> /* for read? and write? functions */
33 #include <linux/delay.h> /* for delays */
34 #include <linux/mutex.h>
35
36 #define MY_NAME "cpqphp"
37
38 #define dbg(fmt, arg...) do { if (cpqhp_debug) printk(KERN_DEBUG "%s: " fmt , MY_NAME , ## arg); } while (0)
39 #define err(format, arg...) printk(KERN_ERR "%s: " format , MY_NAME , ## arg)
40 #define info(format, arg...) printk(KERN_INFO "%s: " format , MY_NAME , ## arg)
41 #define warn(format, arg...) printk(KERN_WARNING "%s: " format , MY_NAME , ## arg)
42
43
44
45 struct smbios_system_slot {
46 u8 type;
47 u8 length;
48 u16 handle;
49 u8 name_string_num;
50 u8 slot_type;
51 u8 slot_width;
52 u8 slot_current_usage;
53 u8 slot_length;
54 u16 slot_number;
55 u8 properties1;
56 u8 properties2;
57 } __attribute__ ((packed));
58
59 /* offsets to the smbios generic type based on the above structure layout */
60 enum smbios_system_slot_offsets {
61 SMBIOS_SLOT_GENERIC_TYPE = offsetof(struct smbios_system_slot, type),
62 SMBIOS_SLOT_GENERIC_LENGTH = offsetof(struct smbios_system_slot, length),
63 SMBIOS_SLOT_GENERIC_HANDLE = offsetof(struct smbios_system_slot, handle),
64 SMBIOS_SLOT_NAME_STRING_NUM = offsetof(struct smbios_system_slot, name_string_num),
65 SMBIOS_SLOT_TYPE = offsetof(struct smbios_system_slot, slot_type),
66 SMBIOS_SLOT_WIDTH = offsetof(struct smbios_system_slot, slot_width),
67 SMBIOS_SLOT_CURRENT_USAGE = offsetof(struct smbios_system_slot, slot_current_usage),
68 SMBIOS_SLOT_LENGTH = offsetof(struct smbios_system_slot, slot_length),
69 SMBIOS_SLOT_NUMBER = offsetof(struct smbios_system_slot, slot_number),
70 SMBIOS_SLOT_PROPERTIES1 = offsetof(struct smbios_system_slot, properties1),
71 SMBIOS_SLOT_PROPERTIES2 = offsetof(struct smbios_system_slot, properties2),
72 };
73
74 struct smbios_generic {
75 u8 type;
76 u8 length;
77 u16 handle;
78 } __attribute__ ((packed));
79
80 /* offsets to the smbios generic type based on the above structure layout */
81 enum smbios_generic_offsets {
82 SMBIOS_GENERIC_TYPE = offsetof(struct smbios_generic, type),
83 SMBIOS_GENERIC_LENGTH = offsetof(struct smbios_generic, length),
84 SMBIOS_GENERIC_HANDLE = offsetof(struct smbios_generic, handle),
85 };
86
87 struct smbios_entry_point {
88 char anchor[4];
89 u8 ep_checksum;
90 u8 ep_length;
91 u8 major_version;
92 u8 minor_version;
93 u16 max_size_entry;
94 u8 ep_rev;
95 u8 reserved[5];
96 char int_anchor[5];
97 u8 int_checksum;
98 u16 st_length;
99 u32 st_address;
100 u16 number_of_entrys;
101 u8 bcd_rev;
102 } __attribute__ ((packed));
103
104 /* offsets to the smbios entry point based on the above structure layout */
105 enum smbios_entry_point_offsets {
106 ANCHOR = offsetof(struct smbios_entry_point, anchor[0]),
107 EP_CHECKSUM = offsetof(struct smbios_entry_point, ep_checksum),
108 EP_LENGTH = offsetof(struct smbios_entry_point, ep_length),
109 MAJOR_VERSION = offsetof(struct smbios_entry_point, major_version),
110 MINOR_VERSION = offsetof(struct smbios_entry_point, minor_version),
111 MAX_SIZE_ENTRY = offsetof(struct smbios_entry_point, max_size_entry),
112 EP_REV = offsetof(struct smbios_entry_point, ep_rev),
113 INT_ANCHOR = offsetof(struct smbios_entry_point, int_anchor[0]),
114 INT_CHECKSUM = offsetof(struct smbios_entry_point, int_checksum),
115 ST_LENGTH = offsetof(struct smbios_entry_point, st_length),
116 ST_ADDRESS = offsetof(struct smbios_entry_point, st_address),
117 NUMBER_OF_ENTRYS = offsetof(struct smbios_entry_point, number_of_entrys),
118 BCD_REV = offsetof(struct smbios_entry_point, bcd_rev),
119 };
120
121 struct ctrl_reg { /* offset */
122 u8 slot_RST; /* 0x00 */
123 u8 slot_enable; /* 0x01 */
124 u16 misc; /* 0x02 */
125 u32 led_control; /* 0x04 */
126 u32 int_input_clear; /* 0x08 */
127 u32 int_mask; /* 0x0a */
128 u8 reserved0; /* 0x10 */
129 u8 reserved1; /* 0x11 */
130 u8 reserved2; /* 0x12 */
131 u8 gen_output_AB; /* 0x13 */
132 u32 non_int_input; /* 0x14 */
133 u32 reserved3; /* 0x18 */
134 u32 reserved4; /* 0x1a */
135 u32 reserved5; /* 0x20 */
136 u8 reserved6; /* 0x24 */
137 u8 reserved7; /* 0x25 */
138 u16 reserved8; /* 0x26 */
139 u8 slot_mask; /* 0x28 */
140 u8 reserved9; /* 0x29 */
141 u8 reserved10; /* 0x2a */
142 u8 reserved11; /* 0x2b */
143 u8 slot_SERR; /* 0x2c */
144 u8 slot_power; /* 0x2d */
145 u8 reserved12; /* 0x2e */
146 u8 reserved13; /* 0x2f */
147 u8 next_curr_freq; /* 0x30 */
148 u8 reset_freq_mode; /* 0x31 */
149 } __attribute__ ((packed));
150
151 /* offsets to the controller registers based on the above structure layout */
152 enum ctrl_offsets {
153 SLOT_RST = offsetof(struct ctrl_reg, slot_RST),
154 SLOT_ENABLE = offsetof(struct ctrl_reg, slot_enable),
155 MISC = offsetof(struct ctrl_reg, misc),
156 LED_CONTROL = offsetof(struct ctrl_reg, led_control),
157 INT_INPUT_CLEAR = offsetof(struct ctrl_reg, int_input_clear),
158 INT_MASK = offsetof(struct ctrl_reg, int_mask),
159 CTRL_RESERVED0 = offsetof(struct ctrl_reg, reserved0),
160 CTRL_RESERVED1 = offsetof(struct ctrl_reg, reserved1),
161 CTRL_RESERVED2 = offsetof(struct ctrl_reg, reserved1),
162 GEN_OUTPUT_AB = offsetof(struct ctrl_reg, gen_output_AB),
163 NON_INT_INPUT = offsetof(struct ctrl_reg, non_int_input),
164 CTRL_RESERVED3 = offsetof(struct ctrl_reg, reserved3),
165 CTRL_RESERVED4 = offsetof(struct ctrl_reg, reserved4),
166 CTRL_RESERVED5 = offsetof(struct ctrl_reg, reserved5),
167 CTRL_RESERVED6 = offsetof(struct ctrl_reg, reserved6),
168 CTRL_RESERVED7 = offsetof(struct ctrl_reg, reserved7),
169 CTRL_RESERVED8 = offsetof(struct ctrl_reg, reserved8),
170 SLOT_MASK = offsetof(struct ctrl_reg, slot_mask),
171 CTRL_RESERVED9 = offsetof(struct ctrl_reg, reserved9),
172 CTRL_RESERVED10 = offsetof(struct ctrl_reg, reserved10),
173 CTRL_RESERVED11 = offsetof(struct ctrl_reg, reserved11),
174 SLOT_SERR = offsetof(struct ctrl_reg, slot_SERR),
175 SLOT_POWER = offsetof(struct ctrl_reg, slot_power),
176 NEXT_CURR_FREQ = offsetof(struct ctrl_reg, next_curr_freq),
177 RESET_FREQ_MODE = offsetof(struct ctrl_reg, reset_freq_mode),
178 };
179
180 struct hrt {
181 char sig0;
182 char sig1;
183 char sig2;
184 char sig3;
185 u16 unused_IRQ;
186 u16 PCIIRQ;
187 u8 number_of_entries;
188 u8 revision;
189 u16 reserved1;
190 u32 reserved2;
191 } __attribute__ ((packed));
192
193 /* offsets to the hotplug resource table registers based on the above structure layout */
194 enum hrt_offsets {
195 SIG0 = offsetof(struct hrt, sig0),
196 SIG1 = offsetof(struct hrt, sig1),
197 SIG2 = offsetof(struct hrt, sig2),
198 SIG3 = offsetof(struct hrt, sig3),
199 UNUSED_IRQ = offsetof(struct hrt, unused_IRQ),
200 PCIIRQ = offsetof(struct hrt, PCIIRQ),
201 NUMBER_OF_ENTRIES = offsetof(struct hrt, number_of_entries),
202 REVISION = offsetof(struct hrt, revision),
203 HRT_RESERVED1 = offsetof(struct hrt, reserved1),
204 HRT_RESERVED2 = offsetof(struct hrt, reserved2),
205 };
206
207 struct slot_rt {
208 u8 dev_func;
209 u8 primary_bus;
210 u8 secondary_bus;
211 u8 max_bus;
212 u16 io_base;
213 u16 io_length;
214 u16 mem_base;
215 u16 mem_length;
216 u16 pre_mem_base;
217 u16 pre_mem_length;
218 } __attribute__ ((packed));
219
220 /* offsets to the hotplug slot resource table registers based on the above structure layout */
221 enum slot_rt_offsets {
222 DEV_FUNC = offsetof(struct slot_rt, dev_func),
223 PRIMARY_BUS = offsetof(struct slot_rt, primary_bus),
224 SECONDARY_BUS = offsetof(struct slot_rt, secondary_bus),
225 MAX_BUS = offsetof(struct slot_rt, max_bus),
226 IO_BASE = offsetof(struct slot_rt, io_base),
227 IO_LENGTH = offsetof(struct slot_rt, io_length),
228 MEM_BASE = offsetof(struct slot_rt, mem_base),
229 MEM_LENGTH = offsetof(struct slot_rt, mem_length),
230 PRE_MEM_BASE = offsetof(struct slot_rt, pre_mem_base),
231 PRE_MEM_LENGTH = offsetof(struct slot_rt, pre_mem_length),
232 };
233
234 struct pci_func {
235 struct pci_func *next;
236 u8 bus;
237 u8 device;
238 u8 function;
239 u8 is_a_board;
240 u16 status;
241 u8 configured;
242 u8 switch_save;
243 u8 presence_save;
244 u32 base_length[0x06];
245 u8 base_type[0x06];
246 u16 reserved2;
247 u32 config_space[0x20];
248 struct pci_resource *mem_head;
249 struct pci_resource *p_mem_head;
250 struct pci_resource *io_head;
251 struct pci_resource *bus_head;
252 struct timer_list *p_task_event;
253 struct pci_dev* pci_dev;
254 };
255
256 struct slot {
257 struct slot *next;
258 u8 bus;
259 u8 device;
260 u8 number;
261 u8 is_a_board;
262 u8 configured;
263 u8 state;
264 u8 switch_save;
265 u8 presence_save;
266 u32 capabilities;
267 u16 reserved2;
268 struct timer_list task_event;
269 u8 hp_slot;
270 struct controller *ctrl;
271 void __iomem *p_sm_slot;
272 struct hotplug_slot *hotplug_slot;
273 };
274
275 struct pci_resource {
276 struct pci_resource * next;
277 u32 base;
278 u32 length;
279 };
280
281 struct event_info {
282 u32 event_type;
283 u8 hp_slot;
284 };
285
286 struct controller {
287 struct controller *next;
288 u32 ctrl_int_comp;
289 struct mutex crit_sect; /* critical section mutex */
290 void __iomem *hpc_reg; /* cookie for our pci controller location */
291 struct pci_resource *mem_head;
292 struct pci_resource *p_mem_head;
293 struct pci_resource *io_head;
294 struct pci_resource *bus_head;
295 struct pci_dev *pci_dev;
296 struct pci_bus *pci_bus;
297 struct event_info event_queue[10];
298 struct slot *slot;
299 u8 next_event;
300 u8 interrupt;
301 u8 cfgspc_irq;
302 u8 bus; /* bus number for the pci hotplug controller */
303 u8 rev;
304 u8 slot_device_offset;
305 u8 first_slot;
306 u8 add_support;
307 u8 push_flag;
308 enum pci_bus_speed speed;
309 enum pci_bus_speed speed_capability;
310 u8 push_button; /* 0 = no pushbutton, 1 = pushbutton present */
311 u8 slot_switch_type; /* 0 = no switch, 1 = switch present */
312 u8 defeature_PHP; /* 0 = PHP not supported, 1 = PHP supported */
313 u8 alternate_base_address; /* 0 = not supported, 1 = supported */
314 u8 pci_config_space; /* Index/data access to working registers 0 = not supported, 1 = supported */
315 u8 pcix_speed_capability; /* PCI-X */
316 u8 pcix_support; /* PCI-X */
317 u16 vendor_id;
318 struct work_struct int_task_event;
319 wait_queue_head_t queue; /* sleep & wake process */
320 struct dentry *dentry; /* debugfs dentry */
321 };
322
323 struct irq_mapping {
324 u8 barber_pole;
325 u8 valid_INT;
326 u8 interrupt[4];
327 };
328
329 struct resource_lists {
330 struct pci_resource *mem_head;
331 struct pci_resource *p_mem_head;
332 struct pci_resource *io_head;
333 struct pci_resource *bus_head;
334 struct irq_mapping *irqs;
335 };
336
337 #define ROM_PHY_ADDR 0x0F0000
338 #define ROM_PHY_LEN 0x00ffff
339
340 #define PCI_HPC_ID 0xA0F7
341 #define PCI_SUB_HPC_ID 0xA2F7
342 #define PCI_SUB_HPC_ID2 0xA2F8
343 #define PCI_SUB_HPC_ID3 0xA2F9
344 #define PCI_SUB_HPC_ID_INTC 0xA2FA
345 #define PCI_SUB_HPC_ID4 0xA2FD
346
347 #define INT_BUTTON_IGNORE 0
348 #define INT_PRESENCE_ON 1
349 #define INT_PRESENCE_OFF 2
350 #define INT_SWITCH_CLOSE 3
351 #define INT_SWITCH_OPEN 4
352 #define INT_POWER_FAULT 5
353 #define INT_POWER_FAULT_CLEAR 6
354 #define INT_BUTTON_PRESS 7
355 #define INT_BUTTON_RELEASE 8
356 #define INT_BUTTON_CANCEL 9
357
358 #define STATIC_STATE 0
359 #define BLINKINGON_STATE 1
360 #define BLINKINGOFF_STATE 2
361 #define POWERON_STATE 3
362 #define POWEROFF_STATE 4
363
364 #define PCISLOT_INTERLOCK_CLOSED 0x00000001
365 #define PCISLOT_ADAPTER_PRESENT 0x00000002
366 #define PCISLOT_POWERED 0x00000004
367 #define PCISLOT_66_MHZ_OPERATION 0x00000008
368 #define PCISLOT_64_BIT_OPERATION 0x00000010
369 #define PCISLOT_REPLACE_SUPPORTED 0x00000020
370 #define PCISLOT_ADD_SUPPORTED 0x00000040
371 #define PCISLOT_INTERLOCK_SUPPORTED 0x00000080
372 #define PCISLOT_66_MHZ_SUPPORTED 0x00000100
373 #define PCISLOT_64_BIT_SUPPORTED 0x00000200
374
375 #define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
376
377 #define INTERLOCK_OPEN 0x00000002
378 #define ADD_NOT_SUPPORTED 0x00000003
379 #define CARD_FUNCTIONING 0x00000005
380 #define ADAPTER_NOT_SAME 0x00000006
381 #define NO_ADAPTER_PRESENT 0x00000009
382 #define NOT_ENOUGH_RESOURCES 0x0000000B
383 #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
384 #define POWER_FAILURE 0x0000000E
385
386 #define REMOVE_NOT_SUPPORTED 0x00000003
387
388
389 /*
390 * error Messages
391 */
392 #define msg_initialization_err "Initialization failure, error=%d\n"
393 #define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
394 #define msg_HPC_non_compaq_or_intel "The PCI hot plug controller is not supported by this driver.\n"
395 #define msg_HPC_not_supported "this system is not supported by this version of cpqphpd. Upgrade to a newer version of cpqphpd\n"
396 #define msg_unable_to_save "unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
397 #define msg_button_on "PCI slot #%d - powering on due to button press.\n"
398 #define msg_button_off "PCI slot #%d - powering off due to button press.\n"
399 #define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
400 #define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
401
402
403 /* debugfs functions for the hotplug controller info */
404 extern void cpqhp_initialize_debugfs (void);
405 extern void cpqhp_shutdown_debugfs (void);
406 extern void cpqhp_create_debugfs_files (struct controller *ctrl);
407 extern void cpqhp_remove_debugfs_files (struct controller *ctrl);
408
409 /* controller functions */
410 extern void cpqhp_pushbutton_thread (unsigned long event_pointer);
411 extern irqreturn_t cpqhp_ctrl_intr (int IRQ, void *data);
412 extern int cpqhp_find_available_resources (struct controller *ctrl, void __iomem *rom_start);
413 extern int cpqhp_event_start_thread (void);
414 extern void cpqhp_event_stop_thread (void);
415 extern struct pci_func *cpqhp_slot_create (unsigned char busnumber);
416 extern struct pci_func *cpqhp_slot_find (unsigned char bus, unsigned char device, unsigned char index);
417 extern int cpqhp_process_SI (struct controller *ctrl, struct pci_func *func);
418 extern int cpqhp_process_SS (struct controller *ctrl, struct pci_func *func);
419 extern int cpqhp_hardware_test (struct controller *ctrl, int test_num);
420
421 /* resource functions */
422 extern int cpqhp_resource_sort_and_combine (struct pci_resource **head);
423
424 /* pci functions */
425 extern int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
426 extern int cpqhp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot);
427 extern int cpqhp_save_config (struct controller *ctrl, int busnumber, int is_hot_plug);
428 extern int cpqhp_save_base_addr_length (struct controller *ctrl, struct pci_func * func);
429 extern int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func);
430 extern int cpqhp_configure_board (struct controller *ctrl, struct pci_func * func);
431 extern int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
432 extern int cpqhp_valid_replace (struct controller *ctrl, struct pci_func * func);
433 extern void cpqhp_destroy_board_resources (struct pci_func * func);
434 extern int cpqhp_return_board_resources (struct pci_func * func, struct resource_lists * resources);
435 extern void cpqhp_destroy_resource_list (struct resource_lists * resources);
436 extern int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func);
437 extern int cpqhp_unconfigure_device (struct pci_func* func);
438
439 /* Global variables */
440 extern int cpqhp_debug;
441 extern int cpqhp_legacy_mode;
442 extern struct controller *cpqhp_ctrl_list;
443 extern struct pci_func *cpqhp_slot_list[256];
444
445 /* these can be gotten rid of, but for debugging they are purty */
446 extern u8 cpqhp_nic_irq;
447 extern u8 cpqhp_disk_irq;
448
449
450 /* inline functions */
451
452 /*
453 * return_resource
454 *
455 * Puts node back in the resource list pointed to by head
456 *
457 */
458 static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
459 {
460 if (!node || !head)
461 return;
462 node->next = *head;
463 *head = node;
464 }
465
466 static inline void set_SOGO(struct controller *ctrl)
467 {
468 u16 misc;
469
470 misc = readw(ctrl->hpc_reg + MISC);
471 misc = (misc | 0x0001) & 0xFFFB;
472 writew(misc, ctrl->hpc_reg + MISC);
473 }
474
475
476 static inline void amber_LED_on(struct controller *ctrl, u8 slot)
477 {
478 u32 led_control;
479
480 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
481 led_control |= (0x01010000L << slot);
482 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
483 }
484
485
486 static inline void amber_LED_off(struct controller *ctrl, u8 slot)
487 {
488 u32 led_control;
489
490 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
491 led_control &= ~(0x01010000L << slot);
492 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
493 }
494
495
496 static inline int read_amber_LED(struct controller *ctrl, u8 slot)
497 {
498 u32 led_control;
499
500 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
501 led_control &= (0x01010000L << slot);
502
503 return led_control ? 1 : 0;
504 }
505
506
507 static inline void green_LED_on(struct controller *ctrl, u8 slot)
508 {
509 u32 led_control;
510
511 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
512 led_control |= 0x0101L << slot;
513 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
514 }
515
516 static inline void green_LED_off(struct controller *ctrl, u8 slot)
517 {
518 u32 led_control;
519
520 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
521 led_control &= ~(0x0101L << slot);
522 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
523 }
524
525
526 static inline void green_LED_blink(struct controller *ctrl, u8 slot)
527 {
528 u32 led_control;
529
530 led_control = readl(ctrl->hpc_reg + LED_CONTROL);
531 led_control &= ~(0x0101L << slot);
532 led_control |= (0x0001L << slot);
533 writel(led_control, ctrl->hpc_reg + LED_CONTROL);
534 }
535
536
537 static inline void slot_disable(struct controller *ctrl, u8 slot)
538 {
539 u8 slot_enable;
540
541 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
542 slot_enable &= ~(0x01 << slot);
543 writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
544 }
545
546
547 static inline void slot_enable(struct controller *ctrl, u8 slot)
548 {
549 u8 slot_enable;
550
551 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
552 slot_enable |= (0x01 << slot);
553 writeb(slot_enable, ctrl->hpc_reg + SLOT_ENABLE);
554 }
555
556
557 static inline u8 is_slot_enabled(struct controller *ctrl, u8 slot)
558 {
559 u8 slot_enable;
560
561 slot_enable = readb(ctrl->hpc_reg + SLOT_ENABLE);
562 slot_enable &= (0x01 << slot);
563 return slot_enable ? 1 : 0;
564 }
565
566
567 static inline u8 read_slot_enable(struct controller *ctrl)
568 {
569 return readb(ctrl->hpc_reg + SLOT_ENABLE);
570 }
571
572
573 /*
574 * get_controller_speed - find the current frequency/mode of controller.
575 *
576 * @ctrl: controller to get frequency/mode for.
577 *
578 * Returns controller speed.
579 *
580 */
581 static inline u8 get_controller_speed(struct controller *ctrl)
582 {
583 u8 curr_freq;
584 u16 misc;
585
586 if (ctrl->pcix_support) {
587 curr_freq = readb(ctrl->hpc_reg + NEXT_CURR_FREQ);
588 if ((curr_freq & 0xB0) == 0xB0)
589 return PCI_SPEED_133MHz_PCIX;
590 if ((curr_freq & 0xA0) == 0xA0)
591 return PCI_SPEED_100MHz_PCIX;
592 if ((curr_freq & 0x90) == 0x90)
593 return PCI_SPEED_66MHz_PCIX;
594 if (curr_freq & 0x10)
595 return PCI_SPEED_66MHz;
596
597 return PCI_SPEED_33MHz;
598 }
599
600 misc = readw(ctrl->hpc_reg + MISC);
601 return (misc & 0x0800) ? PCI_SPEED_66MHz : PCI_SPEED_33MHz;
602 }
603
604
605 /*
606 * get_adapter_speed - find the max supported frequency/mode of adapter.
607 *
608 * @ctrl: hotplug controller.
609 * @hp_slot: hotplug slot where adapter is installed.
610 *
611 * Returns adapter speed.
612 *
613 */
614 static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot)
615 {
616 u32 temp_dword = readl(ctrl->hpc_reg + NON_INT_INPUT);
617 dbg("slot: %d, PCIXCAP: %8x\n", hp_slot, temp_dword);
618 if (ctrl->pcix_support) {
619 if (temp_dword & (0x10000 << hp_slot))
620 return PCI_SPEED_133MHz_PCIX;
621 if (temp_dword & (0x100 << hp_slot))
622 return PCI_SPEED_66MHz_PCIX;
623 }
624
625 if (temp_dword & (0x01 << hp_slot))
626 return PCI_SPEED_66MHz;
627
628 return PCI_SPEED_33MHz;
629 }
630
631 static inline void enable_slot_power(struct controller *ctrl, u8 slot)
632 {
633 u8 slot_power;
634
635 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
636 slot_power |= (0x01 << slot);
637 writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
638 }
639
640 static inline void disable_slot_power(struct controller *ctrl, u8 slot)
641 {
642 u8 slot_power;
643
644 slot_power = readb(ctrl->hpc_reg + SLOT_POWER);
645 slot_power &= ~(0x01 << slot);
646 writeb(slot_power, ctrl->hpc_reg + SLOT_POWER);
647 }
648
649
650 static inline int cpq_get_attention_status(struct controller *ctrl, struct slot *slot)
651 {
652 u8 hp_slot;
653
654 hp_slot = slot->device - ctrl->slot_device_offset;
655
656 return read_amber_LED(ctrl, hp_slot);
657 }
658
659
660 static inline int get_slot_enabled(struct controller *ctrl, struct slot *slot)
661 {
662 u8 hp_slot;
663
664 hp_slot = slot->device - ctrl->slot_device_offset;
665
666 return is_slot_enabled(ctrl, hp_slot);
667 }
668
669
670 static inline int cpq_get_latch_status(struct controller *ctrl, struct slot *slot)
671 {
672 u32 status;
673 u8 hp_slot;
674
675 hp_slot = slot->device - ctrl->slot_device_offset;
676 dbg("%s: slot->device = %d, ctrl->slot_device_offset = %d \n",
677 __FUNCTION__, slot->device, ctrl->slot_device_offset);
678
679 status = (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot));
680
681 return(status == 0) ? 1 : 0;
682 }
683
684
685 static inline int get_presence_status(struct controller *ctrl, struct slot *slot)
686 {
687 int presence_save = 0;
688 u8 hp_slot;
689 u32 tempdword;
690
691 hp_slot = slot->device - ctrl->slot_device_offset;
692
693 tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
694 presence_save = (int) ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> hp_slot) & 0x02;
695
696 return presence_save;
697 }
698
699 #define SLOT_NAME_SIZE 10
700
701 static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
702 {
703 snprintf(buffer, buffer_size, "%d", slot->number);
704 }
705
706
707 static inline int wait_for_ctrl_irq(struct controller *ctrl)
708 {
709 DECLARE_WAITQUEUE(wait, current);
710 int retval = 0;
711
712 dbg("%s - start\n", __FUNCTION__);
713 add_wait_queue(&ctrl->queue, &wait);
714 /* Sleep for up to 1 second to wait for the LED to change. */
715 msleep_interruptible(1000);
716 remove_wait_queue(&ctrl->queue, &wait);
717 if (signal_pending(current))
718 retval = -EINTR;
719
720 dbg("%s - end\n", __FUNCTION__);
721 return retval;
722 }
723
724 #endif
725
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