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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / net / wireless / rtl8187_dev.c
blob133b3f39eeb68acc3dd8298279a4955a7b3a7f81
1 /*
2 * Linux device driver for RTL8187
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
24
25 #include "rtl8187.h"
26 #include "rtl8187_rtl8225.h"
27
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187 USB wireless driver");
31 MODULE_LICENSE("GPL");
32
33 static struct usb_device_id rtl8187_table[] __devinitdata = {
34 /* Realtek */
35 {USB_DEVICE(0x0bda, 0x8187)},
36 /* Netgear */
37 {USB_DEVICE(0x0846, 0x6100)},
38 {USB_DEVICE(0x0846, 0x6a00)},
39 /* HP */
40 {USB_DEVICE(0x03f0, 0xca02)},
41 /* Sitecom */
42 {USB_DEVICE(0x0df6, 0x000d)},
43 {}
44 };
45
46 MODULE_DEVICE_TABLE(usb, rtl8187_table);
47
48 static void rtl8187_iowrite_async_cb(struct urb *urb)
49 {
50 kfree(urb->context);
51 usb_free_urb(urb);
52 }
53
54 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
55 void *data, u16 len)
56 {
57 struct usb_ctrlrequest *dr;
58 struct urb *urb;
59 struct rtl8187_async_write_data {
60 u8 data[4];
61 struct usb_ctrlrequest dr;
62 } *buf;
63
64 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
65 if (!buf)
66 return;
67
68 urb = usb_alloc_urb(0, GFP_ATOMIC);
69 if (!urb) {
70 kfree(buf);
71 return;
72 }
73
74 dr = &buf->dr;
75
76 dr->bRequestType = RTL8187_REQT_WRITE;
77 dr->bRequest = RTL8187_REQ_SET_REG;
78 dr->wValue = addr;
79 dr->wIndex = 0;
80 dr->wLength = cpu_to_le16(len);
81
82 memcpy(buf, data, len);
83
84 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
85 (unsigned char *)dr, buf, len,
86 rtl8187_iowrite_async_cb, buf);
87 usb_submit_urb(urb, GFP_ATOMIC);
88 }
89
90 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
91 __le32 *addr, u32 val)
92 {
93 __le32 buf = cpu_to_le32(val);
94
95 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
96 &buf, sizeof(buf));
97 }
98
99 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
100 {
101 struct rtl8187_priv *priv = dev->priv;
102
103 data <<= 8;
104 data |= addr | 0x80;
105
106 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
107 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
108 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
109 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
110
111 msleep(1);
112 }
113
114 static void rtl8187_tx_cb(struct urb *urb)
115 {
116 struct ieee80211_tx_status status;
117 struct sk_buff *skb = (struct sk_buff *)urb->context;
118 struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
119
120 memset(&status, 0, sizeof(status));
121
122 usb_free_urb(info->urb);
123 if (info->control)
124 memcpy(&status.control, info->control, sizeof(status.control));
125 kfree(info->control);
126 skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
127 status.flags |= IEEE80211_TX_STATUS_ACK;
128 ieee80211_tx_status_irqsafe(info->dev, skb, &status);
129 }
130
131 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
132 struct ieee80211_tx_control *control)
133 {
134 struct rtl8187_priv *priv = dev->priv;
135 struct rtl8187_tx_hdr *hdr;
136 struct rtl8187_tx_info *info;
137 struct urb *urb;
138 __le16 rts_dur = 0;
139 u32 flags;
140
141 urb = usb_alloc_urb(0, GFP_ATOMIC);
142 if (!urb) {
143 kfree_skb(skb);
144 return 0;
145 }
146
147 flags = skb->len;
148 flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
149 flags |= control->rts_cts_rate << 19;
150 flags |= control->tx_rate << 24;
151 if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
152 flags |= RTL8187_TX_FLAG_MORE_FRAG;
153 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
154 flags |= RTL8187_TX_FLAG_RTS;
155 rts_dur = ieee80211_rts_duration(dev, priv->vif,
156 skb->len, control);
157 }
158 if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
159 flags |= RTL8187_TX_FLAG_CTS;
160
161 hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
162 hdr->flags = cpu_to_le32(flags);
163 hdr->len = 0;
164 hdr->rts_duration = rts_dur;
165 hdr->retry = cpu_to_le32(control->retry_limit << 8);
166
167 info = (struct rtl8187_tx_info *)skb->cb;
168 info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
169 info->urb = urb;
170 info->dev = dev;
171 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
172 hdr, skb->len, rtl8187_tx_cb, skb);
173 usb_submit_urb(urb, GFP_ATOMIC);
174
175 return 0;
176 }
177
178 static void rtl8187_rx_cb(struct urb *urb)
179 {
180 struct sk_buff *skb = (struct sk_buff *)urb->context;
181 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
182 struct ieee80211_hw *dev = info->dev;
183 struct rtl8187_priv *priv = dev->priv;
184 struct rtl8187_rx_hdr *hdr;
185 struct ieee80211_rx_status rx_status = { 0 };
186 int rate, signal;
187 u32 flags;
188
189 spin_lock(&priv->rx_queue.lock);
190 if (skb->next)
191 __skb_unlink(skb, &priv->rx_queue);
192 else {
193 spin_unlock(&priv->rx_queue.lock);
194 return;
195 }
196 spin_unlock(&priv->rx_queue.lock);
197
198 if (unlikely(urb->status)) {
199 usb_free_urb(urb);
200 dev_kfree_skb_irq(skb);
201 return;
202 }
203
204 skb_put(skb, urb->actual_length);
205 hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
206 flags = le32_to_cpu(hdr->flags);
207 skb_trim(skb, flags & 0x0FFF);
208
209 signal = hdr->agc >> 1;
210 rate = (flags >> 20) & 0xF;
211 if (rate > 3) { /* OFDM rate */
212 if (signal > 90)
213 signal = 90;
214 else if (signal < 25)
215 signal = 25;
216 signal = 90 - signal;
217 } else { /* CCK rate */
218 if (signal > 95)
219 signal = 95;
220 else if (signal < 30)
221 signal = 30;
222 signal = 95 - signal;
223 }
224
225 rx_status.antenna = (hdr->signal >> 7) & 1;
226 rx_status.signal = 64 - min(hdr->noise, (u8)64);
227 rx_status.ssi = signal;
228 rx_status.rate = rate;
229 rx_status.freq = dev->conf.freq;
230 rx_status.channel = dev->conf.channel;
231 rx_status.phymode = dev->conf.phymode;
232 rx_status.mactime = le64_to_cpu(hdr->mac_time);
233 rx_status.flag |= RX_FLAG_TSFT;
234 if (flags & (1 << 13))
235 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
236 ieee80211_rx_irqsafe(dev, skb, &rx_status);
237
238 skb = dev_alloc_skb(RTL8187_MAX_RX);
239 if (unlikely(!skb)) {
240 usb_free_urb(urb);
241 /* TODO check rx queue length and refill *somewhere* */
242 return;
243 }
244
245 info = (struct rtl8187_rx_info *)skb->cb;
246 info->urb = urb;
247 info->dev = dev;
248 urb->transfer_buffer = skb_tail_pointer(skb);
249 urb->context = skb;
250 skb_queue_tail(&priv->rx_queue, skb);
251
252 usb_submit_urb(urb, GFP_ATOMIC);
253 }
254
255 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
256 {
257 struct rtl8187_priv *priv = dev->priv;
258 struct urb *entry;
259 struct sk_buff *skb;
260 struct rtl8187_rx_info *info;
261
262 while (skb_queue_len(&priv->rx_queue) < 8) {
263 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
264 if (!skb)
265 break;
266 entry = usb_alloc_urb(0, GFP_KERNEL);
267 if (!entry) {
268 kfree_skb(skb);
269 break;
270 }
271 usb_fill_bulk_urb(entry, priv->udev,
272 usb_rcvbulkpipe(priv->udev, 1),
273 skb_tail_pointer(skb),
274 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
275 info = (struct rtl8187_rx_info *)skb->cb;
276 info->urb = entry;
277 info->dev = dev;
278 skb_queue_tail(&priv->rx_queue, skb);
279 usb_submit_urb(entry, GFP_KERNEL);
280 }
281
282 return 0;
283 }
284
285 static int rtl8187_init_hw(struct ieee80211_hw *dev)
286 {
287 struct rtl8187_priv *priv = dev->priv;
288 u8 reg;
289 int i;
290
291 /* reset */
292 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
293 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
294 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
295 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
296 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
297 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
298 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
299
300 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
301
302 msleep(200);
303 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
304 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
305 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
306 msleep(200);
307
308 reg = rtl818x_ioread8(priv, &priv->map->CMD);
309 reg &= (1 << 1);
310 reg |= RTL818X_CMD_RESET;
311 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
312
313 i = 10;
314 do {
315 msleep(2);
316 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
317 RTL818X_CMD_RESET))
318 break;
319 } while (--i);
320
321 if (!i) {
322 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
323 return -ETIMEDOUT;
324 }
325
326 /* reload registers from eeprom */
327 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
328
329 i = 10;
330 do {
331 msleep(4);
332 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
333 RTL818X_EEPROM_CMD_CONFIG))
334 break;
335 } while (--i);
336
337 if (!i) {
338 printk(KERN_ERR "%s: eeprom reset timeout!\n",
339 wiphy_name(dev->wiphy));
340 return -ETIMEDOUT;
341 }
342
343 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
344 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
345 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
346 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
347 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
348 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
349 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
350
351 /* setup card */
352 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
353 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
354
355 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
356 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
357 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
358
359 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
360
361 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
362 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
363 reg &= 0x3F;
364 reg |= 0x80;
365 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
366
367 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
368
369 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
370 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
371 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
372
373 // TODO: set RESP_RATE and BRSR properly
374 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
375 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
376
377 /* host_usb_init */
378 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
379 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
380 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
381 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
382 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
383 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
384 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
385 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
386 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
387 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
388 msleep(100);
389
390 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
391 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
392 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
393 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
394 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
395 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
396 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
397 msleep(100);
398
399 priv->rf->init(dev);
400
401 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
402 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
403 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
404 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
405 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
406 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
407 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
408
409 return 0;
410 }
411
412 static int rtl8187_start(struct ieee80211_hw *dev)
413 {
414 struct rtl8187_priv *priv = dev->priv;
415 u32 reg;
416 int ret;
417
418 ret = rtl8187_init_hw(dev);
419 if (ret)
420 return ret;
421
422 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
423
424 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
425 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
426
427 rtl8187_init_urbs(dev);
428
429 reg = RTL818X_RX_CONF_ONLYERLPKT |
430 RTL818X_RX_CONF_RX_AUTORESETPHY |
431 RTL818X_RX_CONF_BSSID |
432 RTL818X_RX_CONF_MGMT |
433 RTL818X_RX_CONF_DATA |
434 (7 << 13 /* RX FIFO threshold NONE */) |
435 (7 << 10 /* MAX RX DMA */) |
436 RTL818X_RX_CONF_BROADCAST |
437 RTL818X_RX_CONF_NICMAC;
438
439 priv->rx_conf = reg;
440 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
441
442 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
443 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
444 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
445 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
446
447 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
448 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
449 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
450 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
451 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
452
453 reg = RTL818X_TX_CONF_CW_MIN |
454 (7 << 21 /* MAX TX DMA */) |
455 RTL818X_TX_CONF_NO_ICV;
456 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
457
458 reg = rtl818x_ioread8(priv, &priv->map->CMD);
459 reg |= RTL818X_CMD_TX_ENABLE;
460 reg |= RTL818X_CMD_RX_ENABLE;
461 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
462
463 return 0;
464 }
465
466 static void rtl8187_stop(struct ieee80211_hw *dev)
467 {
468 struct rtl8187_priv *priv = dev->priv;
469 struct rtl8187_rx_info *info;
470 struct sk_buff *skb;
471 u32 reg;
472
473 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
474
475 reg = rtl818x_ioread8(priv, &priv->map->CMD);
476 reg &= ~RTL818X_CMD_TX_ENABLE;
477 reg &= ~RTL818X_CMD_RX_ENABLE;
478 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
479
480 priv->rf->stop(dev);
481
482 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
483 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
484 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
485 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
486
487 while ((skb = skb_dequeue(&priv->rx_queue))) {
488 info = (struct rtl8187_rx_info *)skb->cb;
489 usb_kill_urb(info->urb);
490 kfree_skb(skb);
491 }
492 return;
493 }
494
495 static int rtl8187_add_interface(struct ieee80211_hw *dev,
496 struct ieee80211_if_init_conf *conf)
497 {
498 struct rtl8187_priv *priv = dev->priv;
499 int i;
500
501 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
502 return -EOPNOTSUPP;
503
504 switch (conf->type) {
505 case IEEE80211_IF_TYPE_STA:
506 priv->mode = conf->type;
507 break;
508 default:
509 return -EOPNOTSUPP;
510 }
511
512 priv->vif = conf->vif;
513
514 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
515 for (i = 0; i < ETH_ALEN; i++)
516 rtl818x_iowrite8(priv, &priv->map->MAC[i],
517 ((u8 *)conf->mac_addr)[i]);
518 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
519
520 return 0;
521 }
522
523 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
524 struct ieee80211_if_init_conf *conf)
525 {
526 struct rtl8187_priv *priv = dev->priv;
527 priv->mode = IEEE80211_IF_TYPE_MNTR;
528 priv->vif = NULL;
529 }
530
531 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
532 {
533 struct rtl8187_priv *priv = dev->priv;
534 u32 reg;
535
536 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
537 /* Enable TX loopback on MAC level to avoid TX during channel
538 * changes, as this has be seen to causes problems and the
539 * card will stop work until next reset
540 */
541 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
542 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
543 msleep(10);
544 priv->rf->set_chan(dev, conf);
545 msleep(10);
546 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
547
548 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
549
550 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
551 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
552 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
553 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
554 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
555 } else {
556 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
557 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
558 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
559 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
560 }
561
562 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
563 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
564 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
565 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
566 return 0;
567 }
568
569 static int rtl8187_config_interface(struct ieee80211_hw *dev,
570 struct ieee80211_vif *vif,
571 struct ieee80211_if_conf *conf)
572 {
573 struct rtl8187_priv *priv = dev->priv;
574 int i;
575
576 for (i = 0; i < ETH_ALEN; i++)
577 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
578
579 if (is_valid_ether_addr(conf->bssid))
580 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
581 else
582 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
583
584 return 0;
585 }
586
587 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
588 unsigned int changed_flags,
589 unsigned int *total_flags,
590 int mc_count, struct dev_addr_list *mclist)
591 {
592 struct rtl8187_priv *priv = dev->priv;
593
594 if (changed_flags & FIF_FCSFAIL)
595 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
596 if (changed_flags & FIF_CONTROL)
597 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
598 if (changed_flags & FIF_OTHER_BSS)
599 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
600 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
601 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
602 else
603 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
604
605 *total_flags = 0;
606
607 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
608 *total_flags |= FIF_FCSFAIL;
609 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
610 *total_flags |= FIF_CONTROL;
611 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
612 *total_flags |= FIF_OTHER_BSS;
613 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
614 *total_flags |= FIF_ALLMULTI;
615
616 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
617 }
618
619 static const struct ieee80211_ops rtl8187_ops = {
620 .tx = rtl8187_tx,
621 .start = rtl8187_start,
622 .stop = rtl8187_stop,
623 .add_interface = rtl8187_add_interface,
624 .remove_interface = rtl8187_remove_interface,
625 .config = rtl8187_config,
626 .config_interface = rtl8187_config_interface,
627 .configure_filter = rtl8187_configure_filter,
628 };
629
630 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
631 {
632 struct ieee80211_hw *dev = eeprom->data;
633 struct rtl8187_priv *priv = dev->priv;
634 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
635
636 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
637 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
638 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
639 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
640 }
641
642 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
643 {
644 struct ieee80211_hw *dev = eeprom->data;
645 struct rtl8187_priv *priv = dev->priv;
646 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
647
648 if (eeprom->reg_data_in)
649 reg |= RTL818X_EEPROM_CMD_WRITE;
650 if (eeprom->reg_data_out)
651 reg |= RTL818X_EEPROM_CMD_READ;
652 if (eeprom->reg_data_clock)
653 reg |= RTL818X_EEPROM_CMD_CK;
654 if (eeprom->reg_chip_select)
655 reg |= RTL818X_EEPROM_CMD_CS;
656
657 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
658 udelay(10);
659 }
660
661 static int __devinit rtl8187_probe(struct usb_interface *intf,
662 const struct usb_device_id *id)
663 {
664 struct usb_device *udev = interface_to_usbdev(intf);
665 struct ieee80211_hw *dev;
666 struct rtl8187_priv *priv;
667 struct eeprom_93cx6 eeprom;
668 struct ieee80211_channel *channel;
669 u16 txpwr, reg;
670 int err, i;
671 DECLARE_MAC_BUF(mac);
672
673 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
674 if (!dev) {
675 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
676 return -ENOMEM;
677 }
678
679 priv = dev->priv;
680
681 SET_IEEE80211_DEV(dev, &intf->dev);
682 usb_set_intfdata(intf, dev);
683 priv->udev = udev;
684
685 usb_get_dev(udev);
686
687 skb_queue_head_init(&priv->rx_queue);
688 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
689 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
690 priv->map = (struct rtl818x_csr *)0xFF00;
691 priv->modes[0].mode = MODE_IEEE80211G;
692 priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates);
693 priv->modes[0].rates = priv->rates;
694 priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels);
695 priv->modes[0].channels = priv->channels;
696 priv->modes[1].mode = MODE_IEEE80211B;
697 priv->modes[1].num_rates = 4;
698 priv->modes[1].rates = priv->rates;
699 priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels);
700 priv->modes[1].channels = priv->channels;
701 priv->mode = IEEE80211_IF_TYPE_MNTR;
702 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
703 IEEE80211_HW_RX_INCLUDES_FCS;
704 dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
705 dev->queues = 1;
706 dev->max_rssi = 65;
707 dev->max_signal = 64;
708
709 for (i = 0; i < 2; i++)
710 if ((err = ieee80211_register_hwmode(dev, &priv->modes[i])))
711 goto err_free_dev;
712
713 eeprom.data = dev;
714 eeprom.register_read = rtl8187_eeprom_register_read;
715 eeprom.register_write = rtl8187_eeprom_register_write;
716 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
717 eeprom.width = PCI_EEPROM_WIDTH_93C66;
718 else
719 eeprom.width = PCI_EEPROM_WIDTH_93C46;
720
721 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
722 udelay(10);
723
724 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
725 (__le16 __force *)dev->wiphy->perm_addr, 3);
726 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
727 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
728 "generated MAC address\n");
729 random_ether_addr(dev->wiphy->perm_addr);
730 }
731
732 channel = priv->channels;
733 for (i = 0; i < 3; i++) {
734 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
735 &txpwr);
736 (*channel++).val = txpwr & 0xFF;
737 (*channel++).val = txpwr >> 8;
738 }
739 for (i = 0; i < 2; i++) {
740 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
741 &txpwr);
742 (*channel++).val = txpwr & 0xFF;
743 (*channel++).val = txpwr >> 8;
744 }
745 for (i = 0; i < 2; i++) {
746 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
747 &txpwr);
748 (*channel++).val = txpwr & 0xFF;
749 (*channel++).val = txpwr >> 8;
750 }
751
752 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
753 &priv->txpwr_base);
754
755 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
756 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
757 /* 0 means asic B-cut, we should use SW 3 wire
758 * bit-by-bit banging for radio. 1 means we can use
759 * USB specific request to write radio registers */
760 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
761 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
762 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
763
764 priv->rf = rtl8187_detect_rf(dev);
765
766 err = ieee80211_register_hw(dev);
767 if (err) {
768 printk(KERN_ERR "rtl8187: Cannot register device\n");
769 goto err_free_dev;
770 }
771
772 printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
773 wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
774 priv->asic_rev, priv->rf->name);
775
776 return 0;
777
778 err_free_dev:
779 ieee80211_free_hw(dev);
780 usb_set_intfdata(intf, NULL);
781 usb_put_dev(udev);
782 return err;
783 }
784
785 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
786 {
787 struct ieee80211_hw *dev = usb_get_intfdata(intf);
788 struct rtl8187_priv *priv;
789
790 if (!dev)
791 return;
792
793 ieee80211_unregister_hw(dev);
794
795 priv = dev->priv;
796 usb_put_dev(interface_to_usbdev(intf));
797 ieee80211_free_hw(dev);
798 }
799
800 static struct usb_driver rtl8187_driver = {
801 .name = KBUILD_MODNAME,
802 .id_table = rtl8187_table,
803 .probe = rtl8187_probe,
804 .disconnect = rtl8187_disconnect,
805 };
806
807 static int __init rtl8187_init(void)
808 {
809 return usb_register(&rtl8187_driver);
810 }
811
812 static void __exit rtl8187_exit(void)
813 {
814 usb_deregister(&rtl8187_driver);
815 }
816
817 module_init(rtl8187_init);
818 module_exit(rtl8187_exit);
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