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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / net / tokenring / tms380tr.h
blob7af76d7088490f61b57af4adcf832c7b16a018f7
1 /*
2 * tms380tr.h: TI TMS380 Token Ring driver for Linux
3 *
4 * Authors:
5 * - Christoph Goos <cgoos@syskonnect.de>
6 * - Adam Fritzler
7 */
8
9 #ifndef __LINUX_TMS380TR_H
10 #define __LINUX_TMS380TR_H
11
12 #ifdef __KERNEL__
13
14 #include <linux/interrupt.h>
15
16 /* module prototypes */
17 int tms380tr_open(struct net_device *dev);
18 int tms380tr_close(struct net_device *dev);
19 irqreturn_t tms380tr_interrupt(int irq, void *dev_id);
20 int tmsdev_init(struct net_device *dev, struct device *pdev);
21 void tmsdev_term(struct net_device *dev);
22 void tms380tr_wait(unsigned long time);
23
24 #define TMS380TR_MAX_ADAPTERS 7
25
26 #define SEND_TIMEOUT 10*HZ
27
28 #define TR_RCF_LONGEST_FRAME_MASK 0x0070
29 #define TR_RCF_FRAME4K 0x0030
30
31 /*------------------------------------------------------------------*/
32 /* Bit order for adapter communication with DMA */
33 /* -------------------------------------------------------------- */
34 /* Bit 8 | 9| 10| 11|| 12| 13| 14| 15|| 0| 1| 2| 3|| 4| 5| 6| 7| */
35 /* -------------------------------------------------------------- */
36 /* The bytes in a word must be byte swapped. Also, if a double */
37 /* word is used for storage, then the words, as well as the bytes, */
38 /* must be swapped. */
39 /* Bit order for adapter communication with DIO */
40 /* -------------------------------------------------------------- */
41 /* Bit 0 | 1| 2| 3|| 4| 5| 6| 7|| 8| 9| 10| 11|| 12| 13| 14| 15| */
42 /* -------------------------------------------------------------- */
43 /*------------------------------------------------------------------*/
44
45 /* Swap words of a long. */
46 #define SWAPW(x) (((x) << 16) | ((x) >> 16))
47
48 /* Get the low byte of a word. */
49 #define LOBYTE(w) ((unsigned char)(w))
50
51 /* Get the high byte of a word. */
52 #define HIBYTE(w) ((unsigned char)((unsigned short)(w) >> 8))
53
54 /* Get the low word of a long. */
55 #define LOWORD(l) ((unsigned short)(l))
56
57 /* Get the high word of a long. */
58 #define HIWORD(l) ((unsigned short)((unsigned long)(l) >> 16))
59
60
61
62 /* Token ring adapter I/O addresses for normal mode. */
63
64 /*
65 * The SIF registers. Common to all adapters.
66 */
67 /* Basic SIF (SRSX = 0) */
68 #define SIFDAT 0x00 /* SIF/DMA data. */
69 #define SIFINC 0x02 /* IO Word data with auto increment. */
70 #define SIFINH 0x03 /* IO Byte data with auto increment. */
71 #define SIFADR 0x04 /* SIF/DMA Address. */
72 #define SIFCMD 0x06 /* SIF Command. */
73 #define SIFSTS 0x06 /* SIF Status. */
74
75 /* "Extended" SIF (SRSX = 1) */
76 #define SIFACL 0x08 /* SIF Adapter Control Register. */
77 #define SIFADD 0x0a /* SIF/DMA Address. -- 0x0a */
78 #define SIFADX 0x0c /* 0x0c */
79 #define DMALEN 0x0e /* SIF DMA length. -- 0x0e */
80
81 /*
82 * POS Registers. Only for ISA Adapters.
83 */
84 #define POSREG 0x10 /* Adapter Program Option Select (POS)
85 * Register: base IO address + 16 byte.
86 */
87 #define POSREG_2 24L /* only for TR4/16+ adapter
88 * base IO address + 24 byte. -- 0x18
89 */
90
91 /* SIFCMD command codes (high-low) */
92 #define CMD_INTERRUPT_ADAPTER 0x8000 /* Cause internal adapter interrupt */
93 #define CMD_ADAPTER_RESET 0x4000 /* Hardware reset of adapter */
94 #define CMD_SSB_CLEAR 0x2000 /* Acknowledge to adapter to
95 * system interrupts.
96 */
97 #define CMD_EXECUTE 0x1000 /* Execute SCB command */
98 #define CMD_SCB_REQUEST 0x0800 /* Request adapter to interrupt
99 * system when SCB is available for
100 * another command.
101 */
102 #define CMD_RX_CONTINUE 0x0400 /* Continue receive after odd pointer
103 * stop. (odd pointer receive method)
104 */
105 #define CMD_RX_VALID 0x0200 /* Now actual RPL is valid. */
106 #define CMD_TX_VALID 0x0100 /* Now actual TPL is valid. (valid
107 * bit receive/transmit method)
108 */
109 #define CMD_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system
110 * interrupt is reset.
111 */
112 #define CMD_CLEAR_SYSTEM_IRQ 0x0080 /* Clear SYSTEM_INTERRUPT bit.
113 * (write: 1=ignore, 0=reset)
114 */
115 #define EXEC_SOFT_RESET 0xFF00 /* adapter soft reset. (restart
116 * adapter after hardware reset)
117 */
118
119
120 /* ACL commands (high-low) */
121 #define ACL_SWHLDA 0x0800 /* Software hold acknowledge. */
122 #define ACL_SWDDIR 0x0400 /* Data transfer direction. */
123 #define ACL_SWHRQ 0x0200 /* Pseudo DMA operation. */
124 #define ACL_PSDMAEN 0x0100 /* Enable pseudo system DMA. */
125 #define ACL_ARESET 0x0080 /* Adapter hardware reset command.
126 * (held in reset condition as
127 * long as bit is set)
128 */
129 #define ACL_CPHALT 0x0040 /* Communication processor halt.
130 * (can only be set while ACL_ARESET
131 * bit is set; prevents adapter
132 * processor from executing code while
133 * downloading firmware)
134 */
135 #define ACL_BOOT 0x0020
136 #define ACL_SINTEN 0x0008 /* System interrupt enable/disable
137 * (1/0): can be written if ACL_ARESET
138 * is zero.
139 */
140 #define ACL_PEN 0x0004
141
142 #define ACL_NSELOUT0 0x0002
143 #define ACL_NSELOUT1 0x0001 /* NSELOUTx have a card-specific
144 * meaning for setting ring speed.
145 */
146
147 #define PS_DMA_MASK (ACL_SWHRQ | ACL_PSDMAEN)
148
149
150 /* SIFSTS register return codes (high-low) */
151 #define STS_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system
152 * interrupt is valid.
153 */
154 #define STS_INITIALIZE 0x0040 /* INITIALIZE status. (ready to
155 * initialize)
156 */
157 #define STS_TEST 0x0020 /* TEST status. (BUD not completed) */
158 #define STS_ERROR 0x0010 /* ERROR status. (unrecoverable
159 * HW error occurred)
160 */
161 #define STS_MASK 0x00F0 /* Mask interesting status bits. */
162 #define STS_ERROR_MASK 0x000F /* Get Error Code by masking the
163 * interrupt code bits.
164 */
165 #define ADAPTER_INT_PTRS 0x0A00 /* Address offset of adapter internal
166 * pointers 01:0a00 (high-low) have to
167 * be read after init and before open.
168 */
169
170
171 /* Interrupt Codes (only MAC IRQs) */
172 #define STS_IRQ_ADAPTER_CHECK 0x0000 /* unrecoverable hardware or
173 * software error.
174 */
175 #define STS_IRQ_RING_STATUS 0x0004 /* SSB is updated with ring status. */
176 #define STS_IRQ_LLC_STATUS 0x0005 /* Not used in MAC-only microcode */
177 #define STS_IRQ_SCB_CLEAR 0x0006 /* SCB clear, following an
178 * SCB_REQUEST IRQ.
179 */
180 #define STS_IRQ_TIMER 0x0007 /* Not normally used in MAC ucode */
181 #define STS_IRQ_COMMAND_STATUS 0x0008 /* SSB is updated with command
182 * status.
183 */
184 #define STS_IRQ_RECEIVE_STATUS 0x000A /* SSB is updated with receive
185 * status.
186 */
187 #define STS_IRQ_TRANSMIT_STATUS 0x000C /* SSB is updated with transmit
188 * status
189 */
190 #define STS_IRQ_RECEIVE_PENDING 0x000E /* Not used in MAC-only microcode */
191 #define STS_IRQ_MASK 0x000F /* = STS_ERROR_MASK. */
192
193
194 /* TRANSMIT_STATUS completion code: (SSB.Parm[0]) */
195 #define COMMAND_COMPLETE 0x0080 /* TRANSMIT command completed
196 * (avoid this!) issue another transmit
197 * to send additional frames.
198 */
199 #define FRAME_COMPLETE 0x0040 /* Frame has been transmitted;
200 * INTERRUPT_FRAME bit was set in the
201 * CSTAT request; indication of possibly
202 * more than one frame transmissions!
203 * SSB.Parm[0-1]: 32 bit pointer to
204 * TPL of last frame.
205 */
206 #define LIST_ERROR 0x0020 /* Error in one of the TPLs that
207 * compose the frame; TRANSMIT
208 * terminated; Parm[1-2]: 32bit pointer
209 * to TPL which starts the error
210 * frame; error details in bits 8-13.
211 * (14?)
212 */
213 #define FRAME_SIZE_ERROR 0x8000 /* FRAME_SIZE does not equal the sum of
214 * the valid DATA_COUNT fields;
215 * FRAME_SIZE less than header plus
216 * information field. (15 bytes +
217 * routing field) Or if FRAME_SIZE
218 * was specified as zero in one list.
219 */
220 #define TX_THRESHOLD 0x4000 /* FRAME_SIZE greater than (BUFFER_SIZE
221 * - 9) * TX_BUF_MAX.
222 */
223 #define ODD_ADDRESS 0x2000 /* Odd forward pointer value is
224 * read on a list without END_FRAME
225 * indication.
226 */
227 #define FRAME_ERROR 0x1000 /* START_FRAME bit (not) anticipated,
228 * but (not) set.
229 */
230 #define ACCESS_PRIORITY_ERROR 0x0800 /* Access priority requested has not
231 * been allowed.
232 */
233 #define UNENABLED_MAC_FRAME 0x0400 /* MAC frame has source class of zero
234 * or MAC frame PCF ATTN field is
235 * greater than one.
236 */
237 #define ILLEGAL_FRAME_FORMAT 0x0200 /* Bit 0 or FC field was set to one. */
238
239
240 /*
241 * Since we need to support some functions even if the adapter is in a
242 * CLOSED state, we have a (pseudo-) command queue which holds commands
243 * that are outstandig to be executed.
244 *
245 * Each time a command completes, an interrupt occurs and the next
246 * command is executed. The command queue is actually a simple word with
247 * a bit for each outstandig command. Therefore the commands will not be
248 * executed in the order they have been queued.
249 *
250 * The following defines the command code bits and the command queue:
251 */
252 #define OC_OPEN 0x0001 /* OPEN command */
253 #define OC_TRANSMIT 0x0002 /* TRANSMIT command */
254 #define OC_TRANSMIT_HALT 0x0004 /* TRANSMIT_HALT command */
255 #define OC_RECEIVE 0x0008 /* RECEIVE command */
256 #define OC_CLOSE 0x0010 /* CLOSE command */
257 #define OC_SET_GROUP_ADDR 0x0020 /* SET_GROUP_ADDR command */
258 #define OC_SET_FUNCT_ADDR 0x0040 /* SET_FUNCT_ADDR command */
259 #define OC_READ_ERROR_LOG 0x0080 /* READ_ERROR_LOG command */
260 #define OC_READ_ADAPTER 0x0100 /* READ_ADAPTER command */
261 #define OC_MODIFY_OPEN_PARMS 0x0400 /* MODIFY_OPEN_PARMS command */
262 #define OC_RESTORE_OPEN_PARMS 0x0800 /* RESTORE_OPEN_PARMS command */
263 #define OC_SET_FIRST_16_GROUP 0x1000 /* SET_FIRST_16_GROUP command */
264 #define OC_SET_BRIDGE_PARMS 0x2000 /* SET_BRIDGE_PARMS command */
265 #define OC_CONFIG_BRIDGE_PARMS 0x4000 /* CONFIG_BRIDGE_PARMS command */
266
267 #define OPEN 0x0300 /* C: open command. S: completion. */
268 #define TRANSMIT 0x0400 /* C: transmit command. S: completion
269 * status. (reject: COMMAND_REJECT if
270 * adapter not opened, TRANSMIT already
271 * issued or address passed in the SCB
272 * not word aligned)
273 */
274 #define TRANSMIT_HALT 0x0500 /* C: interrupt TX TPL chain; if no
275 * TRANSMIT command issued, the command
276 * is ignored (completion with TRANSMIT
277 * status (0x0400)!)
278 */
279 #define RECEIVE 0x0600 /* C: receive command. S: completion
280 * status. (reject: COMMAND_REJECT if
281 * adapter not opened, RECEIVE already
282 * issued or address passed in the SCB
283 * not word aligned)
284 */
285 #define CLOSE 0x0700 /* C: close adapter. S: completion.
286 * (COMMAND_REJECT if adapter not open)
287 */
288 #define SET_GROUP_ADDR 0x0800 /* C: alter adapter group address after
289 * OPEN. S: completion. (COMMAND_REJECT
290 * if adapter not open)
291 */
292 #define SET_FUNCT_ADDR 0x0900 /* C: alter adapter functional address
293 * after OPEN. S: completion.
294 * (COMMAND_REJECT if adapter not open)
295 */
296 #define READ_ERROR_LOG 0x0A00 /* C: read adapter error counters.
297 * S: completion. (command ignored
298 * if adapter not open!)
299 */
300 #define READ_ADAPTER 0x0B00 /* C: read data from adapter memory.
301 * (important: after init and before
302 * open!) S: completion. (ADAPTER_CHECK
303 * interrupt if undefined storage area
304 * read)
305 */
306 #define MODIFY_OPEN_PARMS 0x0D00 /* C: modify some adapter operational
307 * parameters. (bit correspondend to
308 * WRAP_INTERFACE is ignored)
309 * S: completion. (reject:
310 * COMMAND_REJECT)
311 */
312 #define RESTORE_OPEN_PARMS 0x0E00 /* C: modify some adapter operational
313 * parameters. (bit correspondend
314 * to WRAP_INTERFACE is ignored)
315 * S: completion. (reject:
316 * COMMAND_REJECT)
317 */
318 #define SET_FIRST_16_GROUP 0x0F00 /* C: alter the first two bytes in
319 * adapter group address.
320 * S: completion. (reject:
321 * COMMAND_REJECT)
322 */
323 #define SET_BRIDGE_PARMS 0x1000 /* C: values and conditions for the
324 * adapter hardware to use when frames
325 * are copied for forwarding.
326 * S: completion. (reject:
327 * COMMAND_REJECT)
328 */
329 #define CONFIG_BRIDGE_PARMS 0x1100 /* C: ..
330 * S: completion. (reject:
331 * COMMAND_REJECT)
332 */
333
334 #define SPEED_4 4
335 #define SPEED_16 16 /* Default transmission speed */
336
337
338 /* Initialization Parameter Block (IPB); word alignment necessary! */
339 #define BURST_SIZE 0x0018 /* Default burst size */
340 #define BURST_MODE 0x9F00 /* Burst mode enable */
341 #define DMA_RETRIES 0x0505 /* Magic DMA retry number... */
342
343 #define CYCLE_TIME 3 /* Default AT-bus cycle time: 500 ns
344 * (later adapter version: fix cycle time!)
345 */
346 #define LINE_SPEED_BIT 0x80
347
348 /* Macro definition for the wait function. */
349 #define ONE_SECOND_TICKS 1000000
350 #define HALF_SECOND (ONE_SECOND_TICKS / 2)
351 #define ONE_SECOND (ONE_SECOND_TICKS)
352 #define TWO_SECONDS (ONE_SECOND_TICKS * 2)
353 #define THREE_SECONDS (ONE_SECOND_TICKS * 3)
354 #define FOUR_SECONDS (ONE_SECOND_TICKS * 4)
355 #define FIVE_SECONDS (ONE_SECOND_TICKS * 5)
356
357 #define BUFFER_SIZE 2048 /* Buffers on Adapter */
358
359 #pragma pack(1)
360 typedef struct {
361 unsigned short Init_Options; /* Initialize with burst mode;
362 * LLC disabled. (MAC only)
363 */
364
365 /* Interrupt vectors the adapter places on attached system bus. */
366 u_int8_t CMD_Status_IV; /* Interrupt vector: command status. */
367 u_int8_t TX_IV; /* Interrupt vector: transmit. */
368 u_int8_t RX_IV; /* Interrupt vector: receive. */
369 u_int8_t Ring_Status_IV; /* Interrupt vector: ring status. */
370 u_int8_t SCB_Clear_IV; /* Interrupt vector: SCB clear. */
371 u_int8_t Adapter_CHK_IV; /* Interrupt vector: adapter check. */
372
373 u_int16_t RX_Burst_Size; /* Max. number of transfer cycles. */
374 u_int16_t TX_Burst_Size; /* During DMA burst; even value! */
375 u_int16_t DMA_Abort_Thrhld; /* Number of DMA retries. */
376
377 u_int32_t SCB_Addr; /* SCB address: even, word aligned, high-low */
378 u_int32_t SSB_Addr; /* SSB address: even, word aligned, high-low */
379 } IPB, *IPB_Ptr;
380 #pragma pack()
381
382 /*
383 * OPEN Command Parameter List (OCPL) (can be reused, if the adapter has to
384 * be reopened)
385 */
386 #define BUFFER_SIZE 2048 /* Buffers on Adapter. */
387 #define TPL_SIZE 8+6*TX_FRAG_NUM /* Depending on fragments per TPL. */
388 #define RPL_SIZE 14 /* (with TI firmware v2.26 handling
389 * up to nine fragments possible)
390 */
391 #define TX_BUF_MIN 20 /* ??? (Stephan: calculation with */
392 #define TX_BUF_MAX 40 /* BUFFER_SIZE and MAX_FRAME_SIZE) ???
393 */
394 #define DISABLE_EARLY_TOKEN_RELEASE 0x1000
395
396 /* OPEN Options (high-low) */
397 #define WRAP_INTERFACE 0x0080 /* Inserting omitted for test
398 * purposes; transmit data appears
399 * as receive data. (useful for
400 * testing; change: CLOSE necessary)
401 */
402 #define DISABLE_HARD_ERROR 0x0040 /* On HARD_ERROR & TRANSMIT_BEACON
403 * no RING.STATUS interrupt.
404 */
405 #define DISABLE_SOFT_ERROR 0x0020 /* On SOFT_ERROR, no RING.STATUS
406 * interrupt.
407 */
408 #define PASS_ADAPTER_MAC_FRAMES 0x0010 /* Passing unsupported MAC frames
409 * to system.
410 */
411 #define PASS_ATTENTION_FRAMES 0x0008 /* All changed attention MAC frames are
412 * passed to the system.
413 */
414 #define PAD_ROUTING_FIELD 0x0004 /* Routing field is padded to 18
415 * bytes.
416 */
417 #define FRAME_HOLD 0x0002 /*Adapter waits for entire frame before
418 * initiating DMA transfer; otherwise:
419 * DMA transfer initiation if internal
420 * buffer filled.
421 */
422 #define CONTENDER 0x0001 /* Adapter participates in the monitor
423 * contention process.
424 */
425 #define PASS_BEACON_MAC_FRAMES 0x8000 /* Adapter passes beacon MAC frames
426 * to the system.
427 */
428 #define EARLY_TOKEN_RELEASE 0x1000 /* Only valid in 16 Mbps operation;
429 * 0 = ETR. (no effect in 4 Mbps
430 * operation)
431 */
432 #define COPY_ALL_MAC_FRAMES 0x0400 /* All MAC frames are copied to
433 * the system. (after OPEN: duplicate
434 * address test (DAT) MAC frame is
435 * first received frame copied to the
436 * system)
437 */
438 #define COPY_ALL_NON_MAC_FRAMES 0x0200 /* All non MAC frames are copied to
439 * the system.
440 */
441 #define PASS_FIRST_BUF_ONLY 0x0100 /* Passes only first internal buffer
442 * of each received frame; FrameSize
443 * of RPLs must contain internal
444 * BUFFER_SIZE bits for promiscous mode.
445 */
446 #define ENABLE_FULL_DUPLEX_SELECTION 0x2000
447 /* Enable the use of full-duplex
448 * settings with bits in byte 22 in
449 * ocpl. (new feature in firmware
450 * version 3.09)
451 */
452
453 /* Full-duplex settings */
454 #define OPEN_FULL_DUPLEX_OFF 0x0000
455 #define OPEN_FULL_DUPLEX_ON 0x00c0
456 #define OPEN_FULL_DUPLEX_AUTO 0x0080
457
458 #define PROD_ID_SIZE 18 /* Length of product ID. */
459
460 #define TX_FRAG_NUM 3 /* Number of fragments used in one TPL. */
461 #define TX_MORE_FRAGMENTS 0x8000 /* Bit set in DataCount to indicate more
462 * fragments following.
463 */
464
465 /* XXX is there some better way to do this? */
466 #define ISA_MAX_ADDRESS 0x00ffffff
467 #define PCI_MAX_ADDRESS 0xffffffff
468
469 #pragma pack(1)
470 typedef struct {
471 u_int16_t OPENOptions;
472 u_int8_t NodeAddr[6]; /* Adapter node address; use ROM
473 * address
474 */
475 u_int32_t GroupAddr; /* Multicast: high order
476 * bytes = 0xC000
477 */
478 u_int32_t FunctAddr; /* High order bytes = 0xC000 */
479 __be16 RxListSize; /* RPL size: 0 (=26), 14, 20 or
480 * 26 bytes read by the adapter.
481 * (Depending on the number of
482 * fragments/list)
483 */
484 __be16 TxListSize; /* TPL size */
485 __be16 BufSize; /* Is automatically rounded up to the
486 * nearest nK boundary.
487 */
488 u_int16_t FullDuplex;
489 u_int16_t Reserved;
490 u_int8_t TXBufMin; /* Number of adapter buffers reserved
491 * for transmission a minimum of 2
492 * buffers must be allocated.
493 */
494 u_int8_t TXBufMax; /* Maximum number of adapter buffers
495 * for transmit; a minimum of 2 buffers
496 * must be available for receive.
497 * Default: 6
498 */
499 u_int16_t ProdIDAddr[2];/* Pointer to product ID. */
500 } OPB, *OPB_Ptr;
501 #pragma pack()
502
503 /*
504 * SCB: adapter commands enabled by the host system started by writing
505 * CMD_INTERRUPT_ADAPTER | CMD_EXECUTE (|SCB_REQUEST) to the SIFCMD IO
506 * register. (special case: | CMD_SYSTEM_IRQ for initialization)
507 */
508 #pragma pack(1)
509 typedef struct {
510 u_int16_t CMD; /* Command code */
511 u_int16_t Parm[2]; /* Pointer to Command Parameter Block */
512 } SCB; /* System Command Block (32 bit physical address; big endian)*/
513 #pragma pack()
514
515 /*
516 * SSB: adapter command return status can be evaluated after COMMAND_STATUS
517 * adapter to system interrupt after reading SSB, the availability of the SSB
518 * has to be told the adapter by writing CMD_INTERRUPT_ADAPTER | CMD_SSB_CLEAR
519 * in the SIFCMD IO register.
520 */
521 #pragma pack(1)
522 typedef struct {
523 u_int16_t STS; /* Status code */
524 u_int16_t Parm[3]; /* Parameter or pointer to Status Parameter
525 * Block.
526 */
527 } SSB; /* System Status Block (big endian - physical address) */
528 #pragma pack()
529
530 typedef struct {
531 unsigned short BurnedInAddrPtr; /* Pointer to adapter burned in
532 * address. (BIA)
533 */
534 unsigned short SoftwareLevelPtr;/* Pointer to software level data. */
535 unsigned short AdapterAddrPtr; /* Pointer to adapter addresses. */
536 unsigned short AdapterParmsPtr; /* Pointer to adapter parameters. */
537 unsigned short MACBufferPtr; /* Pointer to MAC buffer. (internal) */
538 unsigned short LLCCountersPtr; /* Pointer to LLC counters. */
539 unsigned short SpeedFlagPtr; /* Pointer to data rate flag.
540 * (4/16 Mbps)
541 */
542 unsigned short AdapterRAMPtr; /* Pointer to adapter RAM found. (KB) */
543 } INTPTRS; /* Adapter internal pointers */
544
545 #pragma pack(1)
546 typedef struct {
547 u_int8_t Line_Error; /* Line error: code violation in
548 * frame or in a token, or FCS error.
549 */
550 u_int8_t Internal_Error; /* IBM specific. (Reserved_1) */
551 u_int8_t Burst_Error;
552 u_int8_t ARI_FCI_Error; /* ARI/FCI bit zero in AMP or
553 * SMP MAC frame.
554 */
555 u_int8_t AbortDelimeters; /* IBM specific. (Reserved_2) */
556 u_int8_t Reserved_3;
557 u_int8_t Lost_Frame_Error; /* Receive of end of transmitted
558 * frame failed.
559 */
560 u_int8_t Rx_Congest_Error; /* Adapter in repeat mode has not
561 * enough buffer space to copy incoming
562 * frame.
563 */
564 u_int8_t Frame_Copied_Error; /* ARI bit not zero in frame
565 * addressed to adapter.
566 */
567 u_int8_t Frequency_Error; /* IBM specific. (Reserved_4) */
568 u_int8_t Token_Error; /* (active only in monitor station) */
569 u_int8_t Reserved_5;
570 u_int8_t DMA_Bus_Error; /* DMA bus errors not exceeding the
571 * abort thresholds.
572 */
573 u_int8_t DMA_Parity_Error; /* DMA parity errors not exceeding
574 * the abort thresholds.
575 */
576 } ERRORTAB; /* Adapter error counters */
577 #pragma pack()
578
579
580 /*--------------------- Send and Receive definitions -------------------*/
581 #pragma pack(1)
582 typedef struct {
583 __be16 DataCount; /* Value 0, even and odd values are
584 * permitted; value is unaltered most
585 * significant bit set: following
586 * fragments last fragment: most
587 * significant bit is not evaluated.
588 * (???)
589 */
590 __be32 DataAddr; /* Pointer to frame data fragment;
591 * even or odd.
592 */
593 } Fragment;
594 #pragma pack()
595
596 #define MAX_FRAG_NUMBERS 9 /* Maximal number of fragments possible to use
597 * in one RPL/TPL. (depending on TI firmware
598 * version)
599 */
600
601 /*
602 * AC (1), FC (1), Dst (6), Src (6), RIF (18), Data (4472) = 4504
603 * The packet size can be one of the follows: 548, 1502, 2084, 4504, 8176,
604 * 11439, 17832. Refer to TMS380 Second Generation Token Ring User's Guide
605 * Page 2-27.
606 */
607 #define HEADER_SIZE (1 + 1 + 6 + 6)
608 #define SRC_SIZE 18
609 #define MIN_DATA_SIZE 516
610 #define DEFAULT_DATA_SIZE 4472
611 #define MAX_DATA_SIZE 17800
612
613 #define DEFAULT_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + DEFAULT_DATA_SIZE)
614 #define MIN_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MIN_DATA_SIZE)
615 #define MAX_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MAX_DATA_SIZE)
616
617 /*
618 * Macros to deal with the frame status field.
619 */
620 #define AC_NOT_RECOGNIZED 0x00
621 #define GROUP_BIT 0x80
622 #define GET_TRANSMIT_STATUS_HIGH_BYTE(Ts) ((unsigned char)((Ts) >> 8))
623 #define GET_FRAME_STATUS_HIGH_AC(Fs) ((unsigned char)(((Fs) & 0xC0) >> 6))
624 #define GET_FRAME_STATUS_LOW_AC(Fs) ((unsigned char)(((Fs) & 0x0C) >> 2))
625 #define DIRECTED_FRAME(Context) (!((Context)->MData[2] & GROUP_BIT))
626
627
628 /*--------------------- Send Functions ---------------------------------*/
629 /* define TX_CSTAT _REQUEST (R) and _COMPLETE (C) values (high-low) */
630
631 #define TX_VALID 0x0080 /* R: set via TRANSMIT.VALID interrupt.
632 * C: always reset to zero!
633 */
634 #define TX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero.
635 * C: set to one.
636 */
637 #define TX_START_FRAME 0x0020 /* R: start of a frame: 1
638 * C: unchanged.
639 */
640 #define TX_END_FRAME 0x0010 /* R: end of a frame: 1
641 * C: unchanged.
642 */
643 #define TX_FRAME_IRQ 0x0008 /* R: request interrupt generation
644 * after transmission.
645 * C: unchanged.
646 */
647 #define TX_ERROR 0x0004 /* R: reserved.
648 * C: set to one if Error occurred.
649 */
650 #define TX_INTERFRAME_WAIT 0x0004
651 #define TX_PASS_CRC 0x0002 /* R: set if CRC value is already
652 * calculated. (valid only in
653 * FRAME_START TPL)
654 * C: unchanged.
655 */
656 #define TX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame
657 * source address and does not overwrite
658 * with the adapter node address.
659 * (valid only in FRAME_START TPL)
660 *
661 * C: unchanged.
662 */
663 #define TX_STRIP_FS 0xFF00 /* R: reserved.
664 * C: if no Transmission Error,
665 * field contains copy of FS byte after
666 * stripping of frame.
667 */
668
669 /*
670 * Structure of Transmit Parameter Lists (TPLs) (only one frame every TPL,
671 * but possibly multiple TPLs for one frame) the length of the TPLs has to be
672 * initialized in the OPL. (OPEN parameter list)
673 */
674 #define TPL_NUM 3 /* Number of Transmit Parameter Lists.
675 * !! MUST BE >= 3 !!
676 */
677
678 #pragma pack(1)
679 typedef struct s_TPL TPL;
680
681 struct s_TPL { /* Transmit Parameter List (align on even word boundaries) */
682 __be32 NextTPLAddr; /* Pointer to next TPL in chain; if
683 * pointer is odd: this is the last
684 * TPL. Pointing to itself can cause
685 * problems!
686 */
687 volatile u_int16_t Status; /* Initialized by the adapter:
688 * CSTAT_REQUEST important: update least
689 * significant bit first! Set by the
690 * adapter: CSTAT_COMPLETE status.
691 */
692 __be16 FrameSize; /* Number of bytes to be transmitted
693 * as a frame including AC/FC,
694 * Destination, Source, Routing field
695 * not including CRC, FS, End Delimiter
696 * (valid only if START_FRAME bit in
697 * CSTAT nonzero) must not be zero in
698 * any list; maximum value: (BUFFER_SIZE
699 * - 8) * TX_BUF_MAX sum of DataCount
700 * values in FragmentList must equal
701 * Frame_Size value in START_FRAME TPL!
702 * frame data fragment list.
703 */
704
705 /* TPL/RPL size in OPEN parameter list depending on maximal
706 * numbers of fragments used in one parameter list.
707 */
708 Fragment FragList[TX_FRAG_NUM]; /* Maximum: nine frame fragments in one
709 * TPL actual version of firmware: 9
710 * fragments possible.
711 */
712 #pragma pack()
713
714 /* Special proprietary data and precalculations */
715
716 TPL *NextTPLPtr; /* Pointer to next TPL in chain. */
717 unsigned char *MData;
718 struct sk_buff *Skb;
719 unsigned char TPLIndex;
720 volatile unsigned char BusyFlag;/* Flag: TPL busy? */
721 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */
722 };
723
724 /* ---------------------Receive Functions-------------------------------*
725 * define RECEIVE_CSTAT_REQUEST (R) and RECEIVE_CSTAT_COMPLETE (C) values.
726 * (high-low)
727 */
728 #define RX_VALID 0x0080 /* R: set; tell adapter with
729 * RECEIVE.VALID interrupt.
730 * C: reset to zero.
731 */
732 #define RX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero,
733 * C: set to one.
734 */
735 #define RX_START_FRAME 0x0020 /* R: must be reset to zero.
736 * C: set to one on the list.
737 */
738 #define RX_END_FRAME 0x0010 /* R: must be reset to zero.
739 * C: set to one on the list
740 * that ends the frame.
741 */
742 #define RX_FRAME_IRQ 0x0008 /* R: request interrupt generation
743 * after receive.
744 * C: unchanged.
745 */
746 #define RX_INTERFRAME_WAIT 0x0004 /* R: after receiving a frame:
747 * interrupt and wait for a
748 * RECEIVE.CONTINUE.
749 * C: unchanged.
750 */
751 #define RX_PASS_CRC 0x0002 /* R: if set, the adapter includes
752 * the CRC in data passed. (last four
753 * bytes; valid only if FRAME_START is
754 * set)
755 * C: set, if CRC is included in
756 * received data.
757 */
758 #define RX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame
759 * source address and does not
760 * overwrite with the adapter node
761 * address. (valid only if FRAME_START
762 * is set)
763 * C: unchanged.
764 */
765 #define RX_RECEIVE_FS 0xFC00 /* R: reserved; must be reset to zero.
766 * C: on lists with START_FRAME, field
767 * contains frame status field from
768 * received frame; otherwise cleared.
769 */
770 #define RX_ADDR_MATCH 0x0300 /* R: reserved; must be reset to zero.
771 * C: address match code mask.
772 */
773 #define RX_STATUS_MASK 0x00FF /* Mask for receive status bits. */
774
775 #define RX_INTERN_ADDR_MATCH 0x0100 /* C: internally address match. */
776 #define RX_EXTERN_ADDR_MATCH 0x0200 /* C: externally matched via
777 * XMATCH/XFAIL interface.
778 */
779 #define RX_INTEXT_ADDR_MATCH 0x0300 /* C: internally and externally
780 * matched.
781 */
782 #define RX_READY (RX_VALID | RX_FRAME_IRQ) /* Ready for receive. */
783
784 /* Constants for Command Status Interrupt.
785 * COMMAND_REJECT status field bit functions (SSB.Parm[0])
786 */
787 #define ILLEGAL_COMMAND 0x0080 /* Set if an unknown command
788 * is issued to the adapter
789 */
790 #define ADDRESS_ERROR 0x0040 /* Set if any address field in
791 * the SCB is odd. (not word aligned)
792 */
793 #define ADAPTER_OPEN 0x0020 /* Command issued illegal with
794 * open adapter.
795 */
796 #define ADAPTER_CLOSE 0x0010 /* Command issued illegal with
797 * closed adapter.
798 */
799 #define SAME_COMMAND 0x0008 /* Command issued with same command
800 * already executing.
801 */
802
803 /* OPEN_COMPLETION values (SSB.Parm[0], MSB) */
804 #define NODE_ADDR_ERROR 0x0040 /* Wrong address or BIA read
805 * zero address.
806 */
807 #define LIST_SIZE_ERROR 0x0020 /* If List_Size value not in 0,
808 * 14, 20, 26.
809 */
810 #define BUF_SIZE_ERROR 0x0010 /* Not enough available memory for
811 * two buffers.
812 */
813 #define TX_BUF_COUNT_ERROR 0x0004 /* Remaining receive buffers less than
814 * two.
815 */
816 #define OPEN_ERROR 0x0002 /* Error during ring insertion; more
817 * information in bits 8-15.
818 */
819
820 /* Standard return codes */
821 #define GOOD_COMPLETION 0x0080 /* =OPEN_SUCCESSFULL */
822 #define INVALID_OPEN_OPTION 0x0001 /* OPEN options are not supported by
823 * the adapter.
824 */
825
826 /* OPEN phases; details of OPEN_ERROR (SSB.Parm[0], LSB) */
827 #define OPEN_PHASES_MASK 0xF000 /* Check only the bits 8-11. */
828 #define LOBE_MEDIA_TEST 0x1000
829 #define PHYSICAL_INSERTION 0x2000
830 #define ADDRESS_VERIFICATION 0x3000
831 #define PARTICIPATION_IN_RING_POLL 0x4000
832 #define REQUEST_INITIALISATION 0x5000
833 #define FULLDUPLEX_CHECK 0x6000
834
835 /* OPEN error codes; details of OPEN_ERROR (SSB.Parm[0], LSB) */
836 #define OPEN_ERROR_CODES_MASK 0x0F00 /* Check only the bits 12-15. */
837 #define OPEN_FUNCTION_FAILURE 0x0100 /* Unable to transmit to itself or
838 * frames received before insertion.
839 */
840 #define OPEN_SIGNAL_LOSS 0x0200 /* Signal loss condition detected at
841 * receiver.
842 */
843 #define OPEN_TIMEOUT 0x0500 /* Insertion timer expired before
844 * logical insertion.
845 */
846 #define OPEN_RING_FAILURE 0x0600 /* Unable to receive own ring purge
847 * MAC frames.
848 */
849 #define OPEN_RING_BEACONING 0x0700 /* Beacon MAC frame received after
850 * ring insertion.
851 */
852 #define OPEN_DUPLICATE_NODEADDR 0x0800 /* Other station in ring found
853 * with the same address.
854 */
855 #define OPEN_REQUEST_INIT 0x0900 /* RPS present but does not respond. */
856 #define OPEN_REMOVE_RECEIVED 0x0A00 /* Adapter received a remove adapter
857 * MAC frame.
858 */
859 #define OPEN_FULLDUPLEX_SET 0x0D00 /* Got this with full duplex on when
860 * trying to connect to a normal ring.
861 */
862
863 /* SET_BRIDGE_PARMS return codes: */
864 #define BRIDGE_INVALID_MAX_LEN 0x4000 /* MAX_ROUTING_FIELD_LENGTH odd,
865 * less than 6 or > 30.
866 */
867 #define BRIDGE_INVALID_SRC_RING 0x2000 /* SOURCE_RING number zero, too large
868 * or = TARGET_RING.
869 */
870 #define BRIDGE_INVALID_TRG_RING 0x1000 /* TARGET_RING number zero, too large
871 * or = SOURCE_RING.
872 */
873 #define BRIDGE_INVALID_BRDGE_NO 0x0800 /* BRIDGE_NUMBER too large. */
874 #define BRIDGE_INVALID_OPTIONS 0x0400 /* Invalid bridge options. */
875 #define BRIDGE_DIAGS_FAILED 0x0200 /* Diagnostics of TMS380SRA failed. */
876 #define BRIDGE_NO_SRA 0x0100 /* The TMS380SRA does not exist in HW
877 * configuration.
878 */
879
880 /*
881 * Bring Up Diagnostics error codes.
882 */
883 #define BUD_INITIAL_ERROR 0x0
884 #define BUD_CHECKSUM_ERROR 0x1
885 #define BUD_ADAPTER_RAM_ERROR 0x2
886 #define BUD_INSTRUCTION_ERROR 0x3
887 #define BUD_CONTEXT_ERROR 0x4
888 #define BUD_PROTOCOL_ERROR 0x5
889 #define BUD_INTERFACE_ERROR 0x6
890
891 /* BUD constants */
892 #define BUD_MAX_RETRIES 3
893 #define BUD_MAX_LOOPCNT 6
894 #define BUD_TIMEOUT 3000
895
896 /* Initialization constants */
897 #define INIT_MAX_RETRIES 3 /* Maximum three retries. */
898 #define INIT_MAX_LOOPCNT 22 /* Maximum loop counts. */
899
900 /* RING STATUS field values (high/low) */
901 #define SIGNAL_LOSS 0x0080 /* Loss of signal on the ring
902 * detected.
903 */
904 #define HARD_ERROR 0x0040 /* Transmitting or receiving beacon
905 * frames.
906 */
907 #define SOFT_ERROR 0x0020 /* Report error MAC frame
908 * transmitted.
909 */
910 #define TRANSMIT_BEACON 0x0010 /* Transmitting beacon frames on the
911 * ring.
912 */
913 #define LOBE_WIRE_FAULT 0x0008 /* Open or short circuit in the
914 * cable to concentrator; adapter
915 * closed.
916 */
917 #define AUTO_REMOVAL_ERROR 0x0004 /* Lobe wrap test failed, deinserted;
918 * adapter closed.
919 */
920 #define REMOVE_RECEIVED 0x0001 /* Received a remove ring station MAC
921 * MAC frame request; adapter closed.
922 */
923 #define COUNTER_OVERFLOW 0x8000 /* Overflow of one of the adapters
924 * error counters; READ.ERROR.LOG.
925 */
926 #define SINGLE_STATION 0x4000 /* Adapter is the only station on the
927 * ring.
928 */
929 #define RING_RECOVERY 0x2000 /* Claim token MAC frames on the ring;
930 * reset after ring purge frame.
931 */
932
933 #define ADAPTER_CLOSED (LOBE_WIRE_FAULT | AUTO_REMOVAL_ERROR |\
934 REMOVE_RECEIVED)
935
936 /* Adapter_check_block.Status field bit assignments: */
937 #define DIO_PARITY 0x8000 /* Adapter detects bad parity
938 * through direct I/O access.
939 */
940 #define DMA_READ_ABORT 0x4000 /* Aborting DMA read operation
941 * from system Parm[0]: 0=timeout,
942 * 1=parity error, 2=bus error;
943 * Parm[1]: 32 bit pointer to host
944 * system address at failure.
945 */
946 #define DMA_WRITE_ABORT 0x2000 /* Aborting DMA write operation
947 * to system. (parameters analogous to
948 * DMA_READ_ABORT)
949 */
950 #define ILLEGAL_OP_CODE 0x1000 /* Illegal operation code in the
951 * the adapters firmware Parm[0]-2:
952 * communications processor registers
953 * R13-R15.
954 */
955 #define PARITY_ERRORS 0x0800 /* Adapter detects internal bus
956 * parity error.
957 */
958 #define RAM_DATA_ERROR 0x0080 /* Valid only during RAM testing;
959 * RAM data error Parm[0-1]: 32 bit
960 * pointer to RAM location.
961 */
962 #define RAM_PARITY_ERROR 0x0040 /* Valid only during RAM testing;
963 * RAM parity error Parm[0-1]: 32 bit
964 * pointer to RAM location.
965 */
966 #define RING_UNDERRUN 0x0020 /* Internal DMA underrun when
967 * transmitting onto ring.
968 */
969 #define INVALID_IRQ 0x0008 /* Unrecognized interrupt generated
970 * internal to adapter Parm[0-2]:
971 * adapter register R13-R15.
972 */
973 #define INVALID_ERROR_IRQ 0x0004 /* Unrecognized error interrupt
974 * generated Parm[0-2]: adapter register
975 * R13-R15.
976 */
977 #define INVALID_XOP 0x0002 /* Unrecognized XOP request in
978 * communication processor Parm[0-2]:
979 * adapter register R13-R15.
980 */
981 #define CHECKADDR 0x05E0 /* Adapter check status information
982 * address offset.
983 */
984 #define ROM_PAGE_0 0x0000 /* Adapter ROM page 0. */
985
986 /*
987 * RECEIVE.STATUS interrupt result SSB values: (high-low)
988 * (RECEIVE_COMPLETE field bit definitions in SSB.Parm[0])
989 */
990 #define RX_COMPLETE 0x0080 /* SSB.Parm[0]; SSB.Parm[1]: 32
991 * bit pointer to last RPL.
992 */
993 #define RX_SUSPENDED 0x0040 /* SSB.Parm[0]; SSB.Parm[1]: 32
994 * bit pointer to RPL with odd
995 * forward pointer.
996 */
997
998 /* Valid receive CSTAT: */
999 #define RX_FRAME_CONTROL_BITS (RX_VALID | RX_START_FRAME | RX_END_FRAME | \
1000 RX_FRAME_COMPLETE)
1001 #define VALID_SINGLE_BUFFER_FRAME (RX_START_FRAME | RX_END_FRAME | \
1002 RX_FRAME_COMPLETE)
1003
1004 typedef enum SKB_STAT SKB_STAT;
1005 enum SKB_STAT {
1006 SKB_UNAVAILABLE,
1007 SKB_DMA_DIRECT,
1008 SKB_DATA_COPY
1009 };
1010
1011 /* Receive Parameter List (RPL) The length of the RPLs has to be initialized
1012 * in the OPL. (OPEN parameter list)
1013 */
1014 #define RPL_NUM 3
1015
1016 #define RX_FRAG_NUM 1 /* Maximal number of used fragments in one RPL.
1017 * (up to firmware v2.24: 3, now: up to 9)
1018 */
1019
1020 #pragma pack(1)
1021 typedef struct s_RPL RPL;
1022 struct s_RPL { /* Receive Parameter List */
1023 __be32 NextRPLAddr; /* Pointer to next RPL in chain
1024 * (normalized = physical 32 bit
1025 * address) if pointer is odd: this
1026 * is last RPL. Pointing to itself can
1027 * cause problems!
1028 */
1029 volatile u_int16_t Status; /* Set by creation of Receive Parameter
1030 * List RECEIVE_CSTAT_COMPLETE set by
1031 * adapter in lists that start or end
1032 * a frame.
1033 */
1034 volatile __be16 FrameSize; /* Number of bytes received as a
1035 * frame including AC/FC, Destination,
1036 * Source, Routing field not including
1037 * CRC, FS (Frame Status), End Delimiter
1038 * (valid only if START_FRAME bit in
1039 * CSTAT nonzero) must not be zero in
1040 * any list; maximum value: (BUFFER_SIZE
1041 * - 8) * TX_BUF_MAX sum of DataCount
1042 * values in FragmentList must equal
1043 * Frame_Size value in START_FRAME TPL!
1044 * frame data fragment list
1045 */
1046
1047 /* TPL/RPL size in OPEN parameter list depending on maximal numbers
1048 * of fragments used in one parameter list.
1049 */
1050 Fragment FragList[RX_FRAG_NUM]; /* Maximum: nine frame fragments in
1051 * one TPL. Actual version of firmware:
1052 * 9 fragments possible.
1053 */
1054 #pragma pack()
1055
1056 /* Special proprietary data and precalculations. */
1057 RPL *NextRPLPtr; /* Logical pointer to next RPL in chain. */
1058 unsigned char *MData;
1059 struct sk_buff *Skb;
1060 SKB_STAT SkbStat;
1061 int RPLIndex;
1062 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */
1063 };
1064
1065 /* Information that need to be kept for each board. */
1066 typedef struct net_local {
1067 #pragma pack(1)
1068 IPB ipb; /* Initialization Parameter Block. */
1069 SCB scb; /* System Command Block: system to adapter
1070 * communication.
1071 */
1072 SSB ssb; /* System Status Block: adapter to system
1073 * communication.
1074 */
1075 OPB ocpl; /* Open Options Parameter Block. */
1076
1077 ERRORTAB errorlogtable; /* Adapter statistic error counters.
1078 * (read from adapter memory)
1079 */
1080 unsigned char ProductID[PROD_ID_SIZE + 1]; /* Product ID */
1081 #pragma pack()
1082
1083 TPL Tpl[TPL_NUM];
1084 TPL *TplFree;
1085 TPL *TplBusy;
1086 unsigned char LocalTxBuffers[TPL_NUM][DEFAULT_PACKET_SIZE];
1087
1088 RPL Rpl[RPL_NUM];
1089 RPL *RplHead;
1090 RPL *RplTail;
1091 unsigned char LocalRxBuffers[RPL_NUM][DEFAULT_PACKET_SIZE];
1092
1093 struct device *pdev;
1094 int DataRate;
1095 unsigned char ScbInUse;
1096 unsigned short CMDqueue;
1097
1098 unsigned long AdapterOpenFlag:1;
1099 unsigned long AdapterVirtOpenFlag:1;
1100 unsigned long OpenCommandIssued:1;
1101 unsigned long TransmitCommandActive:1;
1102 unsigned long TransmitHaltScheduled:1;
1103 unsigned long HaltInProgress:1;
1104 unsigned long LobeWireFaultLogged:1;
1105 unsigned long ReOpenInProgress:1;
1106 unsigned long Sleeping:1;
1107
1108 unsigned long LastOpenStatus;
1109 unsigned short CurrentRingStatus;
1110 unsigned long MaxPacketSize;
1111
1112 unsigned long StartTime;
1113 unsigned long LastSendTime;
1114
1115 struct tr_statistics MacStat; /* MAC statistics structure */
1116
1117 unsigned long dmalimit; /* the max DMA address (ie, ISA) */
1118 dma_addr_t dmabuffer; /* the DMA bus address corresponding to
1119 priv. Might be different from virt_to_bus()
1120 for architectures with IO MMU (Alpha) */
1121
1122 struct timer_list timer;
1123
1124 wait_queue_head_t wait_for_tok_int;
1125
1126 INTPTRS intptrs; /* Internal adapter pointer. Must be read
1127 * before OPEN command.
1128 */
1129 unsigned short (*setnselout)(struct net_device *);
1130 unsigned short (*sifreadb)(struct net_device *, unsigned short);
1131 void (*sifwriteb)(struct net_device *, unsigned short, unsigned short);
1132 unsigned short (*sifreadw)(struct net_device *, unsigned short);
1133 void (*sifwritew)(struct net_device *, unsigned short, unsigned short);
1134
1135 spinlock_t lock; /* SMP protection */
1136 void *tmspriv;
1137 } NET_LOCAL;
1138
1139 #endif /* __KERNEL__ */
1140 #endif /* __LINUX_TMS380TR_H */
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