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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / net / ixgb / ixgb_main.c
blob6738b4d097fe6fc4e50058c8a42811e6b7f4a2d4
1 /*******************************************************************************
2
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "ixgb.h"
30
31 char ixgb_driver_name[] = "ixgb";
32 static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
33
34 #ifndef CONFIG_IXGB_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "1.0.126-k4"DRIVERNAPI
40 const char ixgb_driver_version[] = DRV_VERSION;
41 static const char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51 static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63 };
64
65 MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67 /* Local Function Prototypes */
68
69 int ixgb_up(struct ixgb_adapter *adapter);
70 void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71 void ixgb_reset(struct ixgb_adapter *adapter);
72 int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73 int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74 void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75 void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76 void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78 static int ixgb_init_module(void);
79 static void ixgb_exit_module(void);
80 static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81 static void __devexit ixgb_remove(struct pci_dev *pdev);
82 static int ixgb_sw_init(struct ixgb_adapter *adapter);
83 static int ixgb_open(struct net_device *netdev);
84 static int ixgb_close(struct net_device *netdev);
85 static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86 static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87 static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88 static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89 static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90 static void ixgb_set_multi(struct net_device *netdev);
91 static void ixgb_watchdog(unsigned long data);
92 static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93 static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94 static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95 static int ixgb_set_mac(struct net_device *netdev, void *p);
96 static irqreturn_t ixgb_intr(int irq, void *data);
97 static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
98
99 #ifdef CONFIG_IXGB_NAPI
100 static int ixgb_clean(struct napi_struct *napi, int budget);
101 static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103 #else
104 static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105 #endif
106 static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
107 static void ixgb_tx_timeout(struct net_device *dev);
108 static void ixgb_tx_timeout_task(struct work_struct *work);
109 static void ixgb_vlan_rx_register(struct net_device *netdev,
110 struct vlan_group *grp);
111 static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
112 static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
113 static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
114
115 #ifdef CONFIG_NET_POLL_CONTROLLER
116 /* for netdump / net console */
117 static void ixgb_netpoll(struct net_device *dev);
118 #endif
119
120 static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
121 enum pci_channel_state state);
122 static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
123 static void ixgb_io_resume (struct pci_dev *pdev);
124
125 static struct pci_error_handlers ixgb_err_handler = {
126 .error_detected = ixgb_io_error_detected,
127 .slot_reset = ixgb_io_slot_reset,
128 .resume = ixgb_io_resume,
129 };
130
131 static struct pci_driver ixgb_driver = {
132 .name = ixgb_driver_name,
133 .id_table = ixgb_pci_tbl,
134 .probe = ixgb_probe,
135 .remove = __devexit_p(ixgb_remove),
136 .err_handler = &ixgb_err_handler
137 };
138
139 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
140 MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
141 MODULE_LICENSE("GPL");
142 MODULE_VERSION(DRV_VERSION);
143
144 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
145 static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
148
149 /* some defines for controlling descriptor fetches in h/w */
150 #define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
151 #define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
152 * this */
153 #define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
154 * is pushed this many descriptors
155 * from head */
156
157 /**
158 * ixgb_init_module - Driver Registration Routine
159 *
160 * ixgb_init_module is the first routine called when the driver is
161 * loaded. All it does is register with the PCI subsystem.
162 **/
163
164 static int __init
165 ixgb_init_module(void)
166 {
167 printk(KERN_INFO "%s - version %s\n",
168 ixgb_driver_string, ixgb_driver_version);
169
170 printk(KERN_INFO "%s\n", ixgb_copyright);
171
172 return pci_register_driver(&ixgb_driver);
173 }
174
175 module_init(ixgb_init_module);
176
177 /**
178 * ixgb_exit_module - Driver Exit Cleanup Routine
179 *
180 * ixgb_exit_module is called just before the driver is removed
181 * from memory.
182 **/
183
184 static void __exit
185 ixgb_exit_module(void)
186 {
187 pci_unregister_driver(&ixgb_driver);
188 }
189
190 module_exit(ixgb_exit_module);
191
192 /**
193 * ixgb_irq_disable - Mask off interrupt generation on the NIC
194 * @adapter: board private structure
195 **/
196
197 static void
198 ixgb_irq_disable(struct ixgb_adapter *adapter)
199 {
200 atomic_inc(&adapter->irq_sem);
201 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
202 IXGB_WRITE_FLUSH(&adapter->hw);
203 synchronize_irq(adapter->pdev->irq);
204 }
205
206 /**
207 * ixgb_irq_enable - Enable default interrupt generation settings
208 * @adapter: board private structure
209 **/
210
211 static void
212 ixgb_irq_enable(struct ixgb_adapter *adapter)
213 {
214 if(atomic_dec_and_test(&adapter->irq_sem)) {
215 u32 val = IXGB_INT_RXT0 | IXGB_INT_RXDMT0 |
216 IXGB_INT_TXDW | IXGB_INT_LSC;
217 if (adapter->hw.subsystem_vendor_id == SUN_SUBVENDOR_ID)
218 val |= IXGB_INT_GPI0;
219 IXGB_WRITE_REG(&adapter->hw, IMS, val);
220 IXGB_WRITE_FLUSH(&adapter->hw);
221 }
222 }
223
224 int
225 ixgb_up(struct ixgb_adapter *adapter)
226 {
227 struct net_device *netdev = adapter->netdev;
228 int err, irq_flags = IRQF_SHARED;
229 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
230 struct ixgb_hw *hw = &adapter->hw;
231
232 /* hardware has been reset, we need to reload some things */
233
234 ixgb_rar_set(hw, netdev->dev_addr, 0);
235 ixgb_set_multi(netdev);
236
237 ixgb_restore_vlan(adapter);
238
239 ixgb_configure_tx(adapter);
240 ixgb_setup_rctl(adapter);
241 ixgb_configure_rx(adapter);
242 ixgb_alloc_rx_buffers(adapter);
243
244 /* disable interrupts and get the hardware into a known state */
245 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
246
247 /* only enable MSI if bus is in PCI-X mode */
248 if (IXGB_READ_REG(&adapter->hw, STATUS) & IXGB_STATUS_PCIX_MODE) {
249 err = pci_enable_msi(adapter->pdev);
250 if (!err) {
251 adapter->have_msi = 1;
252 irq_flags = 0;
253 }
254 /* proceed to try to request regular interrupt */
255 }
256
257 err = request_irq(adapter->pdev->irq, &ixgb_intr, irq_flags,
258 netdev->name, netdev);
259 if (err) {
260 if (adapter->have_msi)
261 pci_disable_msi(adapter->pdev);
262 DPRINTK(PROBE, ERR,
263 "Unable to allocate interrupt Error: %d\n", err);
264 return err;
265 }
266
267 if((hw->max_frame_size != max_frame) ||
268 (hw->max_frame_size !=
269 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
270
271 hw->max_frame_size = max_frame;
272
273 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
274
275 if(hw->max_frame_size >
276 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
277 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
278
279 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
280 ctrl0 |= IXGB_CTRL0_JFE;
281 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
282 }
283 }
284 }
285
286 mod_timer(&adapter->watchdog_timer, jiffies);
287
288 #ifdef CONFIG_IXGB_NAPI
289 napi_enable(&adapter->napi);
290 #endif
291 ixgb_irq_enable(adapter);
292
293 return 0;
294 }
295
296 void
297 ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
298 {
299 struct net_device *netdev = adapter->netdev;
300
301 #ifdef CONFIG_IXGB_NAPI
302 napi_disable(&adapter->napi);
303 atomic_set(&adapter->irq_sem, 0);
304 #endif
305
306 ixgb_irq_disable(adapter);
307 free_irq(adapter->pdev->irq, netdev);
308
309 if (adapter->have_msi)
310 pci_disable_msi(adapter->pdev);
311
312 if(kill_watchdog)
313 del_timer_sync(&adapter->watchdog_timer);
314
315 adapter->link_speed = 0;
316 adapter->link_duplex = 0;
317 netif_carrier_off(netdev);
318 netif_stop_queue(netdev);
319
320 ixgb_reset(adapter);
321 ixgb_clean_tx_ring(adapter);
322 ixgb_clean_rx_ring(adapter);
323 }
324
325 void
326 ixgb_reset(struct ixgb_adapter *adapter)
327 {
328 struct ixgb_hw *hw = &adapter->hw;
329
330 ixgb_adapter_stop(hw);
331 if (!ixgb_init_hw(hw))
332 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
333
334 /* restore frame size information */
335 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
336 if (hw->max_frame_size >
337 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
338 u32 ctrl0 = IXGB_READ_REG(hw, CTRL0);
339 if (!(ctrl0 & IXGB_CTRL0_JFE)) {
340 ctrl0 |= IXGB_CTRL0_JFE;
341 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
342 }
343 }
344 }
345
346 /**
347 * ixgb_probe - Device Initialization Routine
348 * @pdev: PCI device information struct
349 * @ent: entry in ixgb_pci_tbl
350 *
351 * Returns 0 on success, negative on failure
352 *
353 * ixgb_probe initializes an adapter identified by a pci_dev structure.
354 * The OS initialization, configuring of the adapter private structure,
355 * and a hardware reset occur.
356 **/
357
358 static int __devinit
359 ixgb_probe(struct pci_dev *pdev,
360 const struct pci_device_id *ent)
361 {
362 struct net_device *netdev = NULL;
363 struct ixgb_adapter *adapter;
364 static int cards_found = 0;
365 unsigned long mmio_start;
366 int mmio_len;
367 int pci_using_dac;
368 int i;
369 int err;
370
371 if((err = pci_enable_device(pdev)))
372 return err;
373
374 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
375 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
376 pci_using_dac = 1;
377 } else {
378 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
379 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
380 printk(KERN_ERR
381 "ixgb: No usable DMA configuration, aborting\n");
382 goto err_dma_mask;
383 }
384 pci_using_dac = 0;
385 }
386
387 if((err = pci_request_regions(pdev, ixgb_driver_name)))
388 goto err_request_regions;
389
390 pci_set_master(pdev);
391
392 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
393 if(!netdev) {
394 err = -ENOMEM;
395 goto err_alloc_etherdev;
396 }
397
398 SET_NETDEV_DEV(netdev, &pdev->dev);
399
400 pci_set_drvdata(pdev, netdev);
401 adapter = netdev_priv(netdev);
402 adapter->netdev = netdev;
403 adapter->pdev = pdev;
404 adapter->hw.back = adapter;
405 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
406
407 mmio_start = pci_resource_start(pdev, BAR_0);
408 mmio_len = pci_resource_len(pdev, BAR_0);
409
410 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
411 if(!adapter->hw.hw_addr) {
412 err = -EIO;
413 goto err_ioremap;
414 }
415
416 for(i = BAR_1; i <= BAR_5; i++) {
417 if(pci_resource_len(pdev, i) == 0)
418 continue;
419 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
420 adapter->hw.io_base = pci_resource_start(pdev, i);
421 break;
422 }
423 }
424
425 netdev->open = &ixgb_open;
426 netdev->stop = &ixgb_close;
427 netdev->hard_start_xmit = &ixgb_xmit_frame;
428 netdev->get_stats = &ixgb_get_stats;
429 netdev->set_multicast_list = &ixgb_set_multi;
430 netdev->set_mac_address = &ixgb_set_mac;
431 netdev->change_mtu = &ixgb_change_mtu;
432 ixgb_set_ethtool_ops(netdev);
433 netdev->tx_timeout = &ixgb_tx_timeout;
434 netdev->watchdog_timeo = 5 * HZ;
435 #ifdef CONFIG_IXGB_NAPI
436 netif_napi_add(netdev, &adapter->napi, ixgb_clean, 64);
437 #endif
438 netdev->vlan_rx_register = ixgb_vlan_rx_register;
439 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
440 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
441 #ifdef CONFIG_NET_POLL_CONTROLLER
442 netdev->poll_controller = ixgb_netpoll;
443 #endif
444
445 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
446 netdev->mem_start = mmio_start;
447 netdev->mem_end = mmio_start + mmio_len;
448 netdev->base_addr = adapter->hw.io_base;
449
450 adapter->bd_number = cards_found;
451 adapter->link_speed = 0;
452 adapter->link_duplex = 0;
453
454 /* setup the private structure */
455
456 if((err = ixgb_sw_init(adapter)))
457 goto err_sw_init;
458
459 netdev->features = NETIF_F_SG |
460 NETIF_F_HW_CSUM |
461 NETIF_F_HW_VLAN_TX |
462 NETIF_F_HW_VLAN_RX |
463 NETIF_F_HW_VLAN_FILTER;
464 netdev->features |= NETIF_F_TSO;
465 #ifdef NETIF_F_LLTX
466 netdev->features |= NETIF_F_LLTX;
467 #endif
468
469 if(pci_using_dac)
470 netdev->features |= NETIF_F_HIGHDMA;
471
472 /* make sure the EEPROM is good */
473
474 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
475 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
476 err = -EIO;
477 goto err_eeprom;
478 }
479
480 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
481 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
482
483 if(!is_valid_ether_addr(netdev->perm_addr)) {
484 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
485 err = -EIO;
486 goto err_eeprom;
487 }
488
489 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
490
491 init_timer(&adapter->watchdog_timer);
492 adapter->watchdog_timer.function = &ixgb_watchdog;
493 adapter->watchdog_timer.data = (unsigned long)adapter;
494
495 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
496
497 strcpy(netdev->name, "eth%d");
498 if((err = register_netdev(netdev)))
499 goto err_register;
500
501 /* we're going to reset, so assume we have no link for now */
502
503 netif_carrier_off(netdev);
504 netif_stop_queue(netdev);
505
506 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
507 ixgb_check_options(adapter);
508 /* reset the hardware with the new settings */
509
510 ixgb_reset(adapter);
511
512 cards_found++;
513 return 0;
514
515 err_register:
516 err_sw_init:
517 err_eeprom:
518 iounmap(adapter->hw.hw_addr);
519 err_ioremap:
520 free_netdev(netdev);
521 err_alloc_etherdev:
522 pci_release_regions(pdev);
523 err_request_regions:
524 err_dma_mask:
525 pci_disable_device(pdev);
526 return err;
527 }
528
529 /**
530 * ixgb_remove - Device Removal Routine
531 * @pdev: PCI device information struct
532 *
533 * ixgb_remove is called by the PCI subsystem to alert the driver
534 * that it should release a PCI device. The could be caused by a
535 * Hot-Plug event, or because the driver is going to be removed from
536 * memory.
537 **/
538
539 static void __devexit
540 ixgb_remove(struct pci_dev *pdev)
541 {
542 struct net_device *netdev = pci_get_drvdata(pdev);
543 struct ixgb_adapter *adapter = netdev_priv(netdev);
544
545 unregister_netdev(netdev);
546
547 iounmap(adapter->hw.hw_addr);
548 pci_release_regions(pdev);
549
550 free_netdev(netdev);
551 }
552
553 /**
554 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
555 * @adapter: board private structure to initialize
556 *
557 * ixgb_sw_init initializes the Adapter private data structure.
558 * Fields are initialized based on PCI device information and
559 * OS network device settings (MTU size).
560 **/
561
562 static int __devinit
563 ixgb_sw_init(struct ixgb_adapter *adapter)
564 {
565 struct ixgb_hw *hw = &adapter->hw;
566 struct net_device *netdev = adapter->netdev;
567 struct pci_dev *pdev = adapter->pdev;
568
569 /* PCI config space info */
570
571 hw->vendor_id = pdev->vendor;
572 hw->device_id = pdev->device;
573 hw->subsystem_vendor_id = pdev->subsystem_vendor;
574 hw->subsystem_id = pdev->subsystem_device;
575
576 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
577 adapter->rx_buffer_len = hw->max_frame_size;
578
579 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
580 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
581 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
582 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
583 hw->mac_type = ixgb_82597;
584 else {
585 /* should never have loaded on this device */
586 DPRINTK(PROBE, ERR, "unsupported device id\n");
587 }
588
589 /* enable flow control to be programmed */
590 hw->fc.send_xon = 1;
591
592 atomic_set(&adapter->irq_sem, 1);
593 spin_lock_init(&adapter->tx_lock);
594
595 return 0;
596 }
597
598 /**
599 * ixgb_open - Called when a network interface is made active
600 * @netdev: network interface device structure
601 *
602 * Returns 0 on success, negative value on failure
603 *
604 * The open entry point is called when a network interface is made
605 * active by the system (IFF_UP). At this point all resources needed
606 * for transmit and receive operations are allocated, the interrupt
607 * handler is registered with the OS, the watchdog timer is started,
608 * and the stack is notified that the interface is ready.
609 **/
610
611 static int
612 ixgb_open(struct net_device *netdev)
613 {
614 struct ixgb_adapter *adapter = netdev_priv(netdev);
615 int err;
616
617 /* allocate transmit descriptors */
618
619 if((err = ixgb_setup_tx_resources(adapter)))
620 goto err_setup_tx;
621
622 /* allocate receive descriptors */
623
624 if((err = ixgb_setup_rx_resources(adapter)))
625 goto err_setup_rx;
626
627 if((err = ixgb_up(adapter)))
628 goto err_up;
629
630 return 0;
631
632 err_up:
633 ixgb_free_rx_resources(adapter);
634 err_setup_rx:
635 ixgb_free_tx_resources(adapter);
636 err_setup_tx:
637 ixgb_reset(adapter);
638
639 return err;
640 }
641
642 /**
643 * ixgb_close - Disables a network interface
644 * @netdev: network interface device structure
645 *
646 * Returns 0, this is not allowed to fail
647 *
648 * The close entry point is called when an interface is de-activated
649 * by the OS. The hardware is still under the drivers control, but
650 * needs to be disabled. A global MAC reset is issued to stop the
651 * hardware, and all transmit and receive resources are freed.
652 **/
653
654 static int
655 ixgb_close(struct net_device *netdev)
656 {
657 struct ixgb_adapter *adapter = netdev_priv(netdev);
658
659 ixgb_down(adapter, TRUE);
660
661 ixgb_free_tx_resources(adapter);
662 ixgb_free_rx_resources(adapter);
663
664 return 0;
665 }
666
667 /**
668 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
669 * @adapter: board private structure
670 *
671 * Return 0 on success, negative on failure
672 **/
673
674 int
675 ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
676 {
677 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
678 struct pci_dev *pdev = adapter->pdev;
679 int size;
680
681 size = sizeof(struct ixgb_buffer) * txdr->count;
682 txdr->buffer_info = vmalloc(size);
683 if(!txdr->buffer_info) {
684 DPRINTK(PROBE, ERR,
685 "Unable to allocate transmit descriptor ring memory\n");
686 return -ENOMEM;
687 }
688 memset(txdr->buffer_info, 0, size);
689
690 /* round up to nearest 4K */
691
692 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
693 txdr->size = ALIGN(txdr->size, 4096);
694
695 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
696 if(!txdr->desc) {
697 vfree(txdr->buffer_info);
698 DPRINTK(PROBE, ERR,
699 "Unable to allocate transmit descriptor memory\n");
700 return -ENOMEM;
701 }
702 memset(txdr->desc, 0, txdr->size);
703
704 txdr->next_to_use = 0;
705 txdr->next_to_clean = 0;
706
707 return 0;
708 }
709
710 /**
711 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
712 * @adapter: board private structure
713 *
714 * Configure the Tx unit of the MAC after a reset.
715 **/
716
717 static void
718 ixgb_configure_tx(struct ixgb_adapter *adapter)
719 {
720 uint64_t tdba = adapter->tx_ring.dma;
721 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
722 uint32_t tctl;
723 struct ixgb_hw *hw = &adapter->hw;
724
725 /* Setup the Base and Length of the Tx Descriptor Ring
726 * tx_ring.dma can be either a 32 or 64 bit value
727 */
728
729 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
730 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
731
732 IXGB_WRITE_REG(hw, TDLEN, tdlen);
733
734 /* Setup the HW Tx Head and Tail descriptor pointers */
735
736 IXGB_WRITE_REG(hw, TDH, 0);
737 IXGB_WRITE_REG(hw, TDT, 0);
738
739 /* don't set up txdctl, it induces performance problems if configured
740 * incorrectly */
741 /* Set the Tx Interrupt Delay register */
742
743 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
744
745 /* Program the Transmit Control Register */
746
747 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
748 IXGB_WRITE_REG(hw, TCTL, tctl);
749
750 /* Setup Transmit Descriptor Settings for this adapter */
751 adapter->tx_cmd_type =
752 IXGB_TX_DESC_TYPE
753 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
754 }
755
756 /**
757 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
758 * @adapter: board private structure
759 *
760 * Returns 0 on success, negative on failure
761 **/
762
763 int
764 ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
765 {
766 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
767 struct pci_dev *pdev = adapter->pdev;
768 int size;
769
770 size = sizeof(struct ixgb_buffer) * rxdr->count;
771 rxdr->buffer_info = vmalloc(size);
772 if(!rxdr->buffer_info) {
773 DPRINTK(PROBE, ERR,
774 "Unable to allocate receive descriptor ring\n");
775 return -ENOMEM;
776 }
777 memset(rxdr->buffer_info, 0, size);
778
779 /* Round up to nearest 4K */
780
781 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
782 rxdr->size = ALIGN(rxdr->size, 4096);
783
784 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
785
786 if(!rxdr->desc) {
787 vfree(rxdr->buffer_info);
788 DPRINTK(PROBE, ERR,
789 "Unable to allocate receive descriptors\n");
790 return -ENOMEM;
791 }
792 memset(rxdr->desc, 0, rxdr->size);
793
794 rxdr->next_to_clean = 0;
795 rxdr->next_to_use = 0;
796
797 return 0;
798 }
799
800 /**
801 * ixgb_setup_rctl - configure the receive control register
802 * @adapter: Board private structure
803 **/
804
805 static void
806 ixgb_setup_rctl(struct ixgb_adapter *adapter)
807 {
808 uint32_t rctl;
809
810 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
811
812 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
813
814 rctl |=
815 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
816 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
817 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
818
819 rctl |= IXGB_RCTL_SECRC;
820
821 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
822 rctl |= IXGB_RCTL_BSIZE_2048;
823 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
824 rctl |= IXGB_RCTL_BSIZE_4096;
825 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
826 rctl |= IXGB_RCTL_BSIZE_8192;
827 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
828 rctl |= IXGB_RCTL_BSIZE_16384;
829
830 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
831 }
832
833 /**
834 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
835 * @adapter: board private structure
836 *
837 * Configure the Rx unit of the MAC after a reset.
838 **/
839
840 static void
841 ixgb_configure_rx(struct ixgb_adapter *adapter)
842 {
843 uint64_t rdba = adapter->rx_ring.dma;
844 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
845 struct ixgb_hw *hw = &adapter->hw;
846 uint32_t rctl;
847 uint32_t rxcsum;
848 uint32_t rxdctl;
849
850 /* make sure receives are disabled while setting up the descriptors */
851
852 rctl = IXGB_READ_REG(hw, RCTL);
853 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
854
855 /* set the Receive Delay Timer Register */
856
857 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
858
859 /* Setup the Base and Length of the Rx Descriptor Ring */
860
861 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
862 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
863
864 IXGB_WRITE_REG(hw, RDLEN, rdlen);
865
866 /* Setup the HW Rx Head and Tail Descriptor Pointers */
867 IXGB_WRITE_REG(hw, RDH, 0);
868 IXGB_WRITE_REG(hw, RDT, 0);
869
870 /* set up pre-fetching of receive buffers so we get some before we
871 * run out (default hardware behavior is to run out before fetching
872 * more). This sets up to fetch if HTHRESH rx descriptors are avail
873 * and the descriptors in hw cache are below PTHRESH. This avoids
874 * the hardware behavior of fetching <=512 descriptors in a single
875 * burst that pre-empts all other activity, usually causing fifo
876 * overflows. */
877 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
878 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
879 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
880 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
881 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
882
883 /* Enable Receive Checksum Offload for TCP and UDP */
884 if(adapter->rx_csum == TRUE) {
885 rxcsum = IXGB_READ_REG(hw, RXCSUM);
886 rxcsum |= IXGB_RXCSUM_TUOFL;
887 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
888 }
889
890 /* Enable Receives */
891
892 IXGB_WRITE_REG(hw, RCTL, rctl);
893 }
894
895 /**
896 * ixgb_free_tx_resources - Free Tx Resources
897 * @adapter: board private structure
898 *
899 * Free all transmit software resources
900 **/
901
902 void
903 ixgb_free_tx_resources(struct ixgb_adapter *adapter)
904 {
905 struct pci_dev *pdev = adapter->pdev;
906
907 ixgb_clean_tx_ring(adapter);
908
909 vfree(adapter->tx_ring.buffer_info);
910 adapter->tx_ring.buffer_info = NULL;
911
912 pci_free_consistent(pdev, adapter->tx_ring.size,
913 adapter->tx_ring.desc, adapter->tx_ring.dma);
914
915 adapter->tx_ring.desc = NULL;
916 }
917
918 static void
919 ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
920 struct ixgb_buffer *buffer_info)
921 {
922 struct pci_dev *pdev = adapter->pdev;
923
924 if (buffer_info->dma)
925 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
926 PCI_DMA_TODEVICE);
927
928 if (buffer_info->skb)
929 dev_kfree_skb_any(buffer_info->skb);
930
931 buffer_info->skb = NULL;
932 buffer_info->dma = 0;
933 buffer_info->time_stamp = 0;
934 /* these fields must always be initialized in tx
935 * buffer_info->length = 0;
936 * buffer_info->next_to_watch = 0; */
937 }
938
939 /**
940 * ixgb_clean_tx_ring - Free Tx Buffers
941 * @adapter: board private structure
942 **/
943
944 static void
945 ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
946 {
947 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
948 struct ixgb_buffer *buffer_info;
949 unsigned long size;
950 unsigned int i;
951
952 /* Free all the Tx ring sk_buffs */
953
954 for(i = 0; i < tx_ring->count; i++) {
955 buffer_info = &tx_ring->buffer_info[i];
956 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
957 }
958
959 size = sizeof(struct ixgb_buffer) * tx_ring->count;
960 memset(tx_ring->buffer_info, 0, size);
961
962 /* Zero out the descriptor ring */
963
964 memset(tx_ring->desc, 0, tx_ring->size);
965
966 tx_ring->next_to_use = 0;
967 tx_ring->next_to_clean = 0;
968
969 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
970 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
971 }
972
973 /**
974 * ixgb_free_rx_resources - Free Rx Resources
975 * @adapter: board private structure
976 *
977 * Free all receive software resources
978 **/
979
980 void
981 ixgb_free_rx_resources(struct ixgb_adapter *adapter)
982 {
983 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
984 struct pci_dev *pdev = adapter->pdev;
985
986 ixgb_clean_rx_ring(adapter);
987
988 vfree(rx_ring->buffer_info);
989 rx_ring->buffer_info = NULL;
990
991 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
992
993 rx_ring->desc = NULL;
994 }
995
996 /**
997 * ixgb_clean_rx_ring - Free Rx Buffers
998 * @adapter: board private structure
999 **/
1000
1001 static void
1002 ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1003 {
1004 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1005 struct ixgb_buffer *buffer_info;
1006 struct pci_dev *pdev = adapter->pdev;
1007 unsigned long size;
1008 unsigned int i;
1009
1010 /* Free all the Rx ring sk_buffs */
1011
1012 for(i = 0; i < rx_ring->count; i++) {
1013 buffer_info = &rx_ring->buffer_info[i];
1014 if(buffer_info->skb) {
1015
1016 pci_unmap_single(pdev,
1017 buffer_info->dma,
1018 buffer_info->length,
1019 PCI_DMA_FROMDEVICE);
1020
1021 dev_kfree_skb(buffer_info->skb);
1022
1023 buffer_info->skb = NULL;
1024 }
1025 }
1026
1027 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1028 memset(rx_ring->buffer_info, 0, size);
1029
1030 /* Zero out the descriptor ring */
1031
1032 memset(rx_ring->desc, 0, rx_ring->size);
1033
1034 rx_ring->next_to_clean = 0;
1035 rx_ring->next_to_use = 0;
1036
1037 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1038 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1039 }
1040
1041 /**
1042 * ixgb_set_mac - Change the Ethernet Address of the NIC
1043 * @netdev: network interface device structure
1044 * @p: pointer to an address structure
1045 *
1046 * Returns 0 on success, negative on failure
1047 **/
1048
1049 static int
1050 ixgb_set_mac(struct net_device *netdev, void *p)
1051 {
1052 struct ixgb_adapter *adapter = netdev_priv(netdev);
1053 struct sockaddr *addr = p;
1054
1055 if(!is_valid_ether_addr(addr->sa_data))
1056 return -EADDRNOTAVAIL;
1057
1058 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1059
1060 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1061
1062 return 0;
1063 }
1064
1065 /**
1066 * ixgb_set_multi - Multicast and Promiscuous mode set
1067 * @netdev: network interface device structure
1068 *
1069 * The set_multi entry point is called whenever the multicast address
1070 * list or the network interface flags are updated. This routine is
1071 * responsible for configuring the hardware for proper multicast,
1072 * promiscuous mode, and all-multi behavior.
1073 **/
1074
1075 static void
1076 ixgb_set_multi(struct net_device *netdev)
1077 {
1078 struct ixgb_adapter *adapter = netdev_priv(netdev);
1079 struct ixgb_hw *hw = &adapter->hw;
1080 struct dev_mc_list *mc_ptr;
1081 uint32_t rctl;
1082 int i;
1083
1084 /* Check for Promiscuous and All Multicast modes */
1085
1086 rctl = IXGB_READ_REG(hw, RCTL);
1087
1088 if(netdev->flags & IFF_PROMISC) {
1089 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1090 } else if(netdev->flags & IFF_ALLMULTI) {
1091 rctl |= IXGB_RCTL_MPE;
1092 rctl &= ~IXGB_RCTL_UPE;
1093 } else {
1094 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1095 }
1096
1097 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1098 rctl |= IXGB_RCTL_MPE;
1099 IXGB_WRITE_REG(hw, RCTL, rctl);
1100 } else {
1101 uint8_t mta[IXGB_MAX_NUM_MULTICAST_ADDRESSES *
1102 IXGB_ETH_LENGTH_OF_ADDRESS];
1103
1104 IXGB_WRITE_REG(hw, RCTL, rctl);
1105
1106 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1107 i++, mc_ptr = mc_ptr->next)
1108 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1109 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1110
1111 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1112 }
1113 }
1114
1115 /**
1116 * ixgb_watchdog - Timer Call-back
1117 * @data: pointer to netdev cast into an unsigned long
1118 **/
1119
1120 static void
1121 ixgb_watchdog(unsigned long data)
1122 {
1123 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1124 struct net_device *netdev = adapter->netdev;
1125 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1126
1127 ixgb_check_for_link(&adapter->hw);
1128
1129 if (ixgb_check_for_bad_link(&adapter->hw)) {
1130 /* force the reset path */
1131 netif_stop_queue(netdev);
1132 }
1133
1134 if(adapter->hw.link_up) {
1135 if(!netif_carrier_ok(netdev)) {
1136 DPRINTK(LINK, INFO,
1137 "NIC Link is Up 10000 Mbps Full Duplex\n");
1138 adapter->link_speed = 10000;
1139 adapter->link_duplex = FULL_DUPLEX;
1140 netif_carrier_on(netdev);
1141 netif_wake_queue(netdev);
1142 }
1143 } else {
1144 if(netif_carrier_ok(netdev)) {
1145 adapter->link_speed = 0;
1146 adapter->link_duplex = 0;
1147 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1148 netif_carrier_off(netdev);
1149 netif_stop_queue(netdev);
1150
1151 }
1152 }
1153
1154 ixgb_update_stats(adapter);
1155
1156 if(!netif_carrier_ok(netdev)) {
1157 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1158 /* We've lost link, so the controller stops DMA,
1159 * but we've got queued Tx work that's never going
1160 * to get done, so reset controller to flush Tx.
1161 * (Do the reset outside of interrupt context). */
1162 schedule_work(&adapter->tx_timeout_task);
1163 }
1164 }
1165
1166 /* Force detection of hung controller every watchdog period */
1167 adapter->detect_tx_hung = TRUE;
1168
1169 /* generate an interrupt to force clean up of any stragglers */
1170 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1171
1172 /* Reset the timer */
1173 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1174 }
1175
1176 #define IXGB_TX_FLAGS_CSUM 0x00000001
1177 #define IXGB_TX_FLAGS_VLAN 0x00000002
1178 #define IXGB_TX_FLAGS_TSO 0x00000004
1179
1180 static int
1181 ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1182 {
1183 struct ixgb_context_desc *context_desc;
1184 unsigned int i;
1185 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1186 uint16_t ipcse, tucse, mss;
1187 int err;
1188
1189 if (likely(skb_is_gso(skb))) {
1190 struct ixgb_buffer *buffer_info;
1191 struct iphdr *iph;
1192
1193 if (skb_header_cloned(skb)) {
1194 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1195 if (err)
1196 return err;
1197 }
1198
1199 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1200 mss = skb_shinfo(skb)->gso_size;
1201 iph = ip_hdr(skb);
1202 iph->tot_len = 0;
1203 iph->check = 0;
1204 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1205 iph->daddr, 0,
1206 IPPROTO_TCP, 0);
1207 ipcss = skb_network_offset(skb);
1208 ipcso = (void *)&(iph->check) - (void *)skb->data;
1209 ipcse = skb_transport_offset(skb) - 1;
1210 tucss = skb_transport_offset(skb);
1211 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1212 tucse = 0;
1213
1214 i = adapter->tx_ring.next_to_use;
1215 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1216 buffer_info = &adapter->tx_ring.buffer_info[i];
1217 WARN_ON(buffer_info->dma != 0);
1218
1219 context_desc->ipcss = ipcss;
1220 context_desc->ipcso = ipcso;
1221 context_desc->ipcse = cpu_to_le16(ipcse);
1222 context_desc->tucss = tucss;
1223 context_desc->tucso = tucso;
1224 context_desc->tucse = cpu_to_le16(tucse);
1225 context_desc->mss = cpu_to_le16(mss);
1226 context_desc->hdr_len = hdr_len;
1227 context_desc->status = 0;
1228 context_desc->cmd_type_len = cpu_to_le32(
1229 IXGB_CONTEXT_DESC_TYPE
1230 | IXGB_CONTEXT_DESC_CMD_TSE
1231 | IXGB_CONTEXT_DESC_CMD_IP
1232 | IXGB_CONTEXT_DESC_CMD_TCP
1233 | IXGB_CONTEXT_DESC_CMD_IDE
1234 | (skb->len - (hdr_len)));
1235
1236
1237 if(++i == adapter->tx_ring.count) i = 0;
1238 adapter->tx_ring.next_to_use = i;
1239
1240 return 1;
1241 }
1242
1243 return 0;
1244 }
1245
1246 static boolean_t
1247 ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1248 {
1249 struct ixgb_context_desc *context_desc;
1250 unsigned int i;
1251 uint8_t css, cso;
1252
1253 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1254 struct ixgb_buffer *buffer_info;
1255 css = skb_transport_offset(skb);
1256 cso = css + skb->csum_offset;
1257
1258 i = adapter->tx_ring.next_to_use;
1259 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
1260 buffer_info = &adapter->tx_ring.buffer_info[i];
1261 WARN_ON(buffer_info->dma != 0);
1262
1263 context_desc->tucss = css;
1264 context_desc->tucso = cso;
1265 context_desc->tucse = 0;
1266 /* zero out any previously existing data in one instruction */
1267 *(uint32_t *)&(context_desc->ipcss) = 0;
1268 context_desc->status = 0;
1269 context_desc->hdr_len = 0;
1270 context_desc->mss = 0;
1271 context_desc->cmd_type_len =
1272 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
1273 | IXGB_TX_DESC_CMD_IDE);
1274
1275 if(++i == adapter->tx_ring.count) i = 0;
1276 adapter->tx_ring.next_to_use = i;
1277
1278 return TRUE;
1279 }
1280
1281 return FALSE;
1282 }
1283
1284 #define IXGB_MAX_TXD_PWR 14
1285 #define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1286
1287 static int
1288 ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1289 unsigned int first)
1290 {
1291 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1292 struct ixgb_buffer *buffer_info;
1293 int len = skb->len;
1294 unsigned int offset = 0, size, count = 0, i;
1295 unsigned int mss = skb_shinfo(skb)->gso_size;
1296
1297 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1298 unsigned int f;
1299
1300 len -= skb->data_len;
1301
1302 i = tx_ring->next_to_use;
1303
1304 while(len) {
1305 buffer_info = &tx_ring->buffer_info[i];
1306 size = min(len, IXGB_MAX_DATA_PER_TXD);
1307 /* Workaround for premature desc write-backs
1308 * in TSO mode. Append 4-byte sentinel desc */
1309 if (unlikely(mss && !nr_frags && size == len && size > 8))
1310 size -= 4;
1311
1312 buffer_info->length = size;
1313 WARN_ON(buffer_info->dma != 0);
1314 buffer_info->dma =
1315 pci_map_single(adapter->pdev,
1316 skb->data + offset,
1317 size,
1318 PCI_DMA_TODEVICE);
1319 buffer_info->time_stamp = jiffies;
1320 buffer_info->next_to_watch = 0;
1321
1322 len -= size;
1323 offset += size;
1324 count++;
1325 if(++i == tx_ring->count) i = 0;
1326 }
1327
1328 for(f = 0; f < nr_frags; f++) {
1329 struct skb_frag_struct *frag;
1330
1331 frag = &skb_shinfo(skb)->frags[f];
1332 len = frag->size;
1333 offset = 0;
1334
1335 while(len) {
1336 buffer_info = &tx_ring->buffer_info[i];
1337 size = min(len, IXGB_MAX_DATA_PER_TXD);
1338
1339 /* Workaround for premature desc write-backs
1340 * in TSO mode. Append 4-byte sentinel desc */
1341 if (unlikely(mss && (f == (nr_frags - 1))
1342 && size == len && size > 8))
1343 size -= 4;
1344
1345 buffer_info->length = size;
1346 buffer_info->dma =
1347 pci_map_page(adapter->pdev,
1348 frag->page,
1349 frag->page_offset + offset,
1350 size,
1351 PCI_DMA_TODEVICE);
1352 buffer_info->time_stamp = jiffies;
1353 buffer_info->next_to_watch = 0;
1354
1355 len -= size;
1356 offset += size;
1357 count++;
1358 if(++i == tx_ring->count) i = 0;
1359 }
1360 }
1361 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1362 tx_ring->buffer_info[i].skb = skb;
1363 tx_ring->buffer_info[first].next_to_watch = i;
1364
1365 return count;
1366 }
1367
1368 static void
1369 ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1370 {
1371 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1372 struct ixgb_tx_desc *tx_desc = NULL;
1373 struct ixgb_buffer *buffer_info;
1374 uint32_t cmd_type_len = adapter->tx_cmd_type;
1375 uint8_t status = 0;
1376 uint8_t popts = 0;
1377 unsigned int i;
1378
1379 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1380 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1381 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1382 }
1383
1384 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1385 popts |= IXGB_TX_DESC_POPTS_TXSM;
1386
1387 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1388 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1389 }
1390
1391 i = tx_ring->next_to_use;
1392
1393 while(count--) {
1394 buffer_info = &tx_ring->buffer_info[i];
1395 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1396 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1397 tx_desc->cmd_type_len =
1398 cpu_to_le32(cmd_type_len | buffer_info->length);
1399 tx_desc->status = status;
1400 tx_desc->popts = popts;
1401 tx_desc->vlan = cpu_to_le16(vlan_id);
1402
1403 if(++i == tx_ring->count) i = 0;
1404 }
1405
1406 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1407 | IXGB_TX_DESC_CMD_RS );
1408
1409 /* Force memory writes to complete before letting h/w
1410 * know there are new descriptors to fetch. (Only
1411 * applicable for weak-ordered memory model archs,
1412 * such as IA-64). */
1413 wmb();
1414
1415 tx_ring->next_to_use = i;
1416 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1417 }
1418
1419 static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1420 {
1421 struct ixgb_adapter *adapter = netdev_priv(netdev);
1422 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1423
1424 netif_stop_queue(netdev);
1425 /* Herbert's original patch had:
1426 * smp_mb__after_netif_stop_queue();
1427 * but since that doesn't exist yet, just open code it. */
1428 smp_mb();
1429
1430 /* We need to check again in a case another CPU has just
1431 * made room available. */
1432 if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1433 return -EBUSY;
1434
1435 /* A reprieve! */
1436 netif_start_queue(netdev);
1437 ++adapter->restart_queue;
1438 return 0;
1439 }
1440
1441 static int ixgb_maybe_stop_tx(struct net_device *netdev,
1442 struct ixgb_desc_ring *tx_ring, int size)
1443 {
1444 if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1445 return 0;
1446 return __ixgb_maybe_stop_tx(netdev, size);
1447 }
1448
1449
1450 /* Tx Descriptors needed, worst case */
1451 #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1452 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1453 #define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1454 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1455 + 1 /* one more needed for sentinel TSO workaround */
1456
1457 static int
1458 ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1459 {
1460 struct ixgb_adapter *adapter = netdev_priv(netdev);
1461 unsigned int first;
1462 unsigned int tx_flags = 0;
1463 unsigned long flags;
1464 int vlan_id = 0;
1465 int tso;
1466
1467 if(skb->len <= 0) {
1468 dev_kfree_skb_any(skb);
1469 return 0;
1470 }
1471
1472 #ifdef NETIF_F_LLTX
1473 local_irq_save(flags);
1474 if (!spin_trylock(&adapter->tx_lock)) {
1475 /* Collision - tell upper layer to requeue */
1476 local_irq_restore(flags);
1477 return NETDEV_TX_LOCKED;
1478 }
1479 #else
1480 spin_lock_irqsave(&adapter->tx_lock, flags);
1481 #endif
1482
1483 if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1484 DESC_NEEDED))) {
1485 netif_stop_queue(netdev);
1486 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1487 return NETDEV_TX_BUSY;
1488 }
1489
1490 #ifndef NETIF_F_LLTX
1491 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1492 #endif
1493
1494 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1495 tx_flags |= IXGB_TX_FLAGS_VLAN;
1496 vlan_id = vlan_tx_tag_get(skb);
1497 }
1498
1499 first = adapter->tx_ring.next_to_use;
1500
1501 tso = ixgb_tso(adapter, skb);
1502 if (tso < 0) {
1503 dev_kfree_skb_any(skb);
1504 #ifdef NETIF_F_LLTX
1505 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1506 #endif
1507 return NETDEV_TX_OK;
1508 }
1509
1510 if (likely(tso))
1511 tx_flags |= IXGB_TX_FLAGS_TSO;
1512 else if(ixgb_tx_csum(adapter, skb))
1513 tx_flags |= IXGB_TX_FLAGS_CSUM;
1514
1515 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1516 tx_flags);
1517
1518 netdev->trans_start = jiffies;
1519
1520 #ifdef NETIF_F_LLTX
1521 /* Make sure there is space in the ring for the next send. */
1522 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
1523
1524 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1525
1526 #endif
1527 return NETDEV_TX_OK;
1528 }
1529
1530 /**
1531 * ixgb_tx_timeout - Respond to a Tx Hang
1532 * @netdev: network interface device structure
1533 **/
1534
1535 static void
1536 ixgb_tx_timeout(struct net_device *netdev)
1537 {
1538 struct ixgb_adapter *adapter = netdev_priv(netdev);
1539
1540 /* Do the reset outside of interrupt context */
1541 schedule_work(&adapter->tx_timeout_task);
1542 }
1543
1544 static void
1545 ixgb_tx_timeout_task(struct work_struct *work)
1546 {
1547 struct ixgb_adapter *adapter =
1548 container_of(work, struct ixgb_adapter, tx_timeout_task);
1549
1550 adapter->tx_timeout_count++;
1551 ixgb_down(adapter, TRUE);
1552 ixgb_up(adapter);
1553 }
1554
1555 /**
1556 * ixgb_get_stats - Get System Network Statistics
1557 * @netdev: network interface device structure
1558 *
1559 * Returns the address of the device statistics structure.
1560 * The statistics are actually updated from the timer callback.
1561 **/
1562
1563 static struct net_device_stats *
1564 ixgb_get_stats(struct net_device *netdev)
1565 {
1566 struct ixgb_adapter *adapter = netdev_priv(netdev);
1567
1568 return &adapter->net_stats;
1569 }
1570
1571 /**
1572 * ixgb_change_mtu - Change the Maximum Transfer Unit
1573 * @netdev: network interface device structure
1574 * @new_mtu: new value for maximum frame size
1575 *
1576 * Returns 0 on success, negative on failure
1577 **/
1578
1579 static int
1580 ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1581 {
1582 struct ixgb_adapter *adapter = netdev_priv(netdev);
1583 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1584 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1585
1586
1587 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1588 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
1589 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1590 return -EINVAL;
1591 }
1592
1593 adapter->rx_buffer_len = max_frame;
1594
1595 netdev->mtu = new_mtu;
1596
1597 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1598 ixgb_down(adapter, TRUE);
1599 ixgb_up(adapter);
1600 }
1601
1602 return 0;
1603 }
1604
1605 /**
1606 * ixgb_update_stats - Update the board statistics counters.
1607 * @adapter: board private structure
1608 **/
1609
1610 void
1611 ixgb_update_stats(struct ixgb_adapter *adapter)
1612 {
1613 struct net_device *netdev = adapter->netdev;
1614 struct pci_dev *pdev = adapter->pdev;
1615
1616 /* Prevent stats update while adapter is being reset */
1617 if (pci_channel_offline(pdev))
1618 return;
1619
1620 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1621 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1622 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1623 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1624 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1625 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1626
1627 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1628 /* fix up multicast stats by removing broadcasts */
1629 if(multi >= bcast)
1630 multi -= bcast;
1631
1632 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1633 adapter->stats.mprch += (multi >> 32);
1634 adapter->stats.bprcl += bcast_l;
1635 adapter->stats.bprch += bcast_h;
1636 } else {
1637 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1638 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1639 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1640 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1641 }
1642 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1643 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1644 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1645 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1646 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1647 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1648 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1649 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1650 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1651 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1652 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1653 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1654 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1655 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1656 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1657 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1658 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1659 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1660 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1661 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1662 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1663 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1664 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1665 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1666 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1667 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1668 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1669 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1670 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1671 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1672 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1673 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1674 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1675 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1676 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1677 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1678 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1679 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1680 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1681 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1682 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1683 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1684 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1685 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1686 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1687 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1688 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1689 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1690 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1691 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1692 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1693 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1694 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1695 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1696 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1697 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1698
1699 /* Fill out the OS statistics structure */
1700
1701 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1702 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1703 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1704 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1705 adapter->net_stats.multicast = adapter->stats.mprcl;
1706 adapter->net_stats.collisions = 0;
1707
1708 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1709 * with a length in the type/len field */
1710 adapter->net_stats.rx_errors =
1711 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1712 adapter->stats.ruc +
1713 adapter->stats.roc /*+ adapter->stats.rlec */ +
1714 adapter->stats.icbc +
1715 adapter->stats.ecbc + adapter->stats.mpc;
1716
1717 /* see above
1718 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1719 */
1720
1721 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1722 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1723 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1724 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1725
1726 adapter->net_stats.tx_errors = 0;
1727 adapter->net_stats.rx_frame_errors = 0;
1728 adapter->net_stats.tx_aborted_errors = 0;
1729 adapter->net_stats.tx_carrier_errors = 0;
1730 adapter->net_stats.tx_fifo_errors = 0;
1731 adapter->net_stats.tx_heartbeat_errors = 0;
1732 adapter->net_stats.tx_window_errors = 0;
1733 }
1734
1735 #define IXGB_MAX_INTR 10
1736 /**
1737 * ixgb_intr - Interrupt Handler
1738 * @irq: interrupt number
1739 * @data: pointer to a network interface device structure
1740 **/
1741
1742 static irqreturn_t
1743 ixgb_intr(int irq, void *data)
1744 {
1745 struct net_device *netdev = data;
1746 struct ixgb_adapter *adapter = netdev_priv(netdev);
1747 struct ixgb_hw *hw = &adapter->hw;
1748 uint32_t icr = IXGB_READ_REG(hw, ICR);
1749 #ifndef CONFIG_IXGB_NAPI
1750 unsigned int i;
1751 #endif
1752
1753 if(unlikely(!icr))
1754 return IRQ_NONE; /* Not our interrupt */
1755
1756 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1757 mod_timer(&adapter->watchdog_timer, jiffies);
1758 }
1759
1760 #ifdef CONFIG_IXGB_NAPI
1761 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1762
1763 /* Disable interrupts and register for poll. The flush
1764 of the posted write is intentionally left out.
1765 */
1766
1767 atomic_inc(&adapter->irq_sem);
1768 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1769 __netif_rx_schedule(netdev, &adapter->napi);
1770 }
1771 #else
1772 /* yes, that is actually a & and it is meant to make sure that
1773 * every pass through this for loop checks both receive and
1774 * transmit queues for completed descriptors, intended to
1775 * avoid starvation issues and assist tx/rx fairness. */
1776 for(i = 0; i < IXGB_MAX_INTR; i++)
1777 if(!ixgb_clean_rx_irq(adapter) &
1778 !ixgb_clean_tx_irq(adapter))
1779 break;
1780 #endif
1781 return IRQ_HANDLED;
1782 }
1783
1784 #ifdef CONFIG_IXGB_NAPI
1785 /**
1786 * ixgb_clean - NAPI Rx polling callback
1787 * @adapter: board private structure
1788 **/
1789
1790 static int
1791 ixgb_clean(struct napi_struct *napi, int budget)
1792 {
1793 struct ixgb_adapter *adapter = container_of(napi, struct ixgb_adapter, napi);
1794 struct net_device *netdev = adapter->netdev;
1795 int work_done = 0;
1796
1797 ixgb_clean_tx_irq(adapter);
1798 ixgb_clean_rx_irq(adapter, &work_done, budget);
1799
1800 /* If budget not fully consumed, exit the polling mode */
1801 if (work_done < budget) {
1802 netif_rx_complete(netdev, napi);
1803 ixgb_irq_enable(adapter);
1804 }
1805
1806 return work_done;
1807 }
1808 #endif
1809
1810 /**
1811 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1812 * @adapter: board private structure
1813 **/
1814
1815 static boolean_t
1816 ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1817 {
1818 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1819 struct net_device *netdev = adapter->netdev;
1820 struct ixgb_tx_desc *tx_desc, *eop_desc;
1821 struct ixgb_buffer *buffer_info;
1822 unsigned int i, eop;
1823 boolean_t cleaned = FALSE;
1824
1825 i = tx_ring->next_to_clean;
1826 eop = tx_ring->buffer_info[i].next_to_watch;
1827 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1828
1829 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1830
1831 for(cleaned = FALSE; !cleaned; ) {
1832 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1833 buffer_info = &tx_ring->buffer_info[i];
1834
1835 if (tx_desc->popts
1836 & (IXGB_TX_DESC_POPTS_TXSM |
1837 IXGB_TX_DESC_POPTS_IXSM))
1838 adapter->hw_csum_tx_good++;
1839
1840 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1841
1842 *(uint32_t *)&(tx_desc->status) = 0;
1843
1844 cleaned = (i == eop);
1845 if(++i == tx_ring->count) i = 0;
1846 }
1847
1848 eop = tx_ring->buffer_info[i].next_to_watch;
1849 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1850 }
1851
1852 tx_ring->next_to_clean = i;
1853
1854 if (unlikely(netif_queue_stopped(netdev))) {
1855 spin_lock(&adapter->tx_lock);
1856 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
1857 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
1858 netif_wake_queue(netdev);
1859 spin_unlock(&adapter->tx_lock);
1860 }
1861
1862 if(adapter->detect_tx_hung) {
1863 /* detect a transmit hang in hardware, this serializes the
1864 * check with the clearing of time_stamp and movement of i */
1865 adapter->detect_tx_hung = FALSE;
1866 if (tx_ring->buffer_info[eop].dma &&
1867 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1868 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
1869 IXGB_STATUS_TXOFF)) {
1870 /* detected Tx unit hang */
1871 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1872 " TDH <%x>\n"
1873 " TDT <%x>\n"
1874 " next_to_use <%x>\n"
1875 " next_to_clean <%x>\n"
1876 "buffer_info[next_to_clean]\n"
1877 " time_stamp <%lx>\n"
1878 " next_to_watch <%x>\n"
1879 " jiffies <%lx>\n"
1880 " next_to_watch.status <%x>\n",
1881 IXGB_READ_REG(&adapter->hw, TDH),
1882 IXGB_READ_REG(&adapter->hw, TDT),
1883 tx_ring->next_to_use,
1884 tx_ring->next_to_clean,
1885 tx_ring->buffer_info[eop].time_stamp,
1886 eop,
1887 jiffies,
1888 eop_desc->status);
1889 netif_stop_queue(netdev);
1890 }
1891 }
1892
1893 return cleaned;
1894 }
1895
1896 /**
1897 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1898 * @adapter: board private structure
1899 * @rx_desc: receive descriptor
1900 * @sk_buff: socket buffer with received data
1901 **/
1902
1903 static void
1904 ixgb_rx_checksum(struct ixgb_adapter *adapter,
1905 struct ixgb_rx_desc *rx_desc,
1906 struct sk_buff *skb)
1907 {
1908 /* Ignore Checksum bit is set OR
1909 * TCP Checksum has not been calculated
1910 */
1911 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1912 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1913 skb->ip_summed = CHECKSUM_NONE;
1914 return;
1915 }
1916
1917 /* At this point we know the hardware did the TCP checksum */
1918 /* now look at the TCP checksum error bit */
1919 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1920 /* let the stack verify checksum errors */
1921 skb->ip_summed = CHECKSUM_NONE;
1922 adapter->hw_csum_rx_error++;
1923 } else {
1924 /* TCP checksum is good */
1925 skb->ip_summed = CHECKSUM_UNNECESSARY;
1926 adapter->hw_csum_rx_good++;
1927 }
1928 }
1929
1930 /**
1931 * ixgb_clean_rx_irq - Send received data up the network stack,
1932 * @adapter: board private structure
1933 **/
1934
1935 static boolean_t
1936 #ifdef CONFIG_IXGB_NAPI
1937 ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1938 #else
1939 ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1940 #endif
1941 {
1942 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1943 struct net_device *netdev = adapter->netdev;
1944 struct pci_dev *pdev = adapter->pdev;
1945 struct ixgb_rx_desc *rx_desc, *next_rxd;
1946 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1947 uint32_t length;
1948 unsigned int i, j;
1949 boolean_t cleaned = FALSE;
1950
1951 i = rx_ring->next_to_clean;
1952 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1953 buffer_info = &rx_ring->buffer_info[i];
1954
1955 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
1956 struct sk_buff *skb, *next_skb;
1957 u8 status;
1958
1959 #ifdef CONFIG_IXGB_NAPI
1960 if(*work_done >= work_to_do)
1961 break;
1962
1963 (*work_done)++;
1964 #endif
1965 status = rx_desc->status;
1966 skb = buffer_info->skb;
1967 buffer_info->skb = NULL;
1968
1969 prefetch(skb->data);
1970
1971 if(++i == rx_ring->count) i = 0;
1972 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1973 prefetch(next_rxd);
1974
1975 if((j = i + 1) == rx_ring->count) j = 0;
1976 next2_buffer = &rx_ring->buffer_info[j];
1977 prefetch(next2_buffer);
1978
1979 next_buffer = &rx_ring->buffer_info[i];
1980 next_skb = next_buffer->skb;
1981 prefetch(next_skb);
1982
1983 cleaned = TRUE;
1984
1985 pci_unmap_single(pdev,
1986 buffer_info->dma,
1987 buffer_info->length,
1988 PCI_DMA_FROMDEVICE);
1989
1990 length = le16_to_cpu(rx_desc->length);
1991
1992 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1993
1994 /* All receives must fit into a single buffer */
1995
1996 IXGB_DBG("Receive packet consumed multiple buffers "
1997 "length<%x>\n", length);
1998
1999 dev_kfree_skb_irq(skb);
2000 goto rxdesc_done;
2001 }
2002
2003 if (unlikely(rx_desc->errors
2004 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
2005 | IXGB_RX_DESC_ERRORS_P |
2006 IXGB_RX_DESC_ERRORS_RXE))) {
2007
2008 dev_kfree_skb_irq(skb);
2009 goto rxdesc_done;
2010 }
2011
2012 /* code added for copybreak, this should improve
2013 * performance for small packets with large amounts
2014 * of reassembly being done in the stack */
2015 #define IXGB_CB_LENGTH 256
2016 if (length < IXGB_CB_LENGTH) {
2017 struct sk_buff *new_skb =
2018 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
2019 if (new_skb) {
2020 skb_reserve(new_skb, NET_IP_ALIGN);
2021 skb_copy_to_linear_data_offset(new_skb,
2022 -NET_IP_ALIGN,
2023 (skb->data -
2024 NET_IP_ALIGN),
2025 (length +
2026 NET_IP_ALIGN));
2027 /* save the skb in buffer_info as good */
2028 buffer_info->skb = skb;
2029 skb = new_skb;
2030 }
2031 }
2032 /* end copybreak code */
2033
2034 /* Good Receive */
2035 skb_put(skb, length);
2036
2037 /* Receive Checksum Offload */
2038 ixgb_rx_checksum(adapter, rx_desc, skb);
2039
2040 skb->protocol = eth_type_trans(skb, netdev);
2041 #ifdef CONFIG_IXGB_NAPI
2042 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
2043 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2044 le16_to_cpu(rx_desc->special) &
2045 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2046 } else {
2047 netif_receive_skb(skb);
2048 }
2049 #else /* CONFIG_IXGB_NAPI */
2050 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
2051 vlan_hwaccel_rx(skb, adapter->vlgrp,
2052 le16_to_cpu(rx_desc->special) &
2053 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2054 } else {
2055 netif_rx(skb);
2056 }
2057 #endif /* CONFIG_IXGB_NAPI */
2058 netdev->last_rx = jiffies;
2059
2060 rxdesc_done:
2061 /* clean up descriptor, might be written over by hw */
2062 rx_desc->status = 0;
2063
2064 /* use prefetched values */
2065 rx_desc = next_rxd;
2066 buffer_info = next_buffer;
2067 }
2068
2069 rx_ring->next_to_clean = i;
2070
2071 ixgb_alloc_rx_buffers(adapter);
2072
2073 return cleaned;
2074 }
2075
2076 /**
2077 * ixgb_alloc_rx_buffers - Replace used receive buffers
2078 * @adapter: address of board private structure
2079 **/
2080
2081 static void
2082 ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2083 {
2084 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2085 struct net_device *netdev = adapter->netdev;
2086 struct pci_dev *pdev = adapter->pdev;
2087 struct ixgb_rx_desc *rx_desc;
2088 struct ixgb_buffer *buffer_info;
2089 struct sk_buff *skb;
2090 unsigned int i;
2091 long cleancount;
2092
2093 i = rx_ring->next_to_use;
2094 buffer_info = &rx_ring->buffer_info[i];
2095 cleancount = IXGB_DESC_UNUSED(rx_ring);
2096
2097
2098 /* leave three descriptors unused */
2099 while(--cleancount > 2) {
2100 /* recycle! its good for you */
2101 skb = buffer_info->skb;
2102 if (skb) {
2103 skb_trim(skb, 0);
2104 goto map_skb;
2105 }
2106
2107 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2108 + NET_IP_ALIGN);
2109 if (unlikely(!skb)) {
2110 /* Better luck next round */
2111 adapter->alloc_rx_buff_failed++;
2112 break;
2113 }
2114
2115 /* Make buffer alignment 2 beyond a 16 byte boundary
2116 * this will result in a 16 byte aligned IP header after
2117 * the 14 byte MAC header is removed
2118 */
2119 skb_reserve(skb, NET_IP_ALIGN);
2120
2121 buffer_info->skb = skb;
2122 buffer_info->length = adapter->rx_buffer_len;
2123 map_skb:
2124 buffer_info->dma = pci_map_single(pdev,
2125 skb->data,
2126 adapter->rx_buffer_len,
2127 PCI_DMA_FROMDEVICE);
2128
2129 rx_desc = IXGB_RX_DESC(*rx_ring, i);
2130 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
2131 /* guarantee DD bit not set now before h/w gets descriptor
2132 * this is the rest of the workaround for h/w double
2133 * writeback. */
2134 rx_desc->status = 0;
2135
2136
2137 if(++i == rx_ring->count) i = 0;
2138 buffer_info = &rx_ring->buffer_info[i];
2139 }
2140
2141 if (likely(rx_ring->next_to_use != i)) {
2142 rx_ring->next_to_use = i;
2143 if (unlikely(i-- == 0))
2144 i = (rx_ring->count - 1);
2145
2146 /* Force memory writes to complete before letting h/w
2147 * know there are new descriptors to fetch. (Only
2148 * applicable for weak-ordered memory model archs, such
2149 * as IA-64). */
2150 wmb();
2151 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2152 }
2153 }
2154
2155 /**
2156 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2157 *
2158 * @param netdev network interface device structure
2159 * @param grp indicates to enable or disable tagging/stripping
2160 **/
2161 static void
2162 ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2163 {
2164 struct ixgb_adapter *adapter = netdev_priv(netdev);
2165 uint32_t ctrl, rctl;
2166
2167 ixgb_irq_disable(adapter);
2168 adapter->vlgrp = grp;
2169
2170 if(grp) {
2171 /* enable VLAN tag insert/strip */
2172 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2173 ctrl |= IXGB_CTRL0_VME;
2174 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2175
2176 /* enable VLAN receive filtering */
2177
2178 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2179 rctl |= IXGB_RCTL_VFE;
2180 rctl &= ~IXGB_RCTL_CFIEN;
2181 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2182 } else {
2183 /* disable VLAN tag insert/strip */
2184
2185 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2186 ctrl &= ~IXGB_CTRL0_VME;
2187 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2188
2189 /* disable VLAN filtering */
2190
2191 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2192 rctl &= ~IXGB_RCTL_VFE;
2193 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2194 }
2195
2196 ixgb_irq_enable(adapter);
2197 }
2198
2199 static void
2200 ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2201 {
2202 struct ixgb_adapter *adapter = netdev_priv(netdev);
2203 uint32_t vfta, index;
2204
2205 /* add VID to filter table */
2206
2207 index = (vid >> 5) & 0x7F;
2208 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2209 vfta |= (1 << (vid & 0x1F));
2210 ixgb_write_vfta(&adapter->hw, index, vfta);
2211 }
2212
2213 static void
2214 ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2215 {
2216 struct ixgb_adapter *adapter = netdev_priv(netdev);
2217 uint32_t vfta, index;
2218
2219 ixgb_irq_disable(adapter);
2220
2221 vlan_group_set_device(adapter->vlgrp, vid, NULL);
2222
2223 ixgb_irq_enable(adapter);
2224
2225 /* remove VID from filter table*/
2226
2227 index = (vid >> 5) & 0x7F;
2228 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2229 vfta &= ~(1 << (vid & 0x1F));
2230 ixgb_write_vfta(&adapter->hw, index, vfta);
2231 }
2232
2233 static void
2234 ixgb_restore_vlan(struct ixgb_adapter *adapter)
2235 {
2236 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2237
2238 if(adapter->vlgrp) {
2239 uint16_t vid;
2240 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2241 if(!vlan_group_get_device(adapter->vlgrp, vid))
2242 continue;
2243 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2244 }
2245 }
2246 }
2247
2248 #ifdef CONFIG_NET_POLL_CONTROLLER
2249 /*
2250 * Polling 'interrupt' - used by things like netconsole to send skbs
2251 * without having to re-enable interrupts. It's not called while
2252 * the interrupt routine is executing.
2253 */
2254
2255 static void ixgb_netpoll(struct net_device *dev)
2256 {
2257 struct ixgb_adapter *adapter = netdev_priv(dev);
2258
2259 disable_irq(adapter->pdev->irq);
2260 ixgb_intr(adapter->pdev->irq, dev);
2261 enable_irq(adapter->pdev->irq);
2262 }
2263 #endif
2264
2265 /**
2266 * ixgb_io_error_detected() - called when PCI error is detected
2267 * @pdev pointer to pci device with error
2268 * @state pci channel state after error
2269 *
2270 * This callback is called by the PCI subsystem whenever
2271 * a PCI bus error is detected.
2272 */
2273 static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2274 enum pci_channel_state state)
2275 {
2276 struct net_device *netdev = pci_get_drvdata(pdev);
2277 struct ixgb_adapter *adapter = netdev_priv(netdev);
2278
2279 if(netif_running(netdev))
2280 ixgb_down(adapter, TRUE);
2281
2282 pci_disable_device(pdev);
2283
2284 /* Request a slot reset. */
2285 return PCI_ERS_RESULT_NEED_RESET;
2286 }
2287
2288 /**
2289 * ixgb_io_slot_reset - called after the pci bus has been reset.
2290 * @pdev pointer to pci device with error
2291 *
2292 * This callback is called after the PCI buss has been reset.
2293 * Basically, this tries to restart the card from scratch.
2294 * This is a shortened version of the device probe/discovery code,
2295 * it resembles the first-half of the ixgb_probe() routine.
2296 */
2297 static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2298 {
2299 struct net_device *netdev = pci_get_drvdata(pdev);
2300 struct ixgb_adapter *adapter = netdev_priv(netdev);
2301
2302 if(pci_enable_device(pdev)) {
2303 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2304 return PCI_ERS_RESULT_DISCONNECT;
2305 }
2306
2307 /* Perform card reset only on one instance of the card */
2308 if (0 != PCI_FUNC (pdev->devfn))
2309 return PCI_ERS_RESULT_RECOVERED;
2310
2311 pci_set_master(pdev);
2312
2313 netif_carrier_off(netdev);
2314 netif_stop_queue(netdev);
2315 ixgb_reset(adapter);
2316
2317 /* Make sure the EEPROM is good */
2318 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2319 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2320 return PCI_ERS_RESULT_DISCONNECT;
2321 }
2322 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2323 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2324
2325 if(!is_valid_ether_addr(netdev->perm_addr)) {
2326 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2327 return PCI_ERS_RESULT_DISCONNECT;
2328 }
2329
2330 return PCI_ERS_RESULT_RECOVERED;
2331 }
2332
2333 /**
2334 * ixgb_io_resume - called when its OK to resume normal operations
2335 * @pdev pointer to pci device with error
2336 *
2337 * The error recovery driver tells us that its OK to resume
2338 * normal operation. Implementation resembles the second-half
2339 * of the ixgb_probe() routine.
2340 */
2341 static void ixgb_io_resume (struct pci_dev *pdev)
2342 {
2343 struct net_device *netdev = pci_get_drvdata(pdev);
2344 struct ixgb_adapter *adapter = netdev_priv(netdev);
2345
2346 pci_set_master(pdev);
2347
2348 if(netif_running(netdev)) {
2349 if(ixgb_up(adapter)) {
2350 printk ("ixgb: can't bring device back up after reset\n");
2351 return;
2352 }
2353 }
2354
2355 netif_device_attach(netdev);
2356 mod_timer(&adapter->watchdog_timer, jiffies);
2357 }
2358
2359 /* ixgb_main.c */
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