Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / media / video / ivtv / ivtv-driver.h
blob536140f0c19efb6eabd9f8673857c742a3a7a600
1 /*
2 ivtv driver internal defines and structures
3 Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
4 Copyright (C) 2004 Chris Kennedy <c@groovy.org>
5 Copyright (C) 2005-2007 Hans Verkuil <hverkuil@xs4all.nl>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #ifndef IVTV_DRIVER_H
23 #define IVTV_DRIVER_H
25 /* Internal header for ivtv project:
26 * Driver for the cx23415/6 chip.
27 * Author: Kevin Thayer (nufan_wfk at yahoo.com)
28 * License: GPL
29 * http://www.ivtvdriver.org
31 * -----
32 * MPG600/MPG160 support by T.Adachi <tadachi@tadachi-net.com>
33 * and Takeru KOMORIYA<komoriya@paken.org>
35 * AVerMedia M179 GPIO info by Chris Pinkham <cpinkham@bc2va.org>
36 * using information provided by Jiun-Kuei Jung @ AVerMedia.
39 #include <linux/version.h>
40 #include <linux/module.h>
41 #include <linux/init.h>
42 #include <linux/delay.h>
43 #include <linux/sched.h>
44 #include <linux/fs.h>
45 #include <linux/pci.h>
46 #include <linux/interrupt.h>
47 #include <linux/spinlock.h>
48 #include <linux/i2c.h>
49 #include <linux/i2c-algo-bit.h>
50 #include <linux/list.h>
51 #include <linux/unistd.h>
52 #include <linux/byteorder/swab.h>
53 #include <linux/pagemap.h>
54 #include <linux/scatterlist.h>
55 #include <linux/workqueue.h>
56 #include <linux/mutex.h>
57 #include <asm/uaccess.h>
58 #include <asm/system.h>
60 #include <linux/dvb/video.h>
61 #include <linux/dvb/audio.h>
62 #include <media/v4l2-common.h>
63 #include <media/tuner.h>
64 #include <media/cx2341x.h>
66 #include <linux/ivtv.h>
68 /* Memory layout */
69 #define IVTV_ENCODER_OFFSET 0x00000000
70 #define IVTV_ENCODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
71 #define IVTV_DECODER_OFFSET 0x01000000
72 #define IVTV_DECODER_SIZE 0x00800000 /* Total size is 0x01000000, but only first half is used */
73 #define IVTV_REG_OFFSET 0x02000000
74 #define IVTV_REG_SIZE 0x00010000
76 /* Maximum ivtv driver instances. Some people have a huge number of
77 capture cards, so set this to a high value. */
78 #define IVTV_MAX_CARDS 32
80 #define IVTV_ENC_STREAM_TYPE_MPG 0
81 #define IVTV_ENC_STREAM_TYPE_YUV 1
82 #define IVTV_ENC_STREAM_TYPE_VBI 2
83 #define IVTV_ENC_STREAM_TYPE_PCM 3
84 #define IVTV_ENC_STREAM_TYPE_RAD 4
85 #define IVTV_DEC_STREAM_TYPE_MPG 5
86 #define IVTV_DEC_STREAM_TYPE_VBI 6
87 #define IVTV_DEC_STREAM_TYPE_VOUT 7
88 #define IVTV_DEC_STREAM_TYPE_YUV 8
89 #define IVTV_MAX_STREAMS 9
91 #define IVTV_DMA_SG_OSD_ENT (2883584/PAGE_SIZE) /* sg entities */
93 /* DMA Registers */
94 #define IVTV_REG_DMAXFER (0x0000)
95 #define IVTV_REG_DMASTATUS (0x0004)
96 #define IVTV_REG_DECDMAADDR (0x0008)
97 #define IVTV_REG_ENCDMAADDR (0x000c)
98 #define IVTV_REG_DMACONTROL (0x0010)
99 #define IVTV_REG_IRQSTATUS (0x0040)
100 #define IVTV_REG_IRQMASK (0x0048)
102 /* Setup Registers */
103 #define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8)
104 #define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC)
105 #define IVTV_REG_DEC_SDRAM_REFRESH (0x08F8)
106 #define IVTV_REG_DEC_SDRAM_PRECHARGE (0x08FC)
107 #define IVTV_REG_VDM (0x2800)
108 #define IVTV_REG_AO (0x2D00)
109 #define IVTV_REG_BYTEFLUSH (0x2D24)
110 #define IVTV_REG_SPU (0x9050)
111 #define IVTV_REG_HW_BLOCKS (0x9054)
112 #define IVTV_REG_VPU (0x9058)
113 #define IVTV_REG_APU (0xA064)
115 /* i2c stuff */
116 #define I2C_CLIENTS_MAX 16
118 /* debugging */
119 extern int ivtv_debug;
121 #define IVTV_DBGFLG_WARN (1 << 0)
122 #define IVTV_DBGFLG_INFO (1 << 1)
123 #define IVTV_DBGFLG_MB (1 << 2)
124 #define IVTV_DBGFLG_IOCTL (1 << 3)
125 #define IVTV_DBGFLG_FILE (1 << 4)
126 #define IVTV_DBGFLG_DMA (1 << 5)
127 #define IVTV_DBGFLG_IRQ (1 << 6)
128 #define IVTV_DBGFLG_DEC (1 << 7)
129 #define IVTV_DBGFLG_YUV (1 << 8)
130 #define IVTV_DBGFLG_I2C (1 << 9)
131 /* Flag to turn on high volume debugging */
132 #define IVTV_DBGFLG_HIGHVOL (1 << 10)
134 /* NOTE: extra space before comma in 'itv->num , ## args' is required for
135 gcc-2.95, otherwise it won't compile. */
136 #define IVTV_DEBUG(x, type, fmt, args...) \
137 do { \
138 if ((x) & ivtv_debug) \
139 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
140 } while (0)
141 #define IVTV_DEBUG_WARN(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
142 #define IVTV_DEBUG_INFO(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_INFO, "info", fmt , ## args)
143 #define IVTV_DEBUG_MB(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_MB, "mb", fmt , ## args)
144 #define IVTV_DEBUG_DMA(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
145 #define IVTV_DEBUG_IOCTL(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
146 #define IVTV_DEBUG_FILE(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_FILE, "file", fmt , ## args)
147 #define IVTV_DEBUG_I2C(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
148 #define IVTV_DEBUG_IRQ(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
149 #define IVTV_DEBUG_DEC(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
150 #define IVTV_DEBUG_YUV(fmt, args...) IVTV_DEBUG(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
152 #define IVTV_DEBUG_HIGH_VOL(x, type, fmt, args...) \
153 do { \
154 if (((x) & ivtv_debug) && (ivtv_debug & IVTV_DBGFLG_HIGHVOL)) \
155 printk(KERN_INFO "ivtv%d " type ": " fmt, itv->num , ## args); \
156 } while (0)
157 #define IVTV_DEBUG_HI_WARN(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_WARN, "warn", fmt , ## args)
158 #define IVTV_DEBUG_HI_INFO(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_INFO, "info", fmt , ## args)
159 #define IVTV_DEBUG_HI_MB(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_MB, "mb", fmt , ## args)
160 #define IVTV_DEBUG_HI_DMA(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DMA, "dma", fmt , ## args)
161 #define IVTV_DEBUG_HI_IOCTL(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IOCTL, "ioctl", fmt , ## args)
162 #define IVTV_DEBUG_HI_FILE(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_FILE, "file", fmt , ## args)
163 #define IVTV_DEBUG_HI_I2C(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_I2C, "i2c", fmt , ## args)
164 #define IVTV_DEBUG_HI_IRQ(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_IRQ, "irq", fmt , ## args)
165 #define IVTV_DEBUG_HI_DEC(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_DEC, "dec", fmt , ## args)
166 #define IVTV_DEBUG_HI_YUV(fmt, args...) IVTV_DEBUG_HIGH_VOL(IVTV_DBGFLG_YUV, "yuv", fmt , ## args)
168 /* Standard kernel messages */
169 #define IVTV_ERR(fmt, args...) printk(KERN_ERR "ivtv%d: " fmt, itv->num , ## args)
170 #define IVTV_WARN(fmt, args...) printk(KERN_WARNING "ivtv%d: " fmt, itv->num , ## args)
171 #define IVTV_INFO(fmt, args...) printk(KERN_INFO "ivtv%d: " fmt, itv->num , ## args)
173 /* output modes (cx23415 only) */
174 #define OUT_NONE 0
175 #define OUT_MPG 1
176 #define OUT_YUV 2
177 #define OUT_UDMA_YUV 3
178 #define OUT_PASSTHROUGH 4
180 #define IVTV_MAX_PGM_INDEX (400)
182 struct ivtv_options {
183 int kilobytes[IVTV_MAX_STREAMS]; /* size in kilobytes of each stream */
184 int cardtype; /* force card type on load */
185 int tuner; /* set tuner on load */
186 int radio; /* enable/disable radio */
187 int newi2c; /* new I2C algorithm */
190 /* ivtv-specific mailbox template */
191 struct ivtv_mailbox {
192 u32 flags;
193 u32 cmd;
194 u32 retval;
195 u32 timeout;
196 u32 data[CX2341X_MBOX_MAX_DATA];
199 struct ivtv_api_cache {
200 unsigned long last_jiffies; /* when last command was issued */
201 u32 data[CX2341X_MBOX_MAX_DATA]; /* last sent api data */
204 struct ivtv_mailbox_data {
205 volatile struct ivtv_mailbox __iomem *mbox;
206 /* Bits 0-2 are for the encoder mailboxes, 0-1 are for the decoder mailboxes.
207 If the bit is set, then the corresponding mailbox is in use by the driver. */
208 unsigned long busy;
209 u8 max_mbox;
212 /* per-buffer bit flags */
213 #define IVTV_F_B_NEED_BUF_SWAP (1 << 0) /* this buffer should be byte swapped */
215 /* per-stream, s_flags */
216 #define IVTV_F_S_DMA_PENDING 0 /* this stream has pending DMA */
217 #define IVTV_F_S_DMA_HAS_VBI 1 /* the current DMA request also requests VBI data */
218 #define IVTV_F_S_NEEDS_DATA 2 /* this decoding stream needs more data */
220 #define IVTV_F_S_CLAIMED 3 /* this stream is claimed */
221 #define IVTV_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
222 #define IVTV_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
223 #define IVTV_F_S_PASSTHROUGH 6 /* this stream is in passthrough mode */
224 #define IVTV_F_S_STREAMOFF 7 /* signal end of stream EOS */
225 #define IVTV_F_S_APPL_IO 8 /* this stream is used read/written by an application */
227 #define IVTV_F_S_PIO_PENDING 9 /* this stream has pending PIO */
228 #define IVTV_F_S_PIO_HAS_VBI 1 /* the current PIO request also requests VBI data */
230 /* per-ivtv, i_flags */
231 #define IVTV_F_I_DMA 0 /* DMA in progress */
232 #define IVTV_F_I_UDMA 1 /* UDMA in progress */
233 #define IVTV_F_I_UDMA_PENDING 2 /* UDMA pending */
234 #define IVTV_F_I_SPEED_CHANGE 3 /* a speed change is in progress */
235 #define IVTV_F_I_EOS 4 /* end of encoder stream reached */
236 #define IVTV_F_I_RADIO_USER 5 /* the radio tuner is selected */
237 #define IVTV_F_I_DIG_RST 6 /* reset digitizer */
238 #define IVTV_F_I_DEC_YUV 7 /* YUV instead of MPG is being decoded */
239 #define IVTV_F_I_UPDATE_CC 9 /* CC should be updated */
240 #define IVTV_F_I_UPDATE_WSS 10 /* WSS should be updated */
241 #define IVTV_F_I_UPDATE_VPS 11 /* VPS should be updated */
242 #define IVTV_F_I_DECODING_YUV 12 /* this stream is YUV frame decoding */
243 #define IVTV_F_I_ENC_PAUSED 13 /* the encoder is paused */
244 #define IVTV_F_I_VALID_DEC_TIMINGS 14 /* last_dec_timing is valid */
245 #define IVTV_F_I_HAVE_WORK 15 /* used in the interrupt handler: there is work to be done */
246 #define IVTV_F_I_WORK_HANDLER_VBI 16 /* there is work to be done for VBI */
247 #define IVTV_F_I_WORK_HANDLER_YUV 17 /* there is work to be done for YUV */
248 #define IVTV_F_I_WORK_HANDLER_PIO 18 /* there is work to be done for PIO */
249 #define IVTV_F_I_PIO 19 /* PIO in progress */
250 #define IVTV_F_I_DEC_PAUSED 20 /* the decoder is paused */
251 #define IVTV_F_I_INITED 21 /* set after first open */
252 #define IVTV_F_I_FAILED 22 /* set if first open failed */
254 /* Event notifications */
255 #define IVTV_F_I_EV_DEC_STOPPED 28 /* decoder stopped event */
256 #define IVTV_F_I_EV_VSYNC 29 /* VSYNC event */
257 #define IVTV_F_I_EV_VSYNC_FIELD 30 /* VSYNC event field (0 = first, 1 = second field) */
258 #define IVTV_F_I_EV_VSYNC_ENABLED 31 /* VSYNC event enabled */
260 /* Scatter-Gather array element, used in DMA transfers */
261 struct ivtv_sg_element {
262 u32 src;
263 u32 dst;
264 u32 size;
267 struct ivtv_user_dma {
268 struct mutex lock;
269 int page_count;
270 struct page *map[IVTV_DMA_SG_OSD_ENT];
271 /* Needed when dealing with highmem userspace buffers */
272 struct page *bouncemap[IVTV_DMA_SG_OSD_ENT];
274 /* Base Dev SG Array for cx23415/6 */
275 struct ivtv_sg_element SGarray[IVTV_DMA_SG_OSD_ENT];
276 dma_addr_t SG_handle;
277 int SG_length;
279 /* SG List of Buffers */
280 struct scatterlist SGlist[IVTV_DMA_SG_OSD_ENT];
283 struct ivtv_dma_page_info {
284 unsigned long uaddr;
285 unsigned long first;
286 unsigned long last;
287 unsigned int offset;
288 unsigned int tail;
289 int page_count;
292 struct ivtv_buffer {
293 struct list_head list;
294 dma_addr_t dma_handle;
295 unsigned short b_flags;
296 unsigned short dma_xfer_cnt;
297 char *buf;
298 u32 bytesused;
299 u32 readpos;
302 struct ivtv_queue {
303 struct list_head list; /* the list of buffers in this queue */
304 u32 buffers; /* number of buffers in this queue */
305 u32 length; /* total number of bytes of available buffer space */
306 u32 bytesused; /* total number of bytes used in this queue */
309 struct ivtv; /* forward reference */
311 struct ivtv_stream {
312 /* These first four fields are always set, even if the stream
313 is not actually created. */
314 struct video_device *v4l2dev; /* NULL when stream not created */
315 struct ivtv *itv; /* for ease of use */
316 const char *name; /* name of the stream */
317 int type; /* stream type */
319 u32 id;
320 spinlock_t qlock; /* locks access to the queues */
321 unsigned long s_flags; /* status flags, see above */
322 int dma; /* can be PCI_DMA_TODEVICE, PCI_DMA_FROMDEVICE or PCI_DMA_NONE */
323 u32 pending_offset;
324 u32 pending_backup;
325 u64 pending_pts;
327 u32 dma_offset;
328 u32 dma_backup;
329 u64 dma_pts;
331 int subtype;
332 wait_queue_head_t waitq;
333 u32 dma_last_offset;
335 /* Buffer Stats */
336 u32 buffers;
337 u32 buf_size;
338 u32 buffers_stolen;
340 /* Buffer Queues */
341 struct ivtv_queue q_free; /* free buffers */
342 struct ivtv_queue q_full; /* full buffers */
343 struct ivtv_queue q_io; /* waiting for I/O */
344 struct ivtv_queue q_dma; /* waiting for DMA */
345 struct ivtv_queue q_predma; /* waiting for DMA */
347 /* DMA xfer counter, buffers belonging to the same DMA
348 xfer will have the same dma_xfer_cnt. */
349 u16 dma_xfer_cnt;
351 /* Base Dev SG Array for cx23415/6 */
352 struct ivtv_sg_element *sg_pending;
353 struct ivtv_sg_element *sg_processing;
354 struct ivtv_sg_element *sg_dma;
355 dma_addr_t sg_handle;
356 int sg_pending_size;
357 int sg_processing_size;
358 int sg_processed;
360 /* SG List of Buffers */
361 struct scatterlist *SGlist;
364 struct ivtv_open_id {
365 u32 open_id; /* unique ID for this file descriptor */
366 int type; /* stream type */
367 int yuv_frames; /* 1: started OUT_UDMA_YUV output mode */
368 enum v4l2_priority prio; /* priority */
369 struct ivtv *itv;
372 struct yuv_frame_info
374 u32 update;
375 s32 src_x;
376 s32 src_y;
377 u32 src_w;
378 u32 src_h;
379 s32 dst_x;
380 s32 dst_y;
381 u32 dst_w;
382 u32 dst_h;
383 s32 pan_x;
384 s32 pan_y;
385 u32 vis_w;
386 u32 vis_h;
387 u32 interlaced_y;
388 u32 interlaced_uv;
389 s32 tru_x;
390 u32 tru_w;
391 u32 tru_h;
392 u32 offset_y;
393 s32 lace_mode;
394 u32 sync_field;
395 u32 delay;
396 u32 interlaced;
399 #define IVTV_YUV_MODE_INTERLACED 0x00
400 #define IVTV_YUV_MODE_PROGRESSIVE 0x01
401 #define IVTV_YUV_MODE_AUTO 0x02
402 #define IVTV_YUV_MODE_MASK 0x03
404 #define IVTV_YUV_SYNC_EVEN 0x00
405 #define IVTV_YUV_SYNC_ODD 0x04
406 #define IVTV_YUV_SYNC_MASK 0x04
408 #define IVTV_YUV_BUFFERS 8
410 struct yuv_playback_info
412 u32 reg_2834;
413 u32 reg_2838;
414 u32 reg_283c;
415 u32 reg_2840;
416 u32 reg_2844;
417 u32 reg_2848;
418 u32 reg_2854;
419 u32 reg_285c;
420 u32 reg_2864;
422 u32 reg_2870;
423 u32 reg_2874;
424 u32 reg_2890;
425 u32 reg_2898;
426 u32 reg_289c;
428 u32 reg_2918;
429 u32 reg_291c;
430 u32 reg_2920;
431 u32 reg_2924;
432 u32 reg_2928;
433 u32 reg_292c;
434 u32 reg_2930;
436 u32 reg_2934;
438 u32 reg_2938;
439 u32 reg_293c;
440 u32 reg_2940;
441 u32 reg_2944;
442 u32 reg_2948;
443 u32 reg_294c;
444 u32 reg_2950;
445 u32 reg_2954;
446 u32 reg_2958;
447 u32 reg_295c;
448 u32 reg_2960;
449 u32 reg_2964;
450 u32 reg_2968;
451 u32 reg_296c;
453 u32 reg_2970;
455 int v_filter_1;
456 int v_filter_2;
457 int h_filter;
459 u32 osd_x_offset;
460 u32 osd_y_offset;
462 u32 osd_x_pan;
463 u32 osd_y_pan;
465 u32 osd_vis_w;
466 u32 osd_vis_h;
468 u32 osd_full_w;
469 u32 osd_full_h;
471 int decode_height;
473 int lace_mode;
474 int lace_threshold;
475 int lace_sync_field;
477 atomic_t next_dma_frame;
478 atomic_t next_fill_frame;
480 u32 yuv_forced_update;
481 int update_frame;
483 u8 fields_lapsed; /* Counter used when delaying a frame */
485 struct yuv_frame_info new_frame_info[IVTV_YUV_BUFFERS];
486 struct yuv_frame_info old_frame_info;
487 struct yuv_frame_info old_frame_info_args;
489 void *blanking_ptr;
490 dma_addr_t blanking_dmaptr;
492 int stream_size;
494 u8 draw_frame; /* PVR350 buffer to draw into */
495 u8 max_frames_buffered; /* Maximum number of frames to buffer */
497 struct v4l2_rect main_rect;
498 u32 v4l2_src_w;
499 u32 v4l2_src_h;
502 #define IVTV_VBI_FRAMES 32
504 /* VBI data */
505 struct vbi_cc {
506 u8 odd[2]; /* two-byte payload of odd field */
507 u8 even[2]; /* two-byte payload of even field */;
510 struct vbi_vps {
511 u8 data[5]; /* five-byte VPS payload */
514 struct vbi_info {
515 /* VBI general data, does not change during streaming */
517 u32 raw_decoder_line_size; /* raw VBI line size from digitizer */
518 u8 raw_decoder_sav_odd_field; /* raw VBI Start Active Video digitizer code of odd field */
519 u8 raw_decoder_sav_even_field; /* raw VBI Start Active Video digitizer code of even field */
520 u32 sliced_decoder_line_size; /* sliced VBI line size from digitizer */
521 u8 sliced_decoder_sav_odd_field; /* sliced VBI Start Active Video digitizer code of odd field */
522 u8 sliced_decoder_sav_even_field; /* sliced VBI Start Active Video digitizer code of even field */
524 u32 start[2]; /* start of first VBI line in the odd/even fields */
525 u32 count; /* number of VBI lines per field */
526 u32 raw_size; /* size of raw VBI line from the digitizer */
527 u32 sliced_size; /* size of sliced VBI line from the digitizer */
529 u32 dec_start; /* start in decoder memory of VBI re-insertion buffers */
530 u32 enc_start; /* start in encoder memory of VBI capture buffers */
531 u32 enc_size; /* size of VBI capture area */
532 int fpi; /* number of VBI frames per interrupt */
534 struct v4l2_format in; /* current VBI capture format */
535 struct v4l2_sliced_vbi_format *sliced_in; /* convenience pointer to sliced struct in vbi.in union */
536 int insert_mpeg; /* if non-zero, then embed VBI data in MPEG stream */
538 /* Raw VBI compatibility hack */
540 u32 frame; /* frame counter hack needed for backwards compatibility
541 of old VBI software */
543 /* Sliced VBI output data */
545 struct vbi_cc cc_payload[256]; /* sliced VBI CC payload array: it is an array to
546 prevent dropping CC data if they couldn't be
547 processed fast enough */
548 int cc_payload_idx; /* index in cc_payload */
549 u8 cc_missing_cnt; /* counts number of frames without CC for passthrough mode */
550 int wss_payload; /* sliced VBI WSS payload */
551 u8 wss_missing_cnt; /* counts number of frames without WSS for passthrough mode */
552 struct vbi_vps vps_payload; /* sliced VBI VPS payload */
554 /* Sliced VBI capture data */
556 struct v4l2_sliced_vbi_data sliced_data[36]; /* sliced VBI storage for VBI encoder stream */
557 struct v4l2_sliced_vbi_data sliced_dec_data[36];/* sliced VBI storage for VBI decoder stream */
559 /* VBI Embedding data */
561 /* Buffer for VBI data inserted into MPEG stream.
562 The first byte is a dummy byte that's never used.
563 The next 16 bytes contain the MPEG header for the VBI data,
564 the remainder is the actual VBI data.
565 The max size accepted by the MPEG VBI reinsertion turns out
566 to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes,
567 where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is
568 a single line header byte and 2 * 18 is the number of VBI lines per frame.
570 However, it seems that the data must be 1K aligned, so we have to
571 pad the data until the 1 or 2 K boundary.
573 This pointer array will allocate 2049 bytes to store each VBI frame. */
574 u8 *sliced_mpeg_data[IVTV_VBI_FRAMES];
575 u32 sliced_mpeg_size[IVTV_VBI_FRAMES];
576 struct ivtv_buffer sliced_mpeg_buf; /* temporary buffer holding data from sliced_mpeg_data */
577 u32 inserted_frame; /* index in sliced_mpeg_size of next sliced data
578 to be inserted in the MPEG stream */
581 /* forward declaration of struct defined in ivtv-cards.h */
582 struct ivtv_card;
584 /* Struct to hold info about ivtv cards */
585 struct ivtv {
586 /* General fixed card data */
587 int num; /* board number, -1 during init! */
588 char name[8]; /* board name for printk and interrupts (e.g. 'ivtv0') */
589 struct pci_dev *dev; /* PCI device */
590 const struct ivtv_card *card; /* card information */
591 const char *card_name; /* full name of the card */
592 const struct ivtv_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
593 u8 has_cx23415; /* 1 if it is a cx23415 based card, 0 for cx23416 */
594 u8 pvr150_workaround; /* 1 if the cx25840 needs to workaround a PVR150 bug */
595 u8 nof_inputs; /* number of video inputs */
596 u8 nof_audio_inputs; /* number of audio inputs */
597 u32 v4l2_cap; /* V4L2 capabilities of card */
598 u32 hw_flags; /* hardware description of the board */
599 v4l2_std_id tuner_std; /* the norm of the card's tuner (fixed) */
600 /* controlling video decoder function */
601 int (*video_dec_func)(struct ivtv *, unsigned int, void *);
602 u32 base_addr; /* PCI resource base address */
603 volatile void __iomem *enc_mem; /* pointer to mapped encoder memory */
604 volatile void __iomem *dec_mem; /* pointer to mapped decoder memory */
605 volatile void __iomem *reg_mem; /* pointer to mapped registers */
606 struct ivtv_options options; /* user options */
609 /* High-level state info */
610 unsigned long i_flags; /* global ivtv flags */
611 u8 is_50hz; /* 1 if the current capture standard is 50 Hz */
612 u8 is_60hz /* 1 if the current capture standard is 60 Hz */;
613 u8 is_out_50hz /* 1 if the current TV output standard is 50 Hz */;
614 u8 is_out_60hz /* 1 if the current TV output standard is 60 Hz */;
615 int output_mode; /* decoder output mode: NONE, MPG, YUV, UDMA YUV, passthrough */
616 u32 audio_input; /* current audio input */
617 u32 active_input; /* current video input */
618 u32 active_output; /* current video output */
619 v4l2_std_id std; /* current capture TV standard */
620 v4l2_std_id std_out; /* current TV output standard */
621 u8 audio_stereo_mode; /* decoder setting how to handle stereo MPEG audio */
622 u8 audio_bilingual_mode; /* decoder setting how to handle bilingual MPEG audio */
623 struct cx2341x_mpeg_params params; /* current encoder parameters */
626 /* Locking */
627 spinlock_t lock; /* lock access to this struct */
628 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
631 /* Streams */
632 int stream_buf_size[IVTV_MAX_STREAMS]; /* stream buffer size */
633 struct ivtv_stream streams[IVTV_MAX_STREAMS]; /* stream data */
634 atomic_t capturing; /* count number of active capture streams */
635 atomic_t decoding; /* count number of active decoding streams */
638 /* Interrupts & DMA */
639 u32 irqmask; /* active interrupts */
640 u32 irq_rr_idx; /* round-robin stream index */
641 struct workqueue_struct *irq_work_queues; /* workqueue for PIO/YUV/VBI actions */
642 struct work_struct irq_work_queue; /* work entry */
643 spinlock_t dma_reg_lock; /* lock access to DMA engine registers */
644 int cur_dma_stream; /* index of current stream doing DMA (-1 if none) */
645 int cur_pio_stream; /* index of current stream doing PIO (-1 if none) */
646 u32 dma_data_req_offset; /* store offset in decoder memory of current DMA request */
647 u32 dma_data_req_size; /* store size of current DMA request */
648 int dma_retries; /* current DMA retry attempt */
649 struct ivtv_user_dma udma; /* user based DMA for OSD */
650 struct timer_list dma_timer; /* timer used to catch unfinished DMAs */
651 u32 last_vsync_field; /* last seen vsync field */
652 wait_queue_head_t dma_waitq; /* wake up when the current DMA is finished */
653 wait_queue_head_t eos_waitq; /* wake up when EOS arrives */
654 wait_queue_head_t event_waitq; /* wake up when the next decoder event arrives */
655 wait_queue_head_t vsync_waitq; /* wake up when the next decoder vsync arrives */
658 /* Mailbox */
659 struct ivtv_mailbox_data enc_mbox; /* encoder mailboxes */
660 struct ivtv_mailbox_data dec_mbox; /* decoder mailboxes */
661 struct ivtv_api_cache api_cache[256]; /* cached API commands */
664 /* I2C */
665 struct i2c_adapter i2c_adap;
666 struct i2c_algo_bit_data i2c_algo;
667 struct i2c_client i2c_client;
668 struct i2c_client *i2c_clients[I2C_CLIENTS_MAX];/* pointers to all I2C clients */
669 int i2c_state; /* i2c bit state */
670 struct mutex i2c_bus_lock; /* lock i2c bus */
673 /* Program Index information */
674 u32 pgm_info_offset; /* start of pgm info in encoder memory */
675 u32 pgm_info_num; /* number of elements in the pgm cyclic buffer in encoder memory */
676 u32 pgm_info_write_idx; /* last index written by the card that was transferred to pgm_info[] */
677 u32 pgm_info_read_idx; /* last index in pgm_info read by the application */
678 struct v4l2_enc_idx_entry pgm_info[IVTV_MAX_PGM_INDEX]; /* filled from the pgm cyclic buffer on the card */
681 /* Miscellaneous */
682 u32 open_id; /* incremented each time an open occurs, is >= 1 */
683 struct v4l2_prio_state prio; /* priority state */
684 int search_pack_header; /* 1 if ivtv_copy_buf_to_user() is scanning for a pack header (0xba) */
685 int speed; /* current playback speed setting */
686 u8 speed_mute_audio; /* 1 if audio should be muted when fast forward */
687 u64 mpg_data_received; /* number of bytes received from the MPEG stream */
688 u64 vbi_data_inserted; /* number of VBI bytes inserted into the MPEG stream */
689 u32 last_dec_timing[3]; /* cache last retrieved pts/scr/frame values */
690 unsigned long dualwatch_jiffies;/* jiffies value of the previous dualwatch check */
691 u16 dualwatch_stereo_mode; /* current detected dualwatch stereo mode */
694 /* VBI state info */
695 struct vbi_info vbi; /* VBI-specific data */
698 /* YUV playback */
699 struct yuv_playback_info yuv_info; /* YUV playback data */
702 /* OSD support */
703 unsigned long osd_video_pbase;
704 int osd_global_alpha_state; /* 1 = global alpha is on */
705 int osd_local_alpha_state; /* 1 = local alpha is on */
706 int osd_chroma_key_state; /* 1 = chroma-keying is on */
707 u8 osd_global_alpha; /* current global alpha */
708 u32 osd_chroma_key; /* current chroma key */
709 struct v4l2_rect osd_rect; /* current OSD position and size */
710 struct v4l2_rect main_rect; /* current Main window position and size */
711 struct osd_info *osd_info; /* ivtvfb private OSD info */
714 /* Globals */
715 extern struct ivtv *ivtv_cards[];
716 extern int ivtv_cards_active;
717 extern int ivtv_first_minor;
718 extern spinlock_t ivtv_cards_lock;
720 /*==============Prototypes==================*/
722 /* Hardware/IRQ */
723 void ivtv_set_irq_mask(struct ivtv *itv, u32 mask);
724 void ivtv_clear_irq_mask(struct ivtv *itv, u32 mask);
726 /* try to set output mode, return current mode. */
727 int ivtv_set_output_mode(struct ivtv *itv, int mode);
729 /* return current output stream based on current mode */
730 struct ivtv_stream *ivtv_get_output_stream(struct ivtv *itv);
732 /* Return non-zero if a signal is pending */
733 int ivtv_msleep_timeout(unsigned int msecs, int intr);
735 /* Wait on queue, returns -EINTR if interrupted */
736 int ivtv_waitq(wait_queue_head_t *waitq);
738 /* Read Hauppauge eeprom */
739 struct tveeprom; /* forward reference */
740 void ivtv_read_eeprom(struct ivtv *itv, struct tveeprom *tv);
742 /* First-open initialization: load firmware, init cx25840, etc. */
743 int ivtv_init_on_first_open(struct ivtv *itv);
745 /* This is a PCI post thing, where if the pci register is not read, then
746 the write doesn't always take effect right away. By reading back the
747 register any pending PCI writes will be performed (in order), and so
748 you can be sure that the writes are guaranteed to be done.
750 Rarely needed, only in some timing sensitive cases.
751 Apparently if this is not done some motherboards seem
752 to kill the firmware and get into the broken state until computer is
753 rebooted. */
754 #define write_sync(val, reg) \
755 do { writel(val, reg); readl(reg); } while (0)
757 #define read_reg(reg) readl(itv->reg_mem + (reg))
758 #define write_reg(val, reg) writel(val, itv->reg_mem + (reg))
759 #define write_reg_sync(val, reg) \
760 do { write_reg(val, reg); read_reg(reg); } while (0)
762 #define read_enc(addr) readl(itv->enc_mem + (u32)(addr))
763 #define write_enc(val, addr) writel(val, itv->enc_mem + (u32)(addr))
764 #define write_enc_sync(val, addr) \
765 do { write_enc(val, addr); read_enc(addr); } while (0)
767 #define read_dec(addr) readl(itv->dec_mem + (u32)(addr))
768 #define write_dec(val, addr) writel(val, itv->dec_mem + (u32)(addr))
769 #define write_dec_sync(val, addr) \
770 do { write_dec(val, addr); read_dec(addr); } while (0)
772 #endif