Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / media / dvb / frontends / bsbe1.h
blobd8f65738e5d2520e05d2f6508c317fcaadfb4e1f
1 /*
2 * bsbe1.h - ALPS BSBE1 tuner support (moved from av7110.c)
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
22 * the project's page is at http://www.linuxtv.org
25 #ifndef BSBE1_H
26 #define BSBE1_H
28 static u8 alps_bsbe1_inittab[] = {
29 0x01, 0x15,
30 0x02, 0x30,
31 0x03, 0x00,
32 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
33 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
34 0x06, 0x40, /* DAC not used, set to high impendance mode */
35 0x07, 0x00, /* DAC LSB */
36 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
37 0x09, 0x00, /* FIFO */
38 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
39 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
40 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
41 0x10, 0x3f, // AGC2 0x3d
42 0x11, 0x84,
43 0x12, 0xb9,
44 0x15, 0xc9, // lock detector threshold
45 0x16, 0x00,
46 0x17, 0x00,
47 0x18, 0x00,
48 0x19, 0x00,
49 0x1a, 0x00,
50 0x1f, 0x50,
51 0x20, 0x00,
52 0x21, 0x00,
53 0x22, 0x00,
54 0x23, 0x00,
55 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
56 0x29, 0x1e, // 1/2 threshold
57 0x2a, 0x14, // 2/3 threshold
58 0x2b, 0x0f, // 3/4 threshold
59 0x2c, 0x09, // 5/6 threshold
60 0x2d, 0x05, // 7/8 threshold
61 0x2e, 0x01,
62 0x31, 0x1f, // test all FECs
63 0x32, 0x19, // viterbi and synchro search
64 0x33, 0xfc, // rs control
65 0x34, 0x93, // error control
66 0x0f, 0x92,
67 0xff, 0xff
71 static int alps_bsbe1_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
73 u8 aclk = 0;
74 u8 bclk = 0;
76 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
77 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
78 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
79 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
80 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
81 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
83 stv0299_writereg(fe, 0x13, aclk);
84 stv0299_writereg(fe, 0x14, bclk);
85 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
86 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
87 stv0299_writereg(fe, 0x21, (ratio ) & 0xf0);
89 return 0;
92 static int alps_bsbe1_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters *params)
94 int ret;
95 u8 data[4];
96 u32 div;
97 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
98 struct i2c_adapter *i2c = fe->tuner_priv;
100 if ((params->frequency < 950000) || (params->frequency > 2150000))
101 return -EINVAL;
103 div = (params->frequency + (125 - 1)) / 125; // round correctly
104 data[0] = (div >> 8) & 0x7f;
105 data[1] = div & 0xff;
106 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
107 data[3] = (params->frequency > 1530000) ? 0xE0 : 0xE4;
109 if (fe->ops.i2c_gate_ctrl)
110 fe->ops.i2c_gate_ctrl(fe, 1);
111 ret = i2c_transfer(i2c, &msg, 1);
112 return (ret != 1) ? -EIO : 0;
115 static struct stv0299_config alps_bsbe1_config = {
116 .demod_address = 0x68,
117 .inittab = alps_bsbe1_inittab,
118 .mclk = 88000000UL,
119 .invert = 1,
120 .skip_reinit = 0,
121 .min_delay_ms = 100,
122 .set_symbol_rate = alps_bsbe1_set_symbol_rate,
125 #endif