Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / ide / legacy / qd65xx.c
blob2f4f47ad602f61ca8ec3614d484dcc5939a46c05
1 /*
2 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
3 */
5 /*
6 * Version 0.03 Cleaned auto-tune, added probe
7 * Version 0.04 Added second channel tuning
8 * Version 0.05 Enhanced tuning ; added qd6500 support
9 * Version 0.06 Added dos driver's list
10 * Version 0.07 Second channel bug fix
12 * QDI QD6500/QD6580 EIDE controller fast support
14 * Please set local bus speed using kernel parameter idebus
15 * for example, "idebus=33" stands for 33Mhz VLbus
16 * To activate controller support, use "ide0=qd65xx"
17 * To enable tuning, use "hda=autotune hdb=autotune"
18 * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
22 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
23 * Samuel Thibault <samuel.thibault@fnac.net>
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/kernel.h>
29 #include <linux/delay.h>
30 #include <linux/timer.h>
31 #include <linux/mm.h>
32 #include <linux/ioport.h>
33 #include <linux/blkdev.h>
34 #include <linux/hdreg.h>
35 #include <linux/ide.h>
36 #include <linux/init.h>
37 #include <asm/system.h>
38 #include <asm/io.h>
40 #include "qd65xx.h"
43 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
44 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
45 * -- qd6500 is a single IDE interface
46 * -- qd6580 is a dual IDE interface
48 * More research on qd6580 being done by willmore@cig.mot.com (David)
49 * More Information given by Petr Soucek (petr@ryston.cz)
50 * http://www.ryston.cz/petr/vlb
54 * base: Timer1
57 * base+0x01: Config (R/O)
59 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
60 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
61 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
62 * bit 3: qd6500: 1 = disabled, 0 = enabled
63 * qd6580: 1
64 * upper nibble:
65 * qd6500: 1100
66 * qd6580: either 1010 or 0101
69 * base+0x02: Timer2 (qd6580 only)
72 * base+0x03: Control (qd6580 only)
74 * bits 0-3 must always be set 1
75 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
76 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
77 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
78 * channel 1 for hdc & hdd
79 * bit 1 : 1 = only disks on primary port
80 * 0 = disks & ATAPI devices on primary port
81 * bit 2-4 : always 0
82 * bit 5 : status, but of what ?
83 * bit 6 : always set 1 by dos driver
84 * bit 7 : set 1 for non-ATAPI devices on primary port
85 * (maybe read-ahead and post-write buffer ?)
88 static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
91 * qd_select:
93 * This routine is invoked from ide.c to prepare for access to a given drive.
96 static void qd_select (ide_drive_t *drive)
98 u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
99 (QD_TIMREG(drive) & 0x02);
101 if (timings[index] != QD_TIMING(drive))
102 outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
106 * qd6500_compute_timing
108 * computes the timing value where
109 * lower nibble represents active time, in count of VLB clocks
110 * upper nibble represents recovery time, in count of VLB clocks
113 static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
115 u8 active_cycle,recovery_cycle;
117 if (system_bus_clock()<=33) {
118 active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
119 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
120 } else {
121 active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
122 recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
125 return((recovery_cycle<<4) | 0x08 | active_cycle);
129 * qd6580_compute_timing
131 * idem for qd6580
134 static u8 qd6580_compute_timing (int active_time, int recovery_time)
136 u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
137 u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
139 return((recovery_cycle<<4) | active_cycle);
143 * qd_find_disk_type
145 * tries to find timing from dos driver's table
148 static int qd_find_disk_type (ide_drive_t *drive,
149 int *active_time, int *recovery_time)
151 struct qd65xx_timing_s *p;
152 char model[40];
154 if (!*drive->id->model) return 0;
156 strncpy(model,drive->id->model,40);
157 ide_fixstring(model,40,1); /* byte-swap */
159 for (p = qd65xx_timing ; p->offset != -1 ; p++) {
160 if (!strncmp(p->model, model+p->offset, 4)) {
161 printk(KERN_DEBUG "%s: listed !\n", drive->name);
162 *active_time = p->active;
163 *recovery_time = p->recovery;
164 return 1;
167 return 0;
171 * qd_timing_ok:
173 * check whether timings don't conflict
176 static int qd_timing_ok (ide_drive_t drives[])
178 return (IDE_IMPLY(drives[0].present && drives[1].present,
179 IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
180 QD_TIMING(drives) == QD_TIMING(drives+1))));
181 /* if same timing register, must be same timing */
185 * qd_set_timing:
187 * records the timing, and enables selectproc as needed
190 static void qd_set_timing (ide_drive_t *drive, u8 timing)
192 ide_hwif_t *hwif = HWIF(drive);
194 drive->drive_data &= 0xff00;
195 drive->drive_data |= timing;
196 if (qd_timing_ok(hwif->drives)) {
197 qd_select(drive); /* selects once */
198 hwif->selectproc = NULL;
199 } else
200 hwif->selectproc = &qd_select;
202 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
205 static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
207 int active_time = 175;
208 int recovery_time = 415; /* worst case values from the dos driver */
211 * FIXME: use "pio" value
213 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
214 && drive->id->tPIO && (drive->id->field_valid & 0x02)
215 && drive->id->eide_pio >= 240) {
217 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
218 drive->id->tPIO);
219 active_time = 110;
220 recovery_time = drive->id->eide_pio - 120;
223 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
226 static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
228 int base = HWIF(drive)->select_data;
229 unsigned int cycle_time;
230 int active_time = 175;
231 int recovery_time = 415; /* worst case values from the dos driver */
233 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
234 cycle_time = ide_pio_cycle_time(drive, pio);
236 switch (pio) {
237 case 0: break;
238 case 3:
239 if (cycle_time >= 110) {
240 active_time = 86;
241 recovery_time = cycle_time - 102;
242 } else
243 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
244 break;
245 case 4:
246 if (cycle_time >= 69) {
247 active_time = 70;
248 recovery_time = cycle_time - 61;
249 } else
250 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
251 break;
252 default:
253 if (cycle_time >= 180) {
254 active_time = 110;
255 recovery_time = cycle_time - 120;
256 } else {
257 active_time = ide_pio_timings[pio].active_time;
258 recovery_time = cycle_time - active_time;
261 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
264 if (!HWIF(drive)->channel && drive->media != ide_disk) {
265 outb(0x5f, QD_CONTROL_PORT);
266 printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
267 "and post-write buffer on %s.\n",
268 drive->name, HWIF(drive)->name);
271 qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
275 * qd_testreg
277 * tests if the given port is a register
280 static int __init qd_testreg(int port)
282 unsigned long flags;
283 u8 savereg, readreg;
285 local_irq_save(flags);
286 savereg = inb_p(port);
287 outb_p(QD_TESTVAL, port); /* safe value */
288 readreg = inb_p(port);
289 outb(savereg, port);
290 local_irq_restore(flags);
292 if (savereg == QD_TESTVAL) {
293 printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
294 printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
295 printk(KERN_ERR "Assuming qd65xx is not present.\n");
296 return 1;
299 return (readreg != QD_TESTVAL);
303 * qd_setup:
305 * called to setup an ata channel : adjusts attributes & links for tuning
308 static void __init qd_setup(ide_hwif_t *hwif, int base, int config)
310 hwif->select_data = base;
311 hwif->config_data = config;
314 static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
316 u8 base = hwif->select_data, config = QD_CONFIG(hwif);
318 hwif->drives[0].drive_data = QD6500_DEF_DATA;
319 hwif->drives[1].drive_data = QD6500_DEF_DATA;
322 static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
324 u16 t1, t2;
325 u8 base = hwif->select_data, config = QD_CONFIG(hwif);
327 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
328 t1 = QD6580_DEF_DATA;
329 t2 = QD6580_DEF_DATA2;
330 } else
331 t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
333 hwif->drives[0].drive_data = t1;
334 hwif->drives[1].drive_data = t2;
337 static const struct ide_port_info qd65xx_port_info __initdata = {
338 .chipset = ide_qd65xx,
339 .host_flags = IDE_HFLAG_IO_32BIT |
340 IDE_HFLAG_NO_DMA |
341 IDE_HFLAG_NO_AUTOTUNE,
342 .pio_mask = ATA_PIO4,
346 * qd_probe:
348 * looks at the specified baseport, and if qd found, registers & initialises it
349 * return 1 if another qd may be probed
352 static int __init qd_probe(int base)
354 ide_hwif_t *hwif;
355 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
356 u8 config;
357 u8 unit;
359 config = inb(QD_CONFIG_PORT);
361 if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
362 return 1;
364 unit = ! (config & QD_CONFIG_IDE_BASEPORT);
366 if ((config & 0xf0) == QD_CONFIG_QD6500) {
368 if (qd_testreg(base)) return 1; /* bad register */
370 /* qd6500 found */
372 hwif = &ide_hwifs[unit];
373 printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
374 printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
375 config, QD_ID3);
377 if (config & QD_CONFIG_DISABLED) {
378 printk(KERN_WARNING "qd6500 is disabled !\n");
379 return 1;
382 qd_setup(hwif, base, config);
384 hwif->port_init_devs = qd6500_port_init_devs;
385 hwif->set_pio_mode = &qd6500_set_pio_mode;
387 idx[unit] = unit;
389 ide_device_add(idx, &qd65xx_port_info);
391 return 1;
394 if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
395 ((config & 0xf0) == QD_CONFIG_QD6580_B)) {
397 u8 control;
399 if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
400 /* bad registers */
402 /* qd6580 found */
404 control = inb(QD_CONTROL_PORT);
406 printk(KERN_NOTICE "qd6580 at %#x\n", base);
407 printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
408 config, control, QD_ID3);
410 outb(QD_DEF_CONTR, QD_CONTROL_PORT);
412 if (control & QD_CONTR_SEC_DISABLED) {
413 /* secondary disabled */
415 hwif = &ide_hwifs[unit];
416 printk(KERN_INFO "%s: qd6580: single IDE board\n",
417 hwif->name);
419 qd_setup(hwif, base, config | (control << 8));
421 hwif->port_init_devs = qd6580_port_init_devs;
422 hwif->set_pio_mode = &qd6580_set_pio_mode;
424 idx[unit] = unit;
426 ide_device_add(idx, &qd65xx_port_info);
428 return 1;
429 } else {
430 ide_hwif_t *mate;
432 hwif = &ide_hwifs[0];
433 mate = &ide_hwifs[1];
434 /* secondary enabled */
435 printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
436 hwif->name, mate->name);
438 qd_setup(hwif, base, config | (control << 8));
440 hwif->port_init_devs = qd6580_port_init_devs;
441 hwif->set_pio_mode = &qd6580_set_pio_mode;
443 qd_setup(mate, base, config | (control << 8));
445 mate->port_init_devs = qd6580_port_init_devs;
446 mate->set_pio_mode = &qd6580_set_pio_mode;
448 idx[0] = 0;
449 idx[1] = 1;
451 ide_device_add(idx, &qd65xx_port_info);
453 return 0; /* no other qd65xx possible */
456 /* no qd65xx found */
457 return 1;
460 int probe_qd65xx = 0;
462 module_param_named(probe, probe_qd65xx, bool, 0);
463 MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
465 static int __init qd65xx_init(void)
467 if (probe_qd65xx == 0)
468 return -ENODEV;
470 if (qd_probe(0x30))
471 qd_probe(0xb0);
472 if (ide_hwifs[0].chipset != ide_qd65xx &&
473 ide_hwifs[1].chipset != ide_qd65xx)
474 return -ENODEV;
475 return 0;
478 module_init(qd65xx_init);
480 MODULE_AUTHOR("Samuel Thibault");
481 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
482 MODULE_LICENSE("GPL");