Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / drivers / ata / pata_winbond.c
blob99c92eda217b730c12994c24422debddcd14154f
1 /*
2 * pata_winbond.c - Winbond VLB ATA controllers
3 * (C) 2006 Red Hat <alan@redhat.com>
5 * Support for the Winbond 83759A when operating in advanced mode.
6 * Multichip mode is not currently supported.
7 */
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/blkdev.h>
13 #include <linux/delay.h>
14 #include <scsi/scsi_host.h>
15 #include <linux/libata.h>
16 #include <linux/platform_device.h>
18 #define DRV_NAME "pata_winbond"
19 #define DRV_VERSION "0.0.3"
21 #define NR_HOST 4 /* Two winbond controllers, two channels each */
23 struct winbond_data {
24 unsigned long config;
25 struct platform_device *platform_dev;
28 static struct ata_host *winbond_host[NR_HOST];
29 static struct winbond_data winbond_data[NR_HOST];
30 static int nr_winbond_host;
32 #ifdef MODULE
33 static int probe_winbond = 1;
34 #else
35 static int probe_winbond;
36 #endif
38 static DEFINE_SPINLOCK(winbond_lock);
40 static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
42 unsigned long flags;
43 spin_lock_irqsave(&winbond_lock, flags);
44 outb(reg, port + 0x01);
45 outb(val, port + 0x02);
46 spin_unlock_irqrestore(&winbond_lock, flags);
49 static u8 winbond_readcfg(unsigned long port, u8 reg)
51 u8 val;
53 unsigned long flags;
54 spin_lock_irqsave(&winbond_lock, flags);
55 outb(reg, port + 0x01);
56 val = inb(port + 0x02);
57 spin_unlock_irqrestore(&winbond_lock, flags);
59 return val;
62 static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
64 struct ata_timing t;
65 struct winbond_data *winbond = ap->host->private_data;
66 int active, recovery;
67 u8 reg;
68 int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
70 reg = winbond_readcfg(winbond->config, 0x81);
72 /* Get the timing data in cycles */
73 if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
74 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
75 else
76 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
78 active = (FIT(t.active, 3, 17) - 1) & 0x0F;
79 recovery = (FIT(t.recover, 1, 15) + 1) & 0x0F;
80 timing = (active << 4) | recovery;
81 winbond_writecfg(winbond->config, timing, reg);
83 /* Load the setup timing */
85 reg = 0x35;
86 if (adev->class != ATA_DEV_ATA)
87 reg |= 0x08; /* FIFO off */
88 if (!ata_pio_need_iordy(adev))
89 reg |= 0x02; /* IORDY off */
90 reg |= (FIT(t.setup, 0, 3) << 6);
91 winbond_writecfg(winbond->config, timing + 1, reg);
95 static unsigned int winbond_data_xfer(struct ata_device *dev,
96 unsigned char *buf, unsigned int buflen, int rw)
98 struct ata_port *ap = dev->link->ap;
99 int slop = buflen & 3;
101 if (ata_id_has_dword_io(dev->id)) {
102 if (rw == READ)
103 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
104 else
105 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
107 if (unlikely(slop)) {
108 u32 pad;
109 if (rw == READ) {
110 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
111 memcpy(buf + buflen - slop, &pad, slop);
112 } else {
113 memcpy(&pad, buf + buflen - slop, slop);
114 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
116 buflen += 4 - slop;
118 } else
119 buflen = ata_data_xfer(dev, buf, buflen, rw);
121 return buflen;
124 static struct scsi_host_template winbond_sht = {
125 .module = THIS_MODULE,
126 .name = DRV_NAME,
127 .ioctl = ata_scsi_ioctl,
128 .queuecommand = ata_scsi_queuecmd,
129 .can_queue = ATA_DEF_QUEUE,
130 .this_id = ATA_SHT_THIS_ID,
131 .sg_tablesize = LIBATA_MAX_PRD,
132 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
133 .emulated = ATA_SHT_EMULATED,
134 .use_clustering = ATA_SHT_USE_CLUSTERING,
135 .proc_name = DRV_NAME,
136 .dma_boundary = ATA_DMA_BOUNDARY,
137 .slave_configure = ata_scsi_slave_config,
138 .slave_destroy = ata_scsi_slave_destroy,
139 .bios_param = ata_std_bios_param,
142 static struct ata_port_operations winbond_port_ops = {
143 .set_piomode = winbond_set_piomode,
145 .tf_load = ata_tf_load,
146 .tf_read = ata_tf_read,
147 .check_status = ata_check_status,
148 .exec_command = ata_exec_command,
149 .dev_select = ata_std_dev_select,
151 .freeze = ata_bmdma_freeze,
152 .thaw = ata_bmdma_thaw,
153 .error_handler = ata_bmdma_error_handler,
154 .post_internal_cmd = ata_bmdma_post_internal_cmd,
155 .cable_detect = ata_cable_40wire,
157 .qc_prep = ata_qc_prep,
158 .qc_issue = ata_qc_issue_prot,
160 .data_xfer = winbond_data_xfer,
162 .irq_clear = ata_bmdma_irq_clear,
163 .irq_on = ata_irq_on,
165 .port_start = ata_sff_port_start,
169 * winbond_init_one - attach a winbond interface
170 * @type: Type to display
171 * @io: I/O port start
172 * @irq: interrupt line
173 * @fast: True if on a > 33Mhz VLB
175 * Register a VLB bus IDE interface. Such interfaces are PIO and we
176 * assume do not support IRQ sharing.
179 static __init int winbond_init_one(unsigned long port)
181 struct platform_device *pdev;
182 u8 reg;
183 int i, rc;
185 reg = winbond_readcfg(port, 0x81);
186 reg |= 0x80; /* jumpered mode off */
187 winbond_writecfg(port, 0x81, reg);
188 reg = winbond_readcfg(port, 0x83);
189 reg |= 0xF0; /* local control */
190 winbond_writecfg(port, 0x83, reg);
191 reg = winbond_readcfg(port, 0x85);
192 reg |= 0xF0; /* programmable timing */
193 winbond_writecfg(port, 0x85, reg);
195 reg = winbond_readcfg(port, 0x81);
197 if (!(reg & 0x03)) /* Disabled */
198 return -ENODEV;
200 for (i = 0; i < 2 ; i ++) {
201 unsigned long cmd_port = 0x1F0 - (0x80 * i);
202 unsigned long ctl_port = cmd_port + 0x206;
203 struct ata_host *host;
204 struct ata_port *ap;
205 void __iomem *cmd_addr, *ctl_addr;
207 if (!(reg & (1 << i)))
208 continue;
210 pdev = platform_device_register_simple(DRV_NAME, nr_winbond_host, NULL, 0);
211 if (IS_ERR(pdev))
212 return PTR_ERR(pdev);
214 rc = -ENOMEM;
215 host = ata_host_alloc(&pdev->dev, 1);
216 if (!host)
217 goto err_unregister;
218 ap = host->ports[0];
220 rc = -ENOMEM;
221 cmd_addr = devm_ioport_map(&pdev->dev, cmd_port, 8);
222 ctl_addr = devm_ioport_map(&pdev->dev, ctl_port, 1);
223 if (!cmd_addr || !ctl_addr)
224 goto err_unregister;
226 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", cmd_port, ctl_port);
228 ap->ops = &winbond_port_ops;
229 ap->pio_mask = 0x1F;
230 ap->flags |= ATA_FLAG_SLAVE_POSS;
231 ap->ioaddr.cmd_addr = cmd_addr;
232 ap->ioaddr.altstatus_addr = ctl_addr;
233 ap->ioaddr.ctl_addr = ctl_addr;
234 ata_std_ports(&ap->ioaddr);
236 /* hook in a private data structure per channel */
237 host->private_data = &winbond_data[nr_winbond_host];
238 winbond_data[nr_winbond_host].config = port;
239 winbond_data[nr_winbond_host].platform_dev = pdev;
241 /* activate */
242 rc = ata_host_activate(host, 14 + i, ata_interrupt, 0,
243 &winbond_sht);
244 if (rc)
245 goto err_unregister;
247 winbond_host[nr_winbond_host++] = dev_get_drvdata(&pdev->dev);
250 return 0;
252 err_unregister:
253 platform_device_unregister(pdev);
254 return rc;
258 * winbond_init - attach winbond interfaces
260 * Attach winbond IDE interfaces by scanning the ports it may occupy.
263 static __init int winbond_init(void)
265 static const unsigned long config[2] = { 0x130, 0x1B0 };
267 int ct = 0;
268 int i;
270 if (probe_winbond == 0)
271 return -ENODEV;
274 * Check both base addresses
277 for (i = 0; i < 2; i++) {
278 if (probe_winbond & (1<<i)) {
279 int ret = 0;
280 unsigned long port = config[i];
282 if (request_region(port, 2, "pata_winbond")) {
283 ret = winbond_init_one(port);
284 if (ret <= 0)
285 release_region(port, 2);
286 else ct+= ret;
290 if (ct != 0)
291 return 0;
292 return -ENODEV;
295 static __exit void winbond_exit(void)
297 int i;
299 for (i = 0; i < nr_winbond_host; i++) {
300 ata_host_detach(winbond_host[i]);
301 release_region(winbond_data[i].config, 2);
302 platform_device_unregister(winbond_data[i].platform_dev);
306 MODULE_AUTHOR("Alan Cox");
307 MODULE_DESCRIPTION("low-level driver for Winbond VL ATA");
308 MODULE_LICENSE("GPL");
309 MODULE_VERSION(DRV_VERSION);
311 module_init(winbond_init);
312 module_exit(winbond_exit);
314 module_param(probe_winbond, int, 0);