Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / x86 / kernel / tsc_32.c
blobc2241e04ea5f23f184fe559830531e64990cacd6
1 #include <linux/sched.h>
2 #include <linux/clocksource.h>
3 #include <linux/workqueue.h>
4 #include <linux/cpufreq.h>
5 #include <linux/jiffies.h>
6 #include <linux/init.h>
7 #include <linux/dmi.h>
8 #include <linux/percpu.h>
10 #include <asm/delay.h>
11 #include <asm/tsc.h>
12 #include <asm/io.h>
13 #include <asm/timer.h>
15 #include "mach_timer.h"
17 static int tsc_enabled;
20 * On some systems the TSC frequency does not
21 * change with the cpu frequency. So we need
22 * an extra value to store the TSC freq
24 unsigned int tsc_khz;
25 EXPORT_SYMBOL_GPL(tsc_khz);
27 #ifdef CONFIG_X86_TSC
28 static int __init tsc_setup(char *str)
30 printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
31 "cannot disable TSC completely.\n");
32 mark_tsc_unstable("user disabled TSC");
33 return 1;
35 #else
37 * disable flag for tsc. Takes effect by clearing the TSC cpu flag
38 * in cpu/common.c
40 static int __init tsc_setup(char *str)
42 setup_clear_cpu_cap(X86_FEATURE_TSC);
43 return 1;
45 #endif
47 __setup("notsc", tsc_setup);
50 * code to mark and check if the TSC is unstable
51 * due to cpufreq or due to unsynced TSCs
53 static int tsc_unstable;
55 int check_tsc_unstable(void)
57 return tsc_unstable;
59 EXPORT_SYMBOL_GPL(check_tsc_unstable);
61 /* Accelerators for sched_clock()
62 * convert from cycles(64bits) => nanoseconds (64bits)
63 * basic equation:
64 * ns = cycles / (freq / ns_per_sec)
65 * ns = cycles * (ns_per_sec / freq)
66 * ns = cycles * (10^9 / (cpu_khz * 10^3))
67 * ns = cycles * (10^6 / cpu_khz)
69 * Then we use scaling math (suggested by george@mvista.com) to get:
70 * ns = cycles * (10^6 * SC / cpu_khz) / SC
71 * ns = cycles * cyc2ns_scale / SC
73 * And since SC is a constant power of two, we can convert the div
74 * into a shift.
76 * We can use khz divisor instead of mhz to keep a better precision, since
77 * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
78 * (mathieu.desnoyers@polymtl.ca)
80 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
83 DEFINE_PER_CPU(unsigned long, cyc2ns);
85 static void set_cyc2ns_scale(unsigned long cpu_khz, int cpu)
87 unsigned long flags, prev_scale, *scale;
88 unsigned long long tsc_now, ns_now;
90 local_irq_save(flags);
91 sched_clock_idle_sleep_event();
93 scale = &per_cpu(cyc2ns, cpu);
95 rdtscll(tsc_now);
96 ns_now = __cycles_2_ns(tsc_now);
98 prev_scale = *scale;
99 if (cpu_khz)
100 *scale = (NSEC_PER_MSEC << CYC2NS_SCALE_FACTOR)/cpu_khz;
103 * Start smoothly with the new frequency:
105 sched_clock_idle_wakeup_event(0);
106 local_irq_restore(flags);
110 * Scheduler clock - returns current time in nanosec units.
112 unsigned long long native_sched_clock(void)
114 unsigned long long this_offset;
117 * Fall back to jiffies if there's no TSC available:
118 * ( But note that we still use it if the TSC is marked
119 * unstable. We do this because unlike Time Of Day,
120 * the scheduler clock tolerates small errors and it's
121 * very important for it to be as fast as the platform
122 * can achive it. )
124 if (unlikely(!tsc_enabled && !tsc_unstable))
125 /* No locking but a rare wrong value is not a big deal: */
126 return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
128 /* read the Time Stamp Counter: */
129 rdtscll(this_offset);
131 /* return the value in ns */
132 return cycles_2_ns(this_offset);
135 /* We need to define a real function for sched_clock, to override the
136 weak default version */
137 #ifdef CONFIG_PARAVIRT
138 unsigned long long sched_clock(void)
140 return paravirt_sched_clock();
142 #else
143 unsigned long long sched_clock(void)
144 __attribute__((alias("native_sched_clock")));
145 #endif
147 unsigned long native_calculate_cpu_khz(void)
149 unsigned long long start, end;
150 unsigned long count;
151 u64 delta64 = (u64)ULLONG_MAX;
152 int i;
153 unsigned long flags;
155 local_irq_save(flags);
157 /* run 3 times to ensure the cache is warm and to get an accurate reading */
158 for (i = 0; i < 3; i++) {
159 mach_prepare_counter();
160 rdtscll(start);
161 mach_countup(&count);
162 rdtscll(end);
165 * Error: ECTCNEVERSET
166 * The CTC wasn't reliable: we got a hit on the very first read,
167 * or the CPU was so fast/slow that the quotient wouldn't fit in
168 * 32 bits..
170 if (count <= 1)
171 continue;
173 /* cpu freq too slow: */
174 if ((end - start) <= CALIBRATE_TIME_MSEC)
175 continue;
178 * We want the minimum time of all runs in case one of them
179 * is inaccurate due to SMI or other delay
181 delta64 = min(delta64, (end - start));
184 /* cpu freq too fast (or every run was bad): */
185 if (delta64 > (1ULL<<32))
186 goto err;
188 delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
189 do_div(delta64,CALIBRATE_TIME_MSEC);
191 local_irq_restore(flags);
192 return (unsigned long)delta64;
193 err:
194 local_irq_restore(flags);
195 return 0;
198 int recalibrate_cpu_khz(void)
200 #ifndef CONFIG_SMP
201 unsigned long cpu_khz_old = cpu_khz;
203 if (cpu_has_tsc) {
204 cpu_khz = calculate_cpu_khz();
205 tsc_khz = cpu_khz;
206 cpu_data(0).loops_per_jiffy =
207 cpufreq_scale(cpu_data(0).loops_per_jiffy,
208 cpu_khz_old, cpu_khz);
209 return 0;
210 } else
211 return -ENODEV;
212 #else
213 return -ENODEV;
214 #endif
217 EXPORT_SYMBOL(recalibrate_cpu_khz);
219 #ifdef CONFIG_CPU_FREQ
222 * if the CPU frequency is scaled, TSC-based delays will need a different
223 * loops_per_jiffy value to function properly.
225 static unsigned int ref_freq = 0;
226 static unsigned long loops_per_jiffy_ref = 0;
227 static unsigned long cpu_khz_ref = 0;
229 static int
230 time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
232 struct cpufreq_freqs *freq = data;
234 if (!ref_freq) {
235 if (!freq->old){
236 ref_freq = freq->new;
237 return 0;
239 ref_freq = freq->old;
240 loops_per_jiffy_ref = cpu_data(freq->cpu).loops_per_jiffy;
241 cpu_khz_ref = cpu_khz;
244 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
245 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
246 (val == CPUFREQ_RESUMECHANGE)) {
247 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
248 cpu_data(freq->cpu).loops_per_jiffy =
249 cpufreq_scale(loops_per_jiffy_ref,
250 ref_freq, freq->new);
252 if (cpu_khz) {
254 if (num_online_cpus() == 1)
255 cpu_khz = cpufreq_scale(cpu_khz_ref,
256 ref_freq, freq->new);
257 if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
258 tsc_khz = cpu_khz;
259 set_cyc2ns_scale(cpu_khz, freq->cpu);
261 * TSC based sched_clock turns
262 * to junk w/ cpufreq
264 mark_tsc_unstable("cpufreq changes");
269 return 0;
272 static struct notifier_block time_cpufreq_notifier_block = {
273 .notifier_call = time_cpufreq_notifier
276 static int __init cpufreq_tsc(void)
278 return cpufreq_register_notifier(&time_cpufreq_notifier_block,
279 CPUFREQ_TRANSITION_NOTIFIER);
281 core_initcall(cpufreq_tsc);
283 #endif
285 /* clock source code */
287 static unsigned long current_tsc_khz = 0;
289 static cycle_t read_tsc(void)
291 cycle_t ret;
293 rdtscll(ret);
295 return ret;
298 static struct clocksource clocksource_tsc = {
299 .name = "tsc",
300 .rating = 300,
301 .read = read_tsc,
302 .mask = CLOCKSOURCE_MASK(64),
303 .mult = 0, /* to be set */
304 .shift = 22,
305 .flags = CLOCK_SOURCE_IS_CONTINUOUS |
306 CLOCK_SOURCE_MUST_VERIFY,
309 void mark_tsc_unstable(char *reason)
311 if (!tsc_unstable) {
312 tsc_unstable = 1;
313 tsc_enabled = 0;
314 printk("Marking TSC unstable due to: %s.\n", reason);
315 /* Can be called before registration */
316 if (clocksource_tsc.mult)
317 clocksource_change_rating(&clocksource_tsc, 0);
318 else
319 clocksource_tsc.rating = 0;
322 EXPORT_SYMBOL_GPL(mark_tsc_unstable);
324 static int __init dmi_mark_tsc_unstable(const struct dmi_system_id *d)
326 printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
327 d->ident);
328 tsc_unstable = 1;
329 return 0;
332 /* List of systems that have known TSC problems */
333 static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
335 .callback = dmi_mark_tsc_unstable,
336 .ident = "IBM Thinkpad 380XD",
337 .matches = {
338 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
339 DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
346 * Make an educated guess if the TSC is trustworthy and synchronized
347 * over all CPUs.
349 __cpuinit int unsynchronized_tsc(void)
351 if (!cpu_has_tsc || tsc_unstable)
352 return 1;
354 /* Anything with constant TSC should be synchronized */
355 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
356 return 0;
359 * Intel systems are normally all synchronized.
360 * Exceptions must mark TSC as unstable:
362 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
363 /* assume multi socket systems are not synchronized: */
364 if (num_possible_cpus() > 1)
365 tsc_unstable = 1;
367 return tsc_unstable;
371 * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
373 #ifdef CONFIG_MGEODE_LX
374 /* RTSC counts during suspend */
375 #define RTSC_SUSP 0x100
377 static void __init check_geode_tsc_reliable(void)
379 unsigned long res_low, res_high;
381 rdmsr_safe(MSR_GEODE_BUSCONT_CONF0, &res_low, &res_high);
382 if (res_low & RTSC_SUSP)
383 clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
385 #else
386 static inline void check_geode_tsc_reliable(void) { }
387 #endif
390 void __init tsc_init(void)
392 int cpu;
394 if (!cpu_has_tsc)
395 goto out_no_tsc;
397 cpu_khz = calculate_cpu_khz();
398 tsc_khz = cpu_khz;
400 if (!cpu_khz)
401 goto out_no_tsc;
403 printk("Detected %lu.%03lu MHz processor.\n",
404 (unsigned long)cpu_khz / 1000,
405 (unsigned long)cpu_khz % 1000);
408 * Secondary CPUs do not run through tsc_init(), so set up
409 * all the scale factors for all CPUs, assuming the same
410 * speed as the bootup CPU. (cpufreq notifiers will fix this
411 * up if their speed diverges)
413 for_each_possible_cpu(cpu)
414 set_cyc2ns_scale(cpu_khz, cpu);
416 use_tsc_delay();
418 /* Check and install the TSC clocksource */
419 dmi_check_system(bad_tsc_dmi_table);
421 unsynchronized_tsc();
422 check_geode_tsc_reliable();
423 current_tsc_khz = tsc_khz;
424 clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
425 clocksource_tsc.shift);
426 /* lower the rating if we already know its unstable: */
427 if (check_tsc_unstable()) {
428 clocksource_tsc.rating = 0;
429 clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
430 } else
431 tsc_enabled = 1;
433 clocksource_register(&clocksource_tsc);
435 return;
437 out_no_tsc:
438 setup_clear_cpu_cap(X86_FEATURE_TSC);