arch/x86/kernel/setup64.c

   1 /*
   2  * X86-64 specific CPU setup.
   3  * Copyright (C) 1995  Linus Torvalds
   4  * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
   5  * See setup.c for older changelog.
   6  */
   7 #include <linux/init.h>
   8 #include <linux/kernel.h>
   9 #include <linux/sched.h>
  10 #include <linux/string.h>
  11 #include <linux/bootmem.h>
  12 #include <linux/bitops.h>
  13 #include <linux/module.h>
  14 #include <asm/pda.h>
  15 #include <asm/pgtable.h>
  16 #include <asm/processor.h>
  17 #include <asm/desc.h>
  18 #include <asm/atomic.h>
  19 #include <asm/mmu_context.h>
  20 #include <asm/smp.h>
  21 #include <asm/i387.h>
  22 #include <asm/percpu.h>
  23 #include <asm/proto.h>
  24 #include <asm/sections.h>
  25 #include <asm/setup.h>
  26
  27 #ifndef CONFIG_DEBUG_BOOT_PARAMS
  28 struct boot_params __initdata boot_params;
  29 #else
  30 struct boot_params boot_params;
  31 #endif
  32
  33 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
  34
  35 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
  36 EXPORT_SYMBOL(_cpu_pda);
  37 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
  38
  39 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
  40
  41 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
  42
  43 unsigned long __supported_pte_mask __read_mostly = ~0UL;
  44 EXPORT_SYMBOL_GPL(__supported_pte_mask);
  45
  46 static int do_not_nx __cpuinitdata = 0;
  47
  48 /* noexec=on|off
  49 Control non executable mappings for 64bit processes.
  50
  51 on      Enable(default)
  52 off     Disable
  53 */
  54 static int __init nonx_setup(char *str)
  55 {
  56         if (!str)
  57                 return -EINVAL;
  58         if (!strncmp(str, "on", 2)) {
  59                 __supported_pte_mask |= _PAGE_NX;
  60                 do_not_nx = 0;
  61         } else if (!strncmp(str, "off", 3)) {
  62                 do_not_nx = 1;
  63                 __supported_pte_mask &= ~_PAGE_NX;
  64         }
  65         return 0;
  66 }
  67 early_param("noexec", nonx_setup);
  68
  69 int force_personality32 = 0;
  70
  71 /* noexec32=on|off
  72 Control non executable heap for 32bit processes.
  73 To control the stack too use noexec=off
  74
  75 on      PROT_READ does not imply PROT_EXEC for 32bit processes
  76 off     PROT_READ implies PROT_EXEC (default)
  77 */
  78 static int __init nonx32_setup(char *str)
  79 {
  80         if (!strcmp(str, "on"))
  81                 force_personality32 &= ~READ_IMPLIES_EXEC;
  82         else if (!strcmp(str, "off"))
  83                 force_personality32 |= READ_IMPLIES_EXEC;
  84         return 1;
  85 }
  86 __setup("noexec32=", nonx32_setup);
  87
  88 /*
  89  * Copy data used in early init routines from the initial arrays to the
  90  * per cpu data areas.  These arrays then become expendable and the
  91  * *_early_ptr's are zeroed indicating that the static arrays are gone.
  92  */
  93 static void __init setup_per_cpu_maps(void)
  94 {
  95         int cpu;
  96
  97         for_each_possible_cpu(cpu) {
  98 #ifdef CONFIG_SMP
  99                 if (per_cpu_offset(cpu)) {
 100 #endif
 101                         per_cpu(x86_cpu_to_apicid, cpu) =
 102                                                 x86_cpu_to_apicid_init[cpu];
 103                         per_cpu(x86_bios_cpu_apicid, cpu) =
 104                                                 x86_bios_cpu_apicid_init[cpu];
 105 #ifdef CONFIG_NUMA
 106                         per_cpu(x86_cpu_to_node_map, cpu) =
 107                                                 x86_cpu_to_node_map_init[cpu];
 108 #endif
 109 #ifdef CONFIG_SMP
 110                 }
 111                 else
 112                         printk(KERN_NOTICE "per_cpu_offset zero for cpu %d\n",
 113                                                                         cpu);
 114 #endif
 115         }
 116
 117         /* indicate the early static arrays will soon be gone */
 118         x86_cpu_to_apicid_early_ptr = NULL;
 119         x86_bios_cpu_apicid_early_ptr = NULL;
 120 #ifdef CONFIG_NUMA
 121         x86_cpu_to_node_map_early_ptr = NULL;
 122 #endif
 123 }
 124
 125 /*
 126  * Great future plan:
 127  * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
 128  * Always point %gs to its beginning
 129  */
 130 void __init setup_per_cpu_areas(void)
 131 {
 132         int i;
 133         unsigned long size;
 134
 135 #ifdef CONFIG_HOTPLUG_CPU
 136         prefill_possible_map();
 137 #endif
 138
 139         /* Copy section for each CPU (we discard the original) */
 140         size = PERCPU_ENOUGH_ROOM;
 141
 142         printk(KERN_INFO "PERCPU: Allocating %lu bytes of per cpu data\n", size);
 143         for_each_cpu_mask (i, cpu_possible_map) {
 144                 char *ptr;
 145 #ifndef CONFIG_NEED_MULTIPLE_NODES
 146                 ptr = alloc_bootmem_pages(size);
 147 #else
 148                 int node = early_cpu_to_node(i);
 149
 150                 if (!node_online(node) || !NODE_DATA(node))
 151                         ptr = alloc_bootmem_pages(size);
 152                 else
 153                         ptr = alloc_bootmem_pages_node(NODE_DATA(node), size);
 154 #endif
 155                 if (!ptr)
 156                         panic("Cannot allocate cpu data for CPU %d\n", i);
 157                 cpu_pda(i)->data_offset = ptr - __per_cpu_start;
 158                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
 159         }
 160
 161         /* setup percpu data maps early */
 162         setup_per_cpu_maps();
 163 }
 164
 165 void pda_init(int cpu)
 166 {
 167         struct x8664_pda *pda = cpu_pda(cpu);
 168
 169         /* Setup up data that may be needed in __get_free_pages early */
 170         asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
 171         /* Memory clobbers used to order PDA accessed */
 172         mb();
 173         wrmsrl(MSR_GS_BASE, pda);
 174         mb();
 175
 176         pda->cpunumber = cpu;
 177         pda->irqcount = -1;
 178         pda->kernelstack =
 179                 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
 180         pda->active_mm = &init_mm;
 181         pda->mmu_state = 0;
 182
 183         if (cpu == 0) {
 184                 /* others are initialized in smpboot.c */
 185                 pda->pcurrent = &init_task;
 186                 pda->irqstackptr = boot_cpu_stack;
 187         } else {
 188                 pda->irqstackptr = (char *)
 189                         __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
 190                 if (!pda->irqstackptr)
 191                         panic("cannot allocate irqstack for cpu %d", cpu);
 192         }
 193
 194
 195         pda->irqstackptr += IRQSTACKSIZE-64;
 196 }
 197
 198 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
 199 __attribute__((section(".bss.page_aligned")));
 200
 201 extern asmlinkage void ignore_sysret(void);
 202
 203 /* May not be marked __init: used by software suspend */
 204 void syscall_init(void)
 205 {
 206         /*
 207          * LSTAR and STAR live in a bit strange symbiosis.
 208          * They both write to the same internal register. STAR allows to set CS/DS
 209          * but only a 32bit target. LSTAR sets the 64bit rip.
 210          */
 211         wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
 212         wrmsrl(MSR_LSTAR, system_call);
 213         wrmsrl(MSR_CSTAR, ignore_sysret);
 214
 215 #ifdef CONFIG_IA32_EMULATION
 216         syscall32_cpu_init ();
 217 #endif
 218
 219         /* Flags to clear on syscall */
 220         wrmsrl(MSR_SYSCALL_MASK,
 221                X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_IOPL);
 222 }
 223
 224 void __cpuinit check_efer(void)
 225 {
 226         unsigned long efer;
 227
 228         rdmsrl(MSR_EFER, efer);
 229         if (!(efer & EFER_NX) || do_not_nx) {
 230                 __supported_pte_mask &= ~_PAGE_NX;
 231         }
 232 }
 233
 234 unsigned long kernel_eflags;
 235
 236 /*
 237  * Copies of the original ist values from the tss are only accessed during
 238  * debugging, no special alignment required.
 239  */
 240 DEFINE_PER_CPU(struct orig_ist, orig_ist);
 241
 242 /*
 243  * cpu_init() initializes state that is per-CPU. Some data is already
 244  * initialized (naturally) in the bootstrap process, such as the GDT
 245  * and IDT. We reload them nevertheless, this function acts as a
 246  * 'CPU state barrier', nothing should get across.
 247  * A lot of state is already set up in PDA init.
 248  */
 249 void __cpuinit cpu_init (void)
 250 {
 251         int cpu = stack_smp_processor_id();
 252         struct tss_struct *t = &per_cpu(init_tss, cpu);
 253         struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
 254         unsigned long v;
 255         char *estacks = NULL;
 256         struct task_struct *me;
 257         int i;
 258
 259         /* CPU 0 is initialised in head64.c */
 260         if (cpu != 0) {
 261                 pda_init(cpu);
 262         } else
 263                 estacks = boot_exception_stacks;
 264
 265         me = current;
 266
 267         if (cpu_test_and_set(cpu, cpu_initialized))
 268                 panic("CPU#%d already initialized!\n", cpu);
 269
 270         printk("Initializing CPU#%d\n", cpu);
 271
 272         clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 273
 274         /*
 275          * Initialize the per-CPU GDT with the boot GDT,
 276          * and set up the GDT descriptor:
 277          */
 278         if (cpu)
 279                 memcpy(get_cpu_gdt_table(cpu), cpu_gdt_table, GDT_SIZE);
 280
 281         cpu_gdt_descr[cpu].size = GDT_SIZE;
 282         load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
 283         load_idt((const struct desc_ptr *)&idt_descr);
 284
 285         memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
 286         syscall_init();
 287
 288         wrmsrl(MSR_FS_BASE, 0);
 289         wrmsrl(MSR_KERNEL_GS_BASE, 0);
 290         barrier();
 291
 292         check_efer();
 293
 294         /*
 295          * set up and load the per-CPU TSS
 296          */
 297         for (v = 0; v < N_EXCEPTION_STACKS; v++) {
 298                 static const unsigned int order[N_EXCEPTION_STACKS] = {
 299                         [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
 300                         [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
 301                 };
 302                 if (cpu) {
 303                         estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
 304                         if (!estacks)
 305                                 panic("Cannot allocate exception stack %ld %d\n",
 306                                       v, cpu);
 307                 }
 308                 estacks += PAGE_SIZE << order[v];
 309                 orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
 310         }
 311
 312         t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
 313         /*
 314          * <= is required because the CPU will access up to
 315          * 8 bits beyond the end of the IO permission bitmap.
 316          */
 317         for (i = 0; i <= IO_BITMAP_LONGS; i++)
 318                 t->io_bitmap[i] = ~0UL;
 319
 320         atomic_inc(&init_mm.mm_count);
 321         me->active_mm = &init_mm;
 322         if (me->mm)
 323                 BUG();
 324         enter_lazy_tlb(&init_mm, me);
 325
 326         set_tss_desc(cpu, t);
 327         load_TR_desc();
 328         load_LDT(&init_mm.context);
 329
 330         /*
 331          * Clear all 6 debug registers:
 332          */
 333
 334         set_debugreg(0UL, 0);
 335         set_debugreg(0UL, 1);
 336         set_debugreg(0UL, 2);
 337         set_debugreg(0UL, 3);
 338         set_debugreg(0UL, 6);
 339         set_debugreg(0UL, 7);
 340
 341         fpu_init();
 342
 343         raw_local_save_flags(kernel_eflags);
 344 }