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Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / x86 / kernel / cpu / cpufreq / powernow-k8.c
blobc99d59d8ef2ea46694ac8b3da1cb07de2714cf10
1 /*
2 * (c) 2003-2006 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
6 *
7 * Support : mark.langsdorf@amd.com
8 *
9 * Based on the powernow-k7.c module written by Dave Jones.
10 * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs
11 * (C) 2004 Dominik Brodowski <linux@brodo.de>
12 * (C) 2004 Pavel Machek <pavel@suse.cz>
13 * Licensed under the terms of the GNU GPL License version 2.
14 * Based upon datasheets & sample CPUs kindly provided by AMD.
15 *
16 * Valuable input gratefully received from Dave Jones, Pavel Machek,
17 * Dominik Brodowski, Jacob Shin, and others.
18 * Originally developed by Paul Devriendt.
19 * Processor information obtained from Chapter 9 (Power and Thermal Management)
20 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
21 * Opteron Processors" available for download from www.amd.com
22 *
23 * Tables for specific CPUs can be inferred from
24 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
25 */
26
27 #include <linux/kernel.h>
28 #include <linux/smp.h>
29 #include <linux/module.h>
30 #include <linux/init.h>
31 #include <linux/cpufreq.h>
32 #include <linux/slab.h>
33 #include <linux/string.h>
34 #include <linux/cpumask.h>
35 #include <linux/sched.h> /* for current / set_cpus_allowed() */
36
37 #include <asm/msr.h>
38 #include <asm/io.h>
39 #include <asm/delay.h>
40
41 #ifdef CONFIG_X86_POWERNOW_K8_ACPI
42 #include <linux/acpi.h>
43 #include <linux/mutex.h>
44 #include <acpi/processor.h>
45 #endif
46
47 #define PFX "powernow-k8: "
48 #define BFX PFX "BIOS error: "
49 #define VERSION "version 2.20.00"
50 #include "powernow-k8.h"
51
52 /* serialize freq changes */
53 static DEFINE_MUTEX(fidvid_mutex);
54
55 static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
56
57 static int cpu_family = CPU_OPTERON;
58
59 #ifndef CONFIG_SMP
60 DEFINE_PER_CPU(cpumask_t, cpu_core_map);
61 #endif
62
63 /* Return a frequency in MHz, given an input fid */
64 static u32 find_freq_from_fid(u32 fid)
65 {
66 return 800 + (fid * 100);
67 }
68
69
70 /* Return a frequency in KHz, given an input fid */
71 static u32 find_khz_freq_from_fid(u32 fid)
72 {
73 return 1000 * find_freq_from_fid(fid);
74 }
75
76 static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, u32 pstate)
77 {
78 return data[pstate].frequency;
79 }
80
81
82 /* Return the vco fid for an input fid
83 *
84 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
85 * only from corresponding high fids. This returns "high" fid corresponding to
86 * "low" one.
87 */
88 static u32 convert_fid_to_vco_fid(u32 fid)
89 {
90 if (fid < HI_FID_TABLE_BOTTOM)
91 return 8 + (2 * fid);
92 else
93 return fid;
94 }
95
96 /*
97 * Return 1 if the pending bit is set. Unless we just instructed the processor
98 * to transition to a new state, seeing this bit set is really bad news.
99 */
100 static int pending_bit_stuck(void)
101 {
102 u32 lo, hi;
103
104 if (cpu_family == CPU_HW_PSTATE)
105 return 0;
106
107 rdmsr(MSR_FIDVID_STATUS, lo, hi);
108 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
109 }
110
111 /*
112 * Update the global current fid / vid values from the status msr.
113 * Returns 1 on error.
114 */
115 static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
116 {
117 u32 lo, hi;
118 u32 i = 0;
119
120 if (cpu_family == CPU_HW_PSTATE) {
121 rdmsr(MSR_PSTATE_STATUS, lo, hi);
122 i = lo & HW_PSTATE_MASK;
123 data->currpstate = i;
124 return 0;
125 }
126 do {
127 if (i++ > 10000) {
128 dprintk("detected change pending stuck\n");
129 return 1;
130 }
131 rdmsr(MSR_FIDVID_STATUS, lo, hi);
132 } while (lo & MSR_S_LO_CHANGE_PENDING);
133
134 data->currvid = hi & MSR_S_HI_CURRENT_VID;
135 data->currfid = lo & MSR_S_LO_CURRENT_FID;
136
137 return 0;
138 }
139
140 /* the isochronous relief time */
141 static void count_off_irt(struct powernow_k8_data *data)
142 {
143 udelay((1 << data->irt) * 10);
144 return;
145 }
146
147 /* the voltage stabilization time */
148 static void count_off_vst(struct powernow_k8_data *data)
149 {
150 udelay(data->vstable * VST_UNITS_20US);
151 return;
152 }
153
154 /* need to init the control msr to a safe value (for each cpu) */
155 static void fidvid_msr_init(void)
156 {
157 u32 lo, hi;
158 u8 fid, vid;
159
160 rdmsr(MSR_FIDVID_STATUS, lo, hi);
161 vid = hi & MSR_S_HI_CURRENT_VID;
162 fid = lo & MSR_S_LO_CURRENT_FID;
163 lo = fid | (vid << MSR_C_LO_VID_SHIFT);
164 hi = MSR_C_HI_STP_GNT_BENIGN;
165 dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
166 wrmsr(MSR_FIDVID_CTL, lo, hi);
167 }
168
169
170 /* write the new fid value along with the other control fields to the msr */
171 static int write_new_fid(struct powernow_k8_data *data, u32 fid)
172 {
173 u32 lo;
174 u32 savevid = data->currvid;
175 u32 i = 0;
176
177 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
178 printk(KERN_ERR PFX "internal error - overflow on fid write\n");
179 return 1;
180 }
181
182 lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
183
184 dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
185 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
186
187 do {
188 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
189 if (i++ > 100) {
190 printk(KERN_ERR PFX "Hardware error - pending bit very stuck - no further pstate changes possible\n");
191 return 1;
192 }
193 } while (query_current_values_with_pending_wait(data));
194
195 count_off_irt(data);
196
197 if (savevid != data->currvid) {
198 printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
199 savevid, data->currvid);
200 return 1;
201 }
202
203 if (fid != data->currfid) {
204 printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
205 data->currfid);
206 return 1;
207 }
208
209 return 0;
210 }
211
212 /* Write a new vid to the hardware */
213 static int write_new_vid(struct powernow_k8_data *data, u32 vid)
214 {
215 u32 lo;
216 u32 savefid = data->currfid;
217 int i = 0;
218
219 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
220 printk(KERN_ERR PFX "internal error - overflow on vid write\n");
221 return 1;
222 }
223
224 lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
225
226 dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
227 vid, lo, STOP_GRANT_5NS);
228
229 do {
230 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
231 if (i++ > 100) {
232 printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
233 return 1;
234 }
235 } while (query_current_values_with_pending_wait(data));
236
237 if (savefid != data->currfid) {
238 printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
239 savefid, data->currfid);
240 return 1;
241 }
242
243 if (vid != data->currvid) {
244 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
245 data->currvid);
246 return 1;
247 }
248
249 return 0;
250 }
251
252 /*
253 * Reduce the vid by the max of step or reqvid.
254 * Decreasing vid codes represent increasing voltages:
255 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
256 */
257 static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
258 {
259 if ((data->currvid - reqvid) > step)
260 reqvid = data->currvid - step;
261
262 if (write_new_vid(data, reqvid))
263 return 1;
264
265 count_off_vst(data);
266
267 return 0;
268 }
269
270 /* Change hardware pstate by single MSR write */
271 static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
272 {
273 wrmsr(MSR_PSTATE_CTRL, pstate, 0);
274 data->currpstate = pstate;
275 return 0;
276 }
277
278 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
279 static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
280 {
281 if (core_voltage_pre_transition(data, reqvid))
282 return 1;
283
284 if (core_frequency_transition(data, reqfid))
285 return 1;
286
287 if (core_voltage_post_transition(data, reqvid))
288 return 1;
289
290 if (query_current_values_with_pending_wait(data))
291 return 1;
292
293 if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
294 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
295 smp_processor_id(),
296 reqfid, reqvid, data->currfid, data->currvid);
297 return 1;
298 }
299
300 dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
301 smp_processor_id(), data->currfid, data->currvid);
302
303 return 0;
304 }
305
306 /* Phase 1 - core voltage transition ... setup voltage */
307 static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
308 {
309 u32 rvosteps = data->rvo;
310 u32 savefid = data->currfid;
311 u32 maxvid, lo;
312
313 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
314 smp_processor_id(),
315 data->currfid, data->currvid, reqvid, data->rvo);
316
317 rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
318 maxvid = 0x1f & (maxvid >> 16);
319 dprintk("ph1 maxvid=0x%x\n", maxvid);
320 if (reqvid < maxvid) /* lower numbers are higher voltages */
321 reqvid = maxvid;
322
323 while (data->currvid > reqvid) {
324 dprintk("ph1: curr 0x%x, req vid 0x%x\n",
325 data->currvid, reqvid);
326 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
327 return 1;
328 }
329
330 while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
331 if (data->currvid == maxvid) {
332 rvosteps = 0;
333 } else {
334 dprintk("ph1: changing vid for rvo, req 0x%x\n",
335 data->currvid - 1);
336 if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
337 return 1;
338 rvosteps--;
339 }
340 }
341
342 if (query_current_values_with_pending_wait(data))
343 return 1;
344
345 if (savefid != data->currfid) {
346 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
347 return 1;
348 }
349
350 dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
351 data->currfid, data->currvid);
352
353 return 0;
354 }
355
356 /* Phase 2 - core frequency transition */
357 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
358 {
359 u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid;
360
361 if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
362 printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
363 reqfid, data->currfid);
364 return 1;
365 }
366
367 if (data->currfid == reqfid) {
368 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
369 return 0;
370 }
371
372 dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
373 smp_processor_id(),
374 data->currfid, data->currvid, reqfid);
375
376 vcoreqfid = convert_fid_to_vco_fid(reqfid);
377 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
378 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
379 : vcoreqfid - vcocurrfid;
380
381 while (vcofiddiff > 2) {
382 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
383
384 if (reqfid > data->currfid) {
385 if (data->currfid > LO_FID_TABLE_TOP) {
386 if (write_new_fid(data, data->currfid + fid_interval)) {
387 return 1;
388 }
389 } else {
390 if (write_new_fid
391 (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
392 return 1;
393 }
394 }
395 } else {
396 if (write_new_fid(data, data->currfid - fid_interval))
397 return 1;
398 }
399
400 vcocurrfid = convert_fid_to_vco_fid(data->currfid);
401 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
402 : vcoreqfid - vcocurrfid;
403 }
404
405 if (write_new_fid(data, reqfid))
406 return 1;
407
408 if (query_current_values_with_pending_wait(data))
409 return 1;
410
411 if (data->currfid != reqfid) {
412 printk(KERN_ERR PFX
413 "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
414 data->currfid, reqfid);
415 return 1;
416 }
417
418 if (savevid != data->currvid) {
419 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
420 savevid, data->currvid);
421 return 1;
422 }
423
424 dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
425 data->currfid, data->currvid);
426
427 return 0;
428 }
429
430 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
431 static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
432 {
433 u32 savefid = data->currfid;
434 u32 savereqvid = reqvid;
435
436 dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
437 smp_processor_id(),
438 data->currfid, data->currvid);
439
440 if (reqvid != data->currvid) {
441 if (write_new_vid(data, reqvid))
442 return 1;
443
444 if (savefid != data->currfid) {
445 printk(KERN_ERR PFX
446 "ph3: bad fid change, save 0x%x, curr 0x%x\n",
447 savefid, data->currfid);
448 return 1;
449 }
450
451 if (data->currvid != reqvid) {
452 printk(KERN_ERR PFX
453 "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
454 reqvid, data->currvid);
455 return 1;
456 }
457 }
458
459 if (query_current_values_with_pending_wait(data))
460 return 1;
461
462 if (savereqvid != data->currvid) {
463 dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
464 return 1;
465 }
466
467 if (savefid != data->currfid) {
468 dprintk("ph3 failed, currfid changed 0x%x\n",
469 data->currfid);
470 return 1;
471 }
472
473 dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
474 data->currfid, data->currvid);
475
476 return 0;
477 }
478
479 static int check_supported_cpu(unsigned int cpu)
480 {
481 cpumask_t oldmask = CPU_MASK_ALL;
482 u32 eax, ebx, ecx, edx;
483 unsigned int rc = 0;
484
485 oldmask = current->cpus_allowed;
486 set_cpus_allowed(current, cpumask_of_cpu(cpu));
487
488 if (smp_processor_id() != cpu) {
489 printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu);
490 goto out;
491 }
492
493 if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
494 goto out;
495
496 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
497 if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
498 ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
499 goto out;
500
501 if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
502 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
503 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
504 printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
505 goto out;
506 }
507
508 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
509 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
510 printk(KERN_INFO PFX
511 "No frequency change capabilities detected\n");
512 goto out;
513 }
514
515 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
516 if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
517 printk(KERN_INFO PFX "Power state transitions not supported\n");
518 goto out;
519 }
520 } else { /* must be a HW Pstate capable processor */
521 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
522 if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
523 cpu_family = CPU_HW_PSTATE;
524 else
525 goto out;
526 }
527
528 rc = 1;
529
530 out:
531 set_cpus_allowed(current, oldmask);
532 return rc;
533 }
534
535 static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
536 {
537 unsigned int j;
538 u8 lastfid = 0xff;
539
540 for (j = 0; j < data->numps; j++) {
541 if (pst[j].vid > LEAST_VID) {
542 printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid);
543 return -EINVAL;
544 }
545 if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */
546 printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j);
547 return -ENODEV;
548 }
549 if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */
550 printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j);
551 return -ENODEV;
552 }
553 if (pst[j].fid > MAX_FID) {
554 printk(KERN_ERR BFX "maxfid exceeded with pstate %d\n", j);
555 return -ENODEV;
556 }
557 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
558 /* Only first fid is allowed to be in "low" range */
559 printk(KERN_ERR BFX "two low fids - %d : 0x%x\n", j, pst[j].fid);
560 return -EINVAL;
561 }
562 if (pst[j].fid < lastfid)
563 lastfid = pst[j].fid;
564 }
565 if (lastfid & 1) {
566 printk(KERN_ERR BFX "lastfid invalid\n");
567 return -EINVAL;
568 }
569 if (lastfid > LO_FID_TABLE_TOP)
570 printk(KERN_INFO BFX "first fid not from lo freq table\n");
571
572 return 0;
573 }
574
575 static void print_basics(struct powernow_k8_data *data)
576 {
577 int j;
578 for (j = 0; j < data->numps; j++) {
579 if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) {
580 if (cpu_family == CPU_HW_PSTATE) {
581 printk(KERN_INFO PFX " %d : pstate %d (%d MHz)\n",
582 j,
583 data->powernow_table[j].index,
584 data->powernow_table[j].frequency/1000);
585 } else {
586 printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x\n",
587 j,
588 data->powernow_table[j].index & 0xff,
589 data->powernow_table[j].frequency/1000,
590 data->powernow_table[j].index >> 8);
591 }
592 }
593 }
594 if (data->batps)
595 printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
596 }
597
598 static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
599 {
600 struct cpufreq_frequency_table *powernow_table;
601 unsigned int j;
602
603 if (data->batps) { /* use ACPI support to get full speed on mains power */
604 printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
605 data->numps = data->batps;
606 }
607
608 for ( j=1; j<data->numps; j++ ) {
609 if (pst[j-1].fid >= pst[j].fid) {
610 printk(KERN_ERR PFX "PST out of sequence\n");
611 return -EINVAL;
612 }
613 }
614
615 if (data->numps < 2) {
616 printk(KERN_ERR PFX "no p states to transition\n");
617 return -ENODEV;
618 }
619
620 if (check_pst_table(data, pst, maxvid))
621 return -EINVAL;
622
623 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
624 * (data->numps + 1)), GFP_KERNEL);
625 if (!powernow_table) {
626 printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
627 return -ENOMEM;
628 }
629
630 for (j = 0; j < data->numps; j++) {
631 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
632 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
633 powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
634 }
635 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
636 powernow_table[data->numps].index = 0;
637
638 if (query_current_values_with_pending_wait(data)) {
639 kfree(powernow_table);
640 return -EIO;
641 }
642
643 dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
644 data->powernow_table = powernow_table;
645 if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu)
646 print_basics(data);
647
648 for (j = 0; j < data->numps; j++)
649 if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
650 return 0;
651
652 dprintk("currfid/vid do not match PST, ignoring\n");
653 return 0;
654 }
655
656 /* Find and validate the PSB/PST table in BIOS. */
657 static int find_psb_table(struct powernow_k8_data *data)
658 {
659 struct psb_s *psb;
660 unsigned int i;
661 u32 mvs;
662 u8 maxvid;
663 u32 cpst = 0;
664 u32 thiscpuid;
665
666 for (i = 0xc0000; i < 0xffff0; i += 0x10) {
667 /* Scan BIOS looking for the signature. */
668 /* It can not be at ffff0 - it is too big. */
669
670 psb = phys_to_virt(i);
671 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
672 continue;
673
674 dprintk("found PSB header at 0x%p\n", psb);
675
676 dprintk("table vers: 0x%x\n", psb->tableversion);
677 if (psb->tableversion != PSB_VERSION_1_4) {
678 printk(KERN_ERR BFX "PSB table is not v1.4\n");
679 return -ENODEV;
680 }
681
682 dprintk("flags: 0x%x\n", psb->flags1);
683 if (psb->flags1) {
684 printk(KERN_ERR BFX "unknown flags\n");
685 return -ENODEV;
686 }
687
688 data->vstable = psb->vstable;
689 dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
690
691 dprintk("flags2: 0x%x\n", psb->flags2);
692 data->rvo = psb->flags2 & 3;
693 data->irt = ((psb->flags2) >> 2) & 3;
694 mvs = ((psb->flags2) >> 4) & 3;
695 data->vidmvs = 1 << mvs;
696 data->batps = ((psb->flags2) >> 6) & 3;
697
698 dprintk("ramp voltage offset: %d\n", data->rvo);
699 dprintk("isochronous relief time: %d\n", data->irt);
700 dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
701
702 dprintk("numpst: 0x%x\n", psb->num_tables);
703 cpst = psb->num_tables;
704 if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
705 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
706 if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
707 cpst = 1;
708 }
709 }
710 if (cpst != 1) {
711 printk(KERN_ERR BFX "numpst must be 1\n");
712 return -ENODEV;
713 }
714
715 data->plllock = psb->plllocktime;
716 dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
717 dprintk("maxfid: 0x%x\n", psb->maxfid);
718 dprintk("maxvid: 0x%x\n", psb->maxvid);
719 maxvid = psb->maxvid;
720
721 data->numps = psb->numps;
722 dprintk("numpstates: 0x%x\n", data->numps);
723 return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
724 }
725 /*
726 * If you see this message, complain to BIOS manufacturer. If
727 * he tells you "we do not support Linux" or some similar
728 * nonsense, remember that Windows 2000 uses the same legacy
729 * mechanism that the old Linux PSB driver uses. Tell them it
730 * is broken with Windows 2000.
731 *
732 * The reference to the AMD documentation is chapter 9 in the
733 * BIOS and Kernel Developer's Guide, which is available on
734 * www.amd.com
735 */
736 printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n");
737 return -ENODEV;
738 }
739
740 #ifdef CONFIG_X86_POWERNOW_K8_ACPI
741 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
742 {
743 if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
744 return;
745
746 data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
747 data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
748 data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
749 data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
750 data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
751 data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
752 }
753
754 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
755 {
756 struct cpufreq_frequency_table *powernow_table;
757 int ret_val;
758
759 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
760 dprintk("register performance failed: bad ACPI data\n");
761 return -EIO;
762 }
763
764 /* verify the data contained in the ACPI structures */
765 if (data->acpi_data.state_count <= 1) {
766 dprintk("No ACPI P-States\n");
767 goto err_out;
768 }
769
770 if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
771 (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
772 dprintk("Invalid control/status registers (%x - %x)\n",
773 data->acpi_data.control_register.space_id,
774 data->acpi_data.status_register.space_id);
775 goto err_out;
776 }
777
778 /* fill in data->powernow_table */
779 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
780 * (data->acpi_data.state_count + 1)), GFP_KERNEL);
781 if (!powernow_table) {
782 dprintk("powernow_table memory alloc failure\n");
783 goto err_out;
784 }
785
786 if (cpu_family == CPU_HW_PSTATE)
787 ret_val = fill_powernow_table_pstate(data, powernow_table);
788 else
789 ret_val = fill_powernow_table_fidvid(data, powernow_table);
790 if (ret_val)
791 goto err_out_mem;
792
793 powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
794 powernow_table[data->acpi_data.state_count].index = 0;
795 data->powernow_table = powernow_table;
796
797 /* fill in data */
798 data->numps = data->acpi_data.state_count;
799 if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu)
800 print_basics(data);
801 powernow_k8_acpi_pst_values(data, 0);
802
803 /* notify BIOS that we exist */
804 acpi_processor_notify_smm(THIS_MODULE);
805
806 return 0;
807
808 err_out_mem:
809 kfree(powernow_table);
810
811 err_out:
812 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
813
814 /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
815 data->acpi_data.state_count = 0;
816
817 return -ENODEV;
818 }
819
820 static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
821 {
822 int i;
823 u32 hi = 0, lo = 0;
824 rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo);
825 data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
826
827 for (i = 0; i < data->acpi_data.state_count; i++) {
828 u32 index;
829
830 index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
831 if (index > data->max_hw_pstate) {
832 printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
833 printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
834 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
835 continue;
836 }
837 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
838 if (!(hi & HW_PSTATE_VALID_MASK)) {
839 dprintk("invalid pstate %d, ignoring\n", index);
840 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
841 continue;
842 }
843
844 powernow_table[i].index = index;
845
846 powernow_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000;
847 }
848 return 0;
849 }
850
851 static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
852 {
853 int i;
854 int cntlofreq = 0;
855 for (i = 0; i < data->acpi_data.state_count; i++) {
856 u32 fid;
857 u32 vid;
858
859 if (data->exttype) {
860 fid = data->acpi_data.states[i].status & EXT_FID_MASK;
861 vid = (data->acpi_data.states[i].status >> VID_SHIFT) & EXT_VID_MASK;
862 } else {
863 fid = data->acpi_data.states[i].control & FID_MASK;
864 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
865 }
866
867 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
868
869 powernow_table[i].index = fid; /* lower 8 bits */
870 powernow_table[i].index |= (vid << 8); /* upper 8 bits */
871 powernow_table[i].frequency = find_khz_freq_from_fid(fid);
872
873 /* verify frequency is OK */
874 if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
875 (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
876 dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
877 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
878 continue;
879 }
880
881 /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
882 if (vid == VID_OFF) {
883 dprintk("invalid vid %u, ignoring\n", vid);
884 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
885 continue;
886 }
887
888 /* verify only 1 entry from the lo frequency table */
889 if (fid < HI_FID_TABLE_BOTTOM) {
890 if (cntlofreq) {
891 /* if both entries are the same, ignore this one ... */
892 if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
893 (powernow_table[i].index != powernow_table[cntlofreq].index)) {
894 printk(KERN_ERR PFX "Too many lo freq table entries\n");
895 return 1;
896 }
897
898 dprintk("double low frequency table entry, ignoring it.\n");
899 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
900 continue;
901 } else
902 cntlofreq = i;
903 }
904
905 if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
906 printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
907 powernow_table[i].frequency,
908 (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
909 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
910 continue;
911 }
912 }
913 return 0;
914 }
915
916 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
917 {
918 if (data->acpi_data.state_count)
919 acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
920 }
921
922 #else
923 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
924 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
925 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
926 #endif /* CONFIG_X86_POWERNOW_K8_ACPI */
927
928 /* Take a frequency, and issue the fid/vid transition command */
929 static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned int index)
930 {
931 u32 fid = 0;
932 u32 vid = 0;
933 int res, i;
934 struct cpufreq_freqs freqs;
935
936 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
937
938 /* fid/vid correctness check for k8 */
939 /* fid are the lower 8 bits of the index we stored into
940 * the cpufreq frequency table in find_psb_table, vid
941 * are the upper 8 bits.
942 */
943 fid = data->powernow_table[index].index & 0xFF;
944 vid = (data->powernow_table[index].index & 0xFF00) >> 8;
945
946 dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
947
948 if (query_current_values_with_pending_wait(data))
949 return 1;
950
951 if ((data->currvid == vid) && (data->currfid == fid)) {
952 dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
953 fid, vid);
954 return 0;
955 }
956
957 if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
958 printk(KERN_ERR PFX
959 "ignoring illegal change in lo freq table-%x to 0x%x\n",
960 data->currfid, fid);
961 return 1;
962 }
963
964 dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
965 smp_processor_id(), fid, vid);
966 freqs.old = find_khz_freq_from_fid(data->currfid);
967 freqs.new = find_khz_freq_from_fid(fid);
968
969 for_each_cpu_mask(i, *(data->available_cores)) {
970 freqs.cpu = i;
971 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
972 }
973
974 res = transition_fid_vid(data, fid, vid);
975 freqs.new = find_khz_freq_from_fid(data->currfid);
976
977 for_each_cpu_mask(i, *(data->available_cores)) {
978 freqs.cpu = i;
979 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
980 }
981 return res;
982 }
983
984 /* Take a frequency, and issue the hardware pstate transition command */
985 static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index)
986 {
987 u32 pstate = 0;
988 int res, i;
989 struct cpufreq_freqs freqs;
990
991 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
992
993 /* get MSR index for hardware pstate transition */
994 pstate = index & HW_PSTATE_MASK;
995 if (pstate > data->max_hw_pstate)
996 return 0;
997 freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
998 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
999
1000 for_each_cpu_mask(i, *(data->available_cores)) {
1001 freqs.cpu = i;
1002 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
1003 }
1004
1005 res = transition_pstate(data, pstate);
1006 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
1007
1008 for_each_cpu_mask(i, *(data->available_cores)) {
1009 freqs.cpu = i;
1010 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
1011 }
1012 return res;
1013 }
1014
1015 /* Driver entry point to switch to the target frequency */
1016 static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
1017 {
1018 cpumask_t oldmask = CPU_MASK_ALL;
1019 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1020 u32 checkfid;
1021 u32 checkvid;
1022 unsigned int newstate;
1023 int ret = -EIO;
1024
1025 if (!data)
1026 return -EINVAL;
1027
1028 checkfid = data->currfid;
1029 checkvid = data->currvid;
1030
1031 /* only run on specific CPU from here on */
1032 oldmask = current->cpus_allowed;
1033 set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
1034
1035 if (smp_processor_id() != pol->cpu) {
1036 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
1037 goto err_out;
1038 }
1039
1040 if (pending_bit_stuck()) {
1041 printk(KERN_ERR PFX "failing targ, change pending bit set\n");
1042 goto err_out;
1043 }
1044
1045 dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
1046 pol->cpu, targfreq, pol->min, pol->max, relation);
1047
1048 if (query_current_values_with_pending_wait(data))
1049 goto err_out;
1050
1051 if (cpu_family != CPU_HW_PSTATE) {
1052 dprintk("targ: curr fid 0x%x, vid 0x%x\n",
1053 data->currfid, data->currvid);
1054
1055 if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
1056 printk(KERN_INFO PFX
1057 "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
1058 checkfid, data->currfid, checkvid, data->currvid);
1059 }
1060 }
1061
1062 if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
1063 goto err_out;
1064
1065 mutex_lock(&fidvid_mutex);
1066
1067 powernow_k8_acpi_pst_values(data, newstate);
1068
1069 if (cpu_family == CPU_HW_PSTATE)
1070 ret = transition_frequency_pstate(data, newstate);
1071 else
1072 ret = transition_frequency_fidvid(data, newstate);
1073 if (ret) {
1074 printk(KERN_ERR PFX "transition frequency failed\n");
1075 ret = 1;
1076 mutex_unlock(&fidvid_mutex);
1077 goto err_out;
1078 }
1079 mutex_unlock(&fidvid_mutex);
1080
1081 if (cpu_family == CPU_HW_PSTATE)
1082 pol->cur = find_khz_freq_from_pstate(data->powernow_table, newstate);
1083 else
1084 pol->cur = find_khz_freq_from_fid(data->currfid);
1085 ret = 0;
1086
1087 err_out:
1088 set_cpus_allowed(current, oldmask);
1089 return ret;
1090 }
1091
1092 /* Driver entry point to verify the policy and range of frequencies */
1093 static int powernowk8_verify(struct cpufreq_policy *pol)
1094 {
1095 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1096
1097 if (!data)
1098 return -EINVAL;
1099
1100 return cpufreq_frequency_table_verify(pol, data->powernow_table);
1101 }
1102
1103 /* per CPU init entry point to the driver */
1104 static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
1105 {
1106 struct powernow_k8_data *data;
1107 cpumask_t oldmask = CPU_MASK_ALL;
1108 int rc;
1109
1110 if (!cpu_online(pol->cpu))
1111 return -ENODEV;
1112
1113 if (!check_supported_cpu(pol->cpu))
1114 return -ENODEV;
1115
1116 data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
1117 if (!data) {
1118 printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
1119 return -ENOMEM;
1120 }
1121
1122 data->cpu = pol->cpu;
1123
1124 if (powernow_k8_cpu_init_acpi(data)) {
1125 /*
1126 * Use the PSB BIOS structure. This is only availabe on
1127 * an UP version, and is deprecated by AMD.
1128 */
1129 if (num_online_cpus() != 1) {
1130 printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
1131 kfree(data);
1132 return -ENODEV;
1133 }
1134 if (pol->cpu != 0) {
1135 printk(KERN_ERR PFX "No _PSS objects for CPU other than CPU0\n");
1136 kfree(data);
1137 return -ENODEV;
1138 }
1139 rc = find_psb_table(data);
1140 if (rc) {
1141 kfree(data);
1142 return -ENODEV;
1143 }
1144 }
1145
1146 /* only run on specific CPU from here on */
1147 oldmask = current->cpus_allowed;
1148 set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
1149
1150 if (smp_processor_id() != pol->cpu) {
1151 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
1152 goto err_out;
1153 }
1154
1155 if (pending_bit_stuck()) {
1156 printk(KERN_ERR PFX "failing init, change pending bit set\n");
1157 goto err_out;
1158 }
1159
1160 if (query_current_values_with_pending_wait(data))
1161 goto err_out;
1162
1163 if (cpu_family == CPU_OPTERON)
1164 fidvid_msr_init();
1165
1166 /* run on any CPU again */
1167 set_cpus_allowed(current, oldmask);
1168
1169 if (cpu_family == CPU_HW_PSTATE)
1170 pol->cpus = cpumask_of_cpu(pol->cpu);
1171 else
1172 pol->cpus = per_cpu(cpu_core_map, pol->cpu);
1173 data->available_cores = &(pol->cpus);
1174
1175 /* Take a crude guess here.
1176 * That guess was in microseconds, so multiply with 1000 */
1177 pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
1178 + (3 * (1 << data->irt) * 10)) * 1000;
1179
1180 if (cpu_family == CPU_HW_PSTATE)
1181 pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
1182 else
1183 pol->cur = find_khz_freq_from_fid(data->currfid);
1184 dprintk("policy current frequency %d kHz\n", pol->cur);
1185
1186 /* min/max the cpu is capable of */
1187 if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
1188 printk(KERN_ERR PFX "invalid powernow_table\n");
1189 powernow_k8_cpu_exit_acpi(data);
1190 kfree(data->powernow_table);
1191 kfree(data);
1192 return -EINVAL;
1193 }
1194
1195 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
1196
1197 if (cpu_family == CPU_HW_PSTATE)
1198 dprintk("cpu_init done, current pstate 0x%x\n", data->currpstate);
1199 else
1200 dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
1201 data->currfid, data->currvid);
1202
1203 per_cpu(powernow_data, pol->cpu) = data;
1204
1205 return 0;
1206
1207 err_out:
1208 set_cpus_allowed(current, oldmask);
1209 powernow_k8_cpu_exit_acpi(data);
1210
1211 kfree(data);
1212 return -ENODEV;
1213 }
1214
1215 static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
1216 {
1217 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
1218
1219 if (!data)
1220 return -EINVAL;
1221
1222 powernow_k8_cpu_exit_acpi(data);
1223
1224 cpufreq_frequency_table_put_attr(pol->cpu);
1225
1226 kfree(data->powernow_table);
1227 kfree(data);
1228
1229 return 0;
1230 }
1231
1232 static unsigned int powernowk8_get (unsigned int cpu)
1233 {
1234 struct powernow_k8_data *data;
1235 cpumask_t oldmask = current->cpus_allowed;
1236 unsigned int khz = 0;
1237 unsigned int first;
1238
1239 first = first_cpu(per_cpu(cpu_core_map, cpu));
1240 data = per_cpu(powernow_data, first);
1241
1242 if (!data)
1243 return -EINVAL;
1244
1245 set_cpus_allowed(current, cpumask_of_cpu(cpu));
1246 if (smp_processor_id() != cpu) {
1247 printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu);
1248 set_cpus_allowed(current, oldmask);
1249 return 0;
1250 }
1251
1252 if (query_current_values_with_pending_wait(data))
1253 goto out;
1254
1255 if (cpu_family == CPU_HW_PSTATE)
1256 khz = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
1257 else
1258 khz = find_khz_freq_from_fid(data->currfid);
1259
1260
1261 out:
1262 set_cpus_allowed(current, oldmask);
1263 return khz;
1264 }
1265
1266 static struct freq_attr* powernow_k8_attr[] = {
1267 &cpufreq_freq_attr_scaling_available_freqs,
1268 NULL,
1269 };
1270
1271 static struct cpufreq_driver cpufreq_amd64_driver = {
1272 .verify = powernowk8_verify,
1273 .target = powernowk8_target,
1274 .init = powernowk8_cpu_init,
1275 .exit = __devexit_p(powernowk8_cpu_exit),
1276 .get = powernowk8_get,
1277 .name = "powernow-k8",
1278 .owner = THIS_MODULE,
1279 .attr = powernow_k8_attr,
1280 };
1281
1282 /* driver entry point for init */
1283 static int __cpuinit powernowk8_init(void)
1284 {
1285 unsigned int i, supported_cpus = 0;
1286
1287 for_each_online_cpu(i) {
1288 if (check_supported_cpu(i))
1289 supported_cpus++;
1290 }
1291
1292 if (supported_cpus == num_online_cpus()) {
1293 printk(KERN_INFO PFX "Found %d %s "
1294 "processors (%d cpu cores) (" VERSION ")\n",
1295 num_online_nodes(),
1296 boot_cpu_data.x86_model_id, supported_cpus);
1297 return cpufreq_register_driver(&cpufreq_amd64_driver);
1298 }
1299
1300 return -ENODEV;
1301 }
1302
1303 /* driver entry point for term */
1304 static void __exit powernowk8_exit(void)
1305 {
1306 dprintk("exit\n");
1307
1308 cpufreq_unregister_driver(&cpufreq_amd64_driver);
1309 }
1310
1311 MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>");
1312 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
1313 MODULE_LICENSE("GPL");
1314
1315 late_initcall(powernowk8_init);
1316 module_exit(powernowk8_exit);
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