Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / sparc64 / kernel / central.c
blobb61b8dfb09cfc6db9581bb1533d90ff00e813809
1 /* central.c: Central FHC driver for Sunfire/Starfire/Wildfire.
3 * Copyright (C) 1997, 1999 David S. Miller (davem@davemloft.net)
4 */
6 #include <linux/kernel.h>
7 #include <linux/types.h>
8 #include <linux/string.h>
9 #include <linux/timer.h>
10 #include <linux/sched.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/bootmem.h>
15 #include <asm/page.h>
16 #include <asm/fhc.h>
17 #include <asm/starfire.h>
19 struct linux_central *central_bus = NULL;
20 struct linux_fhc *fhc_list = NULL;
22 #define IS_CENTRAL_FHC(__fhc) ((__fhc) == central_bus->child)
24 static void central_probe_failure(int line)
26 prom_printf("CENTRAL: Critical device probe failure at central.c:%d\n",
27 line);
28 prom_halt();
31 static void central_ranges_init(struct linux_central *central)
33 struct device_node *dp = central->prom_node;
34 const void *pval;
35 int len;
37 central->num_central_ranges = 0;
38 pval = of_get_property(dp, "ranges", &len);
39 if (pval) {
40 memcpy(central->central_ranges, pval, len);
41 central->num_central_ranges =
42 (len / sizeof(struct linux_prom_ranges));
46 static void fhc_ranges_init(struct linux_fhc *fhc)
48 struct device_node *dp = fhc->prom_node;
49 const void *pval;
50 int len;
52 fhc->num_fhc_ranges = 0;
53 pval = of_get_property(dp, "ranges", &len);
54 if (pval) {
55 memcpy(fhc->fhc_ranges, pval, len);
56 fhc->num_fhc_ranges =
57 (len / sizeof(struct linux_prom_ranges));
61 /* Range application routines are exported to various drivers,
62 * so do not __init this.
64 static void adjust_regs(struct linux_prom_registers *regp, int nregs,
65 struct linux_prom_ranges *rangep, int nranges)
67 int regc, rngc;
69 for (regc = 0; regc < nregs; regc++) {
70 for (rngc = 0; rngc < nranges; rngc++)
71 if (regp[regc].which_io == rangep[rngc].ot_child_space)
72 break; /* Fount it */
73 if (rngc == nranges) /* oops */
74 central_probe_failure(__LINE__);
75 regp[regc].which_io = rangep[rngc].ot_parent_space;
76 regp[regc].phys_addr -= rangep[rngc].ot_child_base;
77 regp[regc].phys_addr += rangep[rngc].ot_parent_base;
81 /* Apply probed fhc ranges to registers passed, if no ranges return. */
82 void apply_fhc_ranges(struct linux_fhc *fhc,
83 struct linux_prom_registers *regs,
84 int nregs)
86 if (fhc->num_fhc_ranges)
87 adjust_regs(regs, nregs, fhc->fhc_ranges,
88 fhc->num_fhc_ranges);
91 /* Apply probed central ranges to registers passed, if no ranges return. */
92 void apply_central_ranges(struct linux_central *central,
93 struct linux_prom_registers *regs, int nregs)
95 if (central->num_central_ranges)
96 adjust_regs(regs, nregs, central->central_ranges,
97 central->num_central_ranges);
100 static void * __init central_alloc_bootmem(unsigned long size)
102 void *ret;
104 ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
105 if (ret != NULL)
106 memset(ret, 0, size);
108 return ret;
111 static unsigned long prom_reg_to_paddr(struct linux_prom_registers *r)
113 unsigned long ret = ((unsigned long) r->which_io) << 32;
115 return ret | (unsigned long) r->phys_addr;
118 static void __init probe_other_fhcs(void)
120 struct device_node *dp;
121 const struct linux_prom64_registers *fpregs;
123 for_each_node_by_name(dp, "fhc") {
124 struct linux_fhc *fhc;
125 int board;
126 u32 tmp;
128 if (dp->parent &&
129 dp->parent->parent != NULL)
130 continue;
132 fhc = (struct linux_fhc *)
133 central_alloc_bootmem(sizeof(struct linux_fhc));
134 if (fhc == NULL)
135 central_probe_failure(__LINE__);
137 /* Link it into the FHC chain. */
138 fhc->next = fhc_list;
139 fhc_list = fhc;
141 /* Toplevel FHCs have no parent. */
142 fhc->parent = NULL;
144 fhc->prom_node = dp;
145 fhc_ranges_init(fhc);
147 /* Non-central FHC's have 64-bit OBP format registers. */
148 fpregs = of_get_property(dp, "reg", NULL);
149 if (!fpregs)
150 central_probe_failure(__LINE__);
152 /* Only central FHC needs special ranges applied. */
153 fhc->fhc_regs.pregs = fpregs[0].phys_addr;
154 fhc->fhc_regs.ireg = fpregs[1].phys_addr;
155 fhc->fhc_regs.ffregs = fpregs[2].phys_addr;
156 fhc->fhc_regs.sregs = fpregs[3].phys_addr;
157 fhc->fhc_regs.uregs = fpregs[4].phys_addr;
158 fhc->fhc_regs.tregs = fpregs[5].phys_addr;
160 board = of_getintprop_default(dp, "board#", -1);
161 fhc->board = board;
163 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_JCTRL);
164 if ((tmp & FHC_JTAG_CTRL_MENAB) != 0)
165 fhc->jtag_master = 1;
166 else
167 fhc->jtag_master = 0;
169 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_ID);
170 printk("FHC(board %d): Version[%x] PartID[%x] Manuf[%x] %s\n",
171 board,
172 (tmp & FHC_ID_VERS) >> 28,
173 (tmp & FHC_ID_PARTID) >> 12,
174 (tmp & FHC_ID_MANUF) >> 1,
175 (fhc->jtag_master ? "(JTAG Master)" : ""));
177 /* This bit must be set in all non-central FHC's in
178 * the system. When it is clear, this identifies
179 * the central board.
181 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
182 tmp |= FHC_CONTROL_IXIST;
183 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
187 static void probe_clock_board(struct linux_central *central,
188 struct linux_fhc *fhc,
189 struct device_node *fp)
191 struct device_node *dp;
192 struct linux_prom_registers cregs[3];
193 const struct linux_prom_registers *pr;
194 int nslots, tmp, nregs;
196 dp = fp->child;
197 while (dp) {
198 if (!strcmp(dp->name, "clock-board"))
199 break;
200 dp = dp->sibling;
202 if (!dp)
203 central_probe_failure(__LINE__);
205 pr = of_get_property(dp, "reg", &nregs);
206 if (!pr)
207 central_probe_failure(__LINE__);
209 memcpy(cregs, pr, nregs);
210 nregs /= sizeof(struct linux_prom_registers);
212 apply_fhc_ranges(fhc, &cregs[0], nregs);
213 apply_central_ranges(central, &cregs[0], nregs);
214 central->cfreg = prom_reg_to_paddr(&cregs[0]);
215 central->clkregs = prom_reg_to_paddr(&cregs[1]);
217 if (nregs == 2)
218 central->clkver = 0UL;
219 else
220 central->clkver = prom_reg_to_paddr(&cregs[2]);
222 tmp = upa_readb(central->clkregs + CLOCK_STAT1);
223 tmp &= 0xc0;
224 switch(tmp) {
225 case 0x40:
226 nslots = 16;
227 break;
228 case 0xc0:
229 nslots = 8;
230 break;
231 case 0x80:
232 if (central->clkver != 0UL &&
233 upa_readb(central->clkver) != 0) {
234 if ((upa_readb(central->clkver) & 0x80) != 0)
235 nslots = 4;
236 else
237 nslots = 5;
238 break;
240 default:
241 nslots = 4;
242 break;
244 central->slots = nslots;
245 printk("CENTRAL: Detected %d slot Enterprise system. cfreg[%02x] cver[%02x]\n",
246 central->slots, upa_readb(central->cfreg),
247 (central->clkver ? upa_readb(central->clkver) : 0x00));
250 static void ZAP(unsigned long iclr, unsigned long imap)
252 u32 imap_tmp;
254 upa_writel(0, iclr);
255 upa_readl(iclr);
256 imap_tmp = upa_readl(imap);
257 imap_tmp &= ~(0x80000000);
258 upa_writel(imap_tmp, imap);
259 upa_readl(imap);
262 static void init_all_fhc_hw(void)
264 struct linux_fhc *fhc;
266 for (fhc = fhc_list; fhc != NULL; fhc = fhc->next) {
267 u32 tmp;
269 /* Clear all of the interrupt mapping registers
270 * just in case OBP left them in a foul state.
272 ZAP(fhc->fhc_regs.ffregs + FHC_FFREGS_ICLR,
273 fhc->fhc_regs.ffregs + FHC_FFREGS_IMAP);
274 ZAP(fhc->fhc_regs.sregs + FHC_SREGS_ICLR,
275 fhc->fhc_regs.sregs + FHC_SREGS_IMAP);
276 ZAP(fhc->fhc_regs.uregs + FHC_UREGS_ICLR,
277 fhc->fhc_regs.uregs + FHC_UREGS_IMAP);
278 ZAP(fhc->fhc_regs.tregs + FHC_TREGS_ICLR,
279 fhc->fhc_regs.tregs + FHC_TREGS_IMAP);
281 /* Setup FHC control register. */
282 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
284 /* All non-central boards have this bit set. */
285 if (! IS_CENTRAL_FHC(fhc))
286 tmp |= FHC_CONTROL_IXIST;
288 /* For all FHCs, clear the firmware synchronization
289 * line and both low power mode enables.
291 tmp &= ~(FHC_CONTROL_AOFF | FHC_CONTROL_BOFF |
292 FHC_CONTROL_SLINE);
294 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
295 upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
300 void __init central_probe(void)
302 struct linux_prom_registers fpregs[6];
303 const struct linux_prom_registers *pr;
304 struct linux_fhc *fhc;
305 struct device_node *dp, *fp;
306 int err;
308 dp = of_find_node_by_name(NULL, "central");
309 if (!dp) {
310 if (this_is_starfire)
311 starfire_cpu_setup();
312 return;
315 /* Ok we got one, grab some memory for software state. */
316 central_bus = (struct linux_central *)
317 central_alloc_bootmem(sizeof(struct linux_central));
318 if (central_bus == NULL)
319 central_probe_failure(__LINE__);
321 fhc = (struct linux_fhc *)
322 central_alloc_bootmem(sizeof(struct linux_fhc));
323 if (fhc == NULL)
324 central_probe_failure(__LINE__);
326 /* First init central. */
327 central_bus->child = fhc;
328 central_bus->prom_node = dp;
329 central_ranges_init(central_bus);
331 /* And then central's FHC. */
332 fhc->next = fhc_list;
333 fhc_list = fhc;
335 fhc->parent = central_bus;
336 fp = dp->child;
337 while (fp) {
338 if (!strcmp(fp->name, "fhc"))
339 break;
340 fp = fp->sibling;
342 if (!fp)
343 central_probe_failure(__LINE__);
345 fhc->prom_node = fp;
346 fhc_ranges_init(fhc);
348 /* Now, map in FHC register set. */
349 pr = of_get_property(fp, "reg", NULL);
350 if (!pr)
351 central_probe_failure(__LINE__);
352 memcpy(fpregs, pr, sizeof(fpregs));
354 apply_central_ranges(central_bus, &fpregs[0], 6);
356 fhc->fhc_regs.pregs = prom_reg_to_paddr(&fpregs[0]);
357 fhc->fhc_regs.ireg = prom_reg_to_paddr(&fpregs[1]);
358 fhc->fhc_regs.ffregs = prom_reg_to_paddr(&fpregs[2]);
359 fhc->fhc_regs.sregs = prom_reg_to_paddr(&fpregs[3]);
360 fhc->fhc_regs.uregs = prom_reg_to_paddr(&fpregs[4]);
361 fhc->fhc_regs.tregs = prom_reg_to_paddr(&fpregs[5]);
363 /* Obtain board number from board status register, Central's
364 * FHC lacks "board#" property.
366 err = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_BSR);
367 fhc->board = (((err >> 16) & 0x01) |
368 ((err >> 12) & 0x0e));
370 fhc->jtag_master = 0;
372 /* Attach the clock board registers for CENTRAL. */
373 probe_clock_board(central_bus, fhc, fp);
375 err = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_ID);
376 printk("FHC(board %d): Version[%x] PartID[%x] Manuf[%x] (CENTRAL)\n",
377 fhc->board,
378 ((err & FHC_ID_VERS) >> 28),
379 ((err & FHC_ID_PARTID) >> 12),
380 ((err & FHC_ID_MANUF) >> 1));
382 probe_other_fhcs();
384 init_all_fhc_hw();
387 static inline void fhc_ledblink(struct linux_fhc *fhc, int on)
389 u32 tmp;
391 tmp = upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
393 /* NOTE: reverse logic on this bit */
394 if (on)
395 tmp &= ~(FHC_CONTROL_RLED);
396 else
397 tmp |= FHC_CONTROL_RLED;
398 tmp &= ~(FHC_CONTROL_AOFF | FHC_CONTROL_BOFF | FHC_CONTROL_SLINE);
400 upa_writel(tmp, fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
401 upa_readl(fhc->fhc_regs.pregs + FHC_PREGS_CTRL);
404 static inline void central_ledblink(struct linux_central *central, int on)
406 u8 tmp;
408 tmp = upa_readb(central->clkregs + CLOCK_CTRL);
410 /* NOTE: reverse logic on this bit */
411 if (on)
412 tmp &= ~(CLOCK_CTRL_RLED);
413 else
414 tmp |= CLOCK_CTRL_RLED;
416 upa_writeb(tmp, central->clkregs + CLOCK_CTRL);
417 upa_readb(central->clkregs + CLOCK_CTRL);
420 static struct timer_list sftimer;
421 static int led_state;
423 static void sunfire_timer(unsigned long __ignored)
425 struct linux_fhc *fhc;
427 central_ledblink(central_bus, led_state);
428 for (fhc = fhc_list; fhc != NULL; fhc = fhc->next)
429 if (! IS_CENTRAL_FHC(fhc))
430 fhc_ledblink(fhc, led_state);
431 led_state = ! led_state;
432 sftimer.expires = jiffies + (HZ >> 1);
433 add_timer(&sftimer);
436 /* After PCI/SBUS busses have been probed, this is called to perform
437 * final initialization of all FireHose Controllers in the system.
439 void firetruck_init(void)
441 struct linux_central *central = central_bus;
442 u8 ctrl;
444 /* No central bus, nothing to do. */
445 if (central == NULL)
446 return;
448 /* OBP leaves it on, turn it off so clock board timer LED
449 * is in sync with FHC ones.
451 ctrl = upa_readb(central->clkregs + CLOCK_CTRL);
452 ctrl &= ~(CLOCK_CTRL_RLED);
453 upa_writeb(ctrl, central->clkregs + CLOCK_CTRL);
455 led_state = 0;
456 init_timer(&sftimer);
457 sftimer.data = 0;
458 sftimer.function = &sunfire_timer;
459 sftimer.expires = jiffies + (HZ >> 1);
460 add_timer(&sftimer);