Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / ppc / platforms / 4xx / ibm440sp.c
blobde8f7ac5623c1eca02dd5ce14535fc22a6c4c55f
1 /*
2 * PPC440SP I/O descriptions
4 * Matt Porter <mporter@kernel.crashing.org>
5 * Copyright 2002-2005 MontaVista Software Inc.
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 * Copyright (c) 2003, 2004 Zultys Technologies
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <platforms/4xx/ibm440sp.h>
19 #include <asm/ocp.h>
21 static struct ocp_func_emac_data ibm440sp_emac0_def = {
22 .rgmii_idx = -1, /* No RGMII */
23 .rgmii_mux = -1, /* No RGMII */
24 .zmii_idx = -1, /* No ZMII */
25 .zmii_mux = -1, /* No ZMII */
26 .mal_idx = 0, /* MAL device index */
27 .mal_rx_chan = 0, /* MAL rx channel number */
28 .mal_tx_chan = 0, /* MAL tx channel number */
29 .wol_irq = 61, /* WOL interrupt number */
30 .mdio_idx = -1, /* No shared MDIO */
31 .tah_idx = -1, /* No TAH */
33 OCP_SYSFS_EMAC_DATA()
35 static struct ocp_func_mal_data ibm440sp_mal0_def = {
36 .num_tx_chans = 1, /* Number of TX channels */
37 .num_rx_chans = 1, /* Number of RX channels */
38 .txeob_irq = 38, /* TX End Of Buffer IRQ */
39 .rxeob_irq = 39, /* RX End Of Buffer IRQ */
40 .txde_irq = 34, /* TX Descriptor Error IRQ */
41 .rxde_irq = 35, /* RX Descriptor Error IRQ */
42 .serr_irq = 33, /* MAL System Error IRQ */
43 .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */
45 OCP_SYSFS_MAL_DATA()
47 static struct ocp_func_iic_data ibm440sp_iic0_def = {
48 .fast_mode = 0, /* Use standad mode (100Khz) */
51 static struct ocp_func_iic_data ibm440sp_iic1_def = {
52 .fast_mode = 0, /* Use standad mode (100Khz) */
54 OCP_SYSFS_IIC_DATA()
56 struct ocp_def core_ocp[] = {
57 { .vendor = OCP_VENDOR_IBM,
58 .function = OCP_FUNC_OPB,
59 .index = 0,
60 .paddr = 0x0000000140000000ULL,
61 .irq = OCP_IRQ_NA,
62 .pm = OCP_CPM_NA,
64 { .vendor = OCP_VENDOR_IBM,
65 .function = OCP_FUNC_16550,
66 .index = 0,
67 .paddr = PPC440SP_UART0_ADDR,
68 .irq = UART0_INT,
69 .pm = IBM_CPM_UART0,
71 { .vendor = OCP_VENDOR_IBM,
72 .function = OCP_FUNC_16550,
73 .index = 1,
74 .paddr = PPC440SP_UART1_ADDR,
75 .irq = UART1_INT,
76 .pm = IBM_CPM_UART1,
78 { .vendor = OCP_VENDOR_IBM,
79 .function = OCP_FUNC_16550,
80 .index = 2,
81 .paddr = PPC440SP_UART2_ADDR,
82 .irq = UART2_INT,
83 .pm = IBM_CPM_UART2,
85 { .vendor = OCP_VENDOR_IBM,
86 .function = OCP_FUNC_IIC,
87 .index = 0,
88 .paddr = 0x00000001f0000400ULL,
89 .irq = 2,
90 .pm = IBM_CPM_IIC0,
91 .additions = &ibm440sp_iic0_def,
92 .show = &ocp_show_iic_data
94 { .vendor = OCP_VENDOR_IBM,
95 .function = OCP_FUNC_IIC,
96 .index = 1,
97 .paddr = 0x00000001f0000500ULL,
98 .irq = 3,
99 .pm = IBM_CPM_IIC1,
100 .additions = &ibm440sp_iic1_def,
101 .show = &ocp_show_iic_data
103 { .vendor = OCP_VENDOR_IBM,
104 .function = OCP_FUNC_GPIO,
105 .index = 0,
106 .paddr = 0x00000001f0000700ULL,
107 .irq = OCP_IRQ_NA,
108 .pm = IBM_CPM_GPIO0,
110 { .vendor = OCP_VENDOR_IBM,
111 .function = OCP_FUNC_MAL,
112 .paddr = OCP_PADDR_NA,
113 .irq = OCP_IRQ_NA,
114 .pm = OCP_CPM_NA,
115 .additions = &ibm440sp_mal0_def,
116 .show = &ocp_show_mal_data,
118 { .vendor = OCP_VENDOR_IBM,
119 .function = OCP_FUNC_EMAC,
120 .index = 0,
121 .paddr = 0x00000001f0000800ULL,
122 .irq = 60,
123 .pm = OCP_CPM_NA,
124 .additions = &ibm440sp_emac0_def,
125 .show = &ocp_show_emac_data,
127 { .vendor = OCP_VENDOR_INVALID