Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / mips / pmc-sierra / msp71xx / msp_irq_slp.c
blobf5f1b8d2bb9ae9a4df1fd2278c88754e796da566
1 /*
2 * This file define the irq handler for MSP SLM subsystem interrupts.
4 * Copyright 2005-2006 PMC-Sierra, Inc, derived from irq_cpu.c
5 * Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/bitops.h>
18 #include <asm/mipsregs.h>
19 #include <asm/system.h>
21 #include <msp_slp_int.h>
22 #include <msp_regs.h>
24 static inline void unmask_msp_slp_irq(unsigned int irq)
26 /* check for PER interrupt range */
27 if (irq < MSP_PER_INTBASE)
28 *SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE));
29 else
30 *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
33 static inline void mask_msp_slp_irq(unsigned int irq)
35 /* check for PER interrupt range */
36 if (irq < MSP_PER_INTBASE)
37 *SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE));
38 else
39 *PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
43 * While we ack the interrupt interrupts are disabled and thus we don't need
44 * to deal with concurrency issues. Same for msp_slp_irq_end.
46 static inline void ack_msp_slp_irq(unsigned int irq)
48 mask_slp_irq(irq);
51 * only really necessary for 18, 16-14 and sometimes 3:0 (since
52 * these can be edge sensitive) but it doesn't hurt for the others.
55 /* check for PER interrupt range */
56 if (irq < MSP_PER_INTBASE)
57 *SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
58 else
59 *PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
62 static struct irq_chip msp_slp_irq_controller = {
63 .name = "MSP_SLP",
64 .ack = ack_msp_slp_irq,
65 .mask = ack_msp_slp_irq,
66 .mask_ack = ack_msp_slp_irq,
67 .unmask = unmask_msp_slp_irq,
70 void __init msp_slp_irq_init(void)
72 int i;
74 /* Mask/clear interrupts. */
75 *SLP_INT_MSK_REG = 0x00000000;
76 *PER_INT_MSK_REG = 0x00000000;
77 *SLP_INT_STS_REG = 0xFFFFFFFF;
78 *PER_INT_STS_REG = 0xFFFFFFFF;
80 /* initialize all the IRQ descriptors */
81 for (i = MSP_SLP_INTBASE; i < MSP_PER_INTBASE + 32; i++)
82 set_irq_chip_and_handler(i, &msp_slp_irq_controller
83 handle_level_irq);
86 void msp_slp_irq_dispatch(void)
88 u32 pending;
89 int intbase;
91 intbase = MSP_SLP_INTBASE;
92 pending = *SLP_INT_STS_REG & *SLP_INT_MSK_REG;
94 /* check for PER interrupt */
95 if (pending == (1 << (MSP_INT_PER - MSP_SLP_INTBASE))) {
96 intbase = MSP_PER_INTBASE;
97 pending = *PER_INT_STS_REG & *PER_INT_MSK_REG;
100 /* check for spurious interrupt */
101 if (pending == 0x00000000) {
102 printk(KERN_ERR "Spurious %s interrupt?\n",
103 (intbase == MSP_SLP_INTBASE) ? "SLP" : "PER");
104 return;
107 /* dispatch the irq */
108 do_IRQ(ffs(pending) + intbase - 1);