Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / mips / philips / pnx8550 / stb810 / board_setup.c
blob345d71e53cf2587cddf8e2cf828408ec875775e3
1 /*
2 * STB810 specific board startup routines.
4 * Based on the arch/mips/philips/pnx8550/jbs/board_setup.c
6 * Author: MontaVista Software, Inc.
7 * source@mvista.com
9 * Copyright 2005 MontaVista Software Inc.
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
17 #include <linux/init.h>
18 #include <linux/sched.h>
19 #include <linux/ioport.h>
20 #include <linux/mm.h>
21 #include <linux/console.h>
22 #include <linux/mc146818rtc.h>
23 #include <linux/delay.h>
25 #include <asm/cpu.h>
26 #include <asm/bootinfo.h>
27 #include <asm/irq.h>
28 #include <asm/mipsregs.h>
29 #include <asm/reboot.h>
30 #include <asm/pgtable.h>
32 #include <glb.h>
34 void __init board_setup(void)
36 unsigned long config0, configpr;
38 config0 = read_c0_config();
40 /* clear all three cache coherency fields */
41 config0 &= ~(0x7 | (7<<25) | (7<<28));
42 config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) |
43 (CONF_CM_DEFAULT<<28));
44 write_c0_config(config0);
46 configpr = read_c0_config7();
47 configpr |= (1<<19); /* enable tlb */
48 write_c0_config7(configpr);