Committer: Michael Beasley <mike@snafu.setup>
[mikesnafu-overlay.git] / arch / mips / kernel / irq-rm7000.c
blobfb50cc78b28b45cf36ffddb8fa4add2a734d5fa1
1 /*
2 * Copyright (C) 2003 Ralf Baechle
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * Handler for RM7000 extended interrupts. These are a non-standard
10 * feature so we handle them separately from standard interrupts.
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
16 #include <asm/irq_cpu.h>
17 #include <asm/mipsregs.h>
18 #include <asm/system.h>
20 static inline void unmask_rm7k_irq(unsigned int irq)
22 set_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE));
25 static inline void mask_rm7k_irq(unsigned int irq)
27 clear_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE));
30 static struct irq_chip rm7k_irq_controller = {
31 .name = "RM7000",
32 .ack = mask_rm7k_irq,
33 .mask = mask_rm7k_irq,
34 .mask_ack = mask_rm7k_irq,
35 .unmask = unmask_rm7k_irq,
36 .eoi = unmask_rm7k_irq
39 void __init rm7k_cpu_irq_init(void)
41 int base = RM7K_CPU_IRQ_BASE;
42 int i;
44 clear_c0_intcontrol(0x00000f00); /* Mask all */
46 for (i = base; i < base + 4; i++)
47 set_irq_chip_and_handler(i, &rm7k_irq_controller,
48 handle_percpu_irq);